gram.git
2020-07-10 Jean THOMASFix formal checks for RefreshTimer
2020-07-10 Jean THOMASFix tests for _AntiStarvation
2020-07-10 Jean THOMASFix code styling
2020-07-10 Jean THOMASRename VCD file output
2020-07-10 Jean THOMASRename tests, add interleaved read/write test
2020-07-10 Jean THOMASImplement a memory in the bank simulator, check for...
2020-07-10 Jean THOMASFix timings in simulation to prevent tDLLK errors
2020-07-10 Jean THOMASAdd POR start/end logging in simsoc testbench
2020-07-09 Jean THOMASMake power-on delay signal synchronous
2020-07-09 Jean THOMASFix formatting in headless example
2020-07-09 Jean THOMASAdd test for SoC readout
2020-07-09 Jean THOMASDisable Assert statements until they are natively suppo...
2020-07-09 Jean THOMASComment buggy assertions
2020-07-09 Jean THOMASAdd imports for Assert & Assume in FakePHY
2020-07-09 Jean THOMASFix counter reset condition bug
2020-07-09 Jean THOMASFix syntax in FakePHY assertions
2020-07-09 Jean THOMASUse assertions as a temporary replacement for Display...
2020-07-09 Jean THOMASRemove unused BitFlip
2020-07-09 Jean THOMASUpdate build script to include software version
2020-07-08 Jean THOMASAdd temporary code for SoC tests with FakePHY
2020-07-08 Jean THOMASPort FakePHY to nMigen
2020-07-08 Jean THOMASMatch ECPIX-5 DRAM parameters in Micron's model
2020-07-08 Jean THOMASImport fake PHY from LiteDRAM (non functionnal ATM)
2020-07-08 Jean THOMASFix styling
2020-07-08 Jean THOMASAdd test case for AntiStarvation
2020-07-08 Jean THOMASFix bugs in _AntiStarvation
2020-07-08 Jean THOMASUpdate memtest code
2020-07-08 Jean THOMASRemove useless variables in _Steerer, ensure command...
2020-07-08 Jean THOMASMake an Elaboratable out of the anti_starvation function
2020-07-08 Jean THOMASAdd links to various docs that have been helpful
2020-07-08 Jean THOMASDrop YoWASP, build Yosys and SymbiYosys from source
2020-07-08 Jean THOMASFix dram_model path in .gitattributes
2020-07-08 Jean THOMASFix clock input
2020-07-08 Jean THOMAScke => clk_en in SoC testbench
2020-07-07 Jean THOMASUpdate cke => clk_en in test
2020-07-07 Jean THOMASFix code styling
2020-07-07 Jean THOMASFix code styling
2020-07-07 Jean THOMASReplace cke with clk_en
2020-07-07 Jean THOMASFix CRG PLL parameters (fixing #23)
2020-07-06 Jean THOMASRename from cke to clk_en
2020-07-06 Jean THOMASMake RefreshTimer fully synchronous (#24)
2020-07-06 Jean THOMASAdd write transactions in the simulation testbench
2020-07-06 Jean THOMASReduce amount of combinatorial statements to improve...
2020-07-06 Jean THOMASFix formal support in FHDLTestCase
2020-07-03 Jean THOMASRemove Diamond install script
2020-07-03 Jean THOMASAdd SourceHut badge
2020-07-03 Jean THOMASAdd .gitattributes file
2020-07-03 Jean THOMASRemove Diamond install as it only comes with models...
2020-07-03 Jean THOMASUse CRG parameters that actually work on hardware
2020-07-03 Jean THOMASUpdate CRG with parameters that work IRL
2020-07-03 Jean THOMASInvert condition in runsimcrg.sh
2020-07-03 Jean THOMASRemove remainings from TRELLIS_IO
2020-07-03 Jean THOMASCheck if YOSYS env var is set and use it as YOSYS execu...
2020-07-03 Jean THOMASUse Yosys from YoWASP
2020-07-03 Jean THOMASFix permissions for simulation script
2020-07-03 Jean THOMASAdd simulation script into SourceHut builds
2020-07-03 Jean THOMASExclude DDRDLLA from tree
2020-07-03 Jean THOMASEnsure dramsync runs at 100Mhz, sync2x at 200Mhz
2020-07-03 Jean THOMASRemove DDRDLLA
2020-07-03 Jean THOMASAdd build script for SourceHut
2020-07-03 Jean THOMASAdd tests in DFI Injector for odt and reset signals
2020-07-03 Jean THOMASCheck for additional signals in phase injector at t=0
2020-07-03 Jean THOMASAdd DFI injector test case
2020-07-03 Jean THOMASUpdate simulation gitignore
2020-07-03 Jean THOMASUpdate gram simulation documentation
2020-07-03 Jean THOMASAdd cleaning pass
2020-07-03 Jean THOMASFix autopep8 madness
2020-07-03 Jean THOMASRework CRG simulation
2020-07-03 Jean THOMASExternalize CRG into its own file
2020-07-03 Jean THOMASAdd devel doc
2020-07-03 Jean THOMASAdd test for Refresher
2020-07-03 Jean THOMASRefactor generic_test execution
2020-07-03 Jean THOMASUse spaces for indentation
2020-07-03 Jean THOMASAdd tests for core/refresher.py
2020-07-03 Jean THOMASRemoving reset=0 attribute as it is already the default...
2020-07-02 Jean THOMASUse reset signal from dramsync instead of sync
2020-07-02 Jean THOMASMake RefreshPostponer more similar to LiteDRAM's
2020-07-02 Jean THOMASFix RefreshPostponer output stuck to 1
2020-07-02 Jean THOMASFlatten specific parts of the designs
2020-07-02 Jean THOMASAdd missing command issue strobe for ZQ calibration
2020-07-02 Jean THOMASRemove PyYAML dependency
2020-07-02 Jean THOMASFix register addresses, add missing command_issue strobe
2020-07-02 Jean THOMASSet names to prevent CSR/DomainRenamer incompatibility
2020-07-02 Jean THOMASAdd DDRDLLA patch
2020-07-01 Jean THOMASFix merge
2020-07-01 Jean THOMASRework indentation and add Wishbone tests
2020-07-01 Jean THOMASAdd Wishbone interaction code
2020-07-01 Jean THOMASAdd Wishbone interaction code
2020-07-01 Jean THOMASFix Iverilog simulation
2020-07-01 Jean THOMASGenerate ilang file
2020-06-30 Jean THOMASBuild nMigen gateware in a specific folder
2020-06-30 Jean THOMASRemove LED code in CRG
2020-06-30 Jean THOMASRemove Minerva dependency
2020-06-30 Jean THOMASApplying #9044c10 changes in LiteDRAM (phy/ecp5ddrphy...
2020-06-29 Jean THOMASDefine simulation time as a parameter
2020-06-29 Jean THOMASDefine PLL's PHASELOADREG input
2020-06-29 Jean THOMASUse -n option in vvp to enable CTRL+C
2020-06-29 Jean THOMASFix PLL instanciation code for CRG simulation
2020-06-29 Jean THOMASDump whole module
2020-06-29 Jean THOMASFix DQSBUFM floating DYNDELAY
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