litex.git
2012-09-09 Florent KermarrecClean up
2012-09-09 Florent Kermarrecadd global tb, fix bugs
2012-09-09 Florent Kermarrecsimplify registers mgnt
2012-08-26 Florent Kermarrecadd tb_RecorderCsr.py
2012-08-26 Florent Kermarrecsplit migScope to trigger & recorder
2012-08-26 Florent Kermarrecadd vcd generator
2012-08-26 Florent Kermarrectb_TriggerCsr.py : use truth table generator for Sum Lut
2012-08-26 Florent Kermarrecadd truth table generator
2012-08-26 Florent Kermarrectb_spi2Csr: Add clk_ratio
2012-08-25 Florent Kermarrec- fix Spi2Csr mistakes
2012-08-25 Florent Kermarrecadd sim: tb_Spi2Csr.py (skeleton, WIP)
2012-08-25 Florent Kermarrecadd sim: tb_TriggerCsr.py
2012-08-23 Florent Kermarrecuse ram for Sum
2012-08-22 Florent KermarrecAdd simulation skeleton
2012-08-12 Florent Kermarrecnew library spi2Csr (skeleton)
2012-08-12 Florent Kermarrecadd register interface to Trigger
2012-08-12 Florent Kermarrecsimplify EdgeDetector
2012-08-12 Florent Kermarrecfix masks on EdgeDetector
2012-08-12 Florent Kermarrecadd Trigger
2012-08-12 Florent Kermarrecrename Recorder --> Storage
2012-08-12 Florent Kermarrecadd simple Sequencer
2012-08-12 Florent Kermarrecadd Readme
2012-08-12 Florent Kermarrecadd Readme
2012-08-12 Florent Kermarrec- init Repo