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gem5.git
2012-07-12
Nilay Vaish
Ruby: remove config information from ruby.stats
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2012-07-12
Nilay Vaish
Ruby: remove some unused stuff from SLICC files
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2012-07-11
Brad Beckmann
x86: added page size in bytes tlb entry function
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2012-07-11
Brad Beckmann
ruby: improved DRAM reset comment
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2012-07-11
Brad Beckmann
regress: ruby stat additions and config changes
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2012-07-11
Marc Orr
syscall emulation: Add the futex system call.
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2012-07-11
Brad Beckmann
x86: logSize and lruSeq are now optional ckpt params
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2012-07-11
Steve Reinhardt
Add hook to call map() on Process from python.
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2012-07-11
Brad Beckmann
# User Brad Beckmann <Brad.Beckmann@amd.com>
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2012-07-11
Brad Beckmann
ruby: remove the cpu assumptions for the random tester
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2012-07-11
Brad Beckmann
# User Brad Beckmann <Brad.Beckmann@amd.com>
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2012-07-11
Brad Beckmann
imported patch jason/slicc-external-structure-fix
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2012-07-11
Brad Beckmann
ruby: banked cache array resource model
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2012-07-11
Joel Hestness
ruby: tag and data cache access support
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2012-07-11
Nuwan Jayasena
ruby: adds reset function to Ruby memory controllers
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2012-07-11
Nuwan Jayasena
ruby: memory controllers now inherit from an abstract...
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2012-07-11
Brad Beckmann
cpu: added assertions to ensure the correct proxies...
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2012-07-11
Brad Beckmann
ruby: changes how Topologies are created
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2012-07-09
Andreas Hansson
EventManager: Rename queue accessor and remove cast...
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2012-07-09
Andreas Hansson
Mem: Make members relating to range and size constant
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2012-07-09
Andreas Hansson
Port: Hide the queue implementation in SimpleTimingPort
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2012-07-09
Andreas Hansson
Stats: Updates due to bus changes
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2012-07-09
Andreas Hansson
Port: Align port names in C++ and Python
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2012-07-09
Andreas Hansson
Bus: Make the default bus width 8 bytes instead of 64
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2012-07-09
Andreas Hansson
Bus: Split the bus into separate request/response layers
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2012-07-09
Andreas Hansson
Bus: Add a notion of layers to the buses
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2012-07-09
Andreas Hansson
Bus: Replace tickNextIdle and inRetry with a state...
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2012-07-09
Andreas Hansson
Port: Make getAddrRanges const
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2012-07-09
Andreas Hansson
Port: Add getAddrRanges to master port (asking slave...
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2012-07-09
Andreas Hansson
Port: Add isSnooping to slave port (asking master port)
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2012-07-09
Andreas Hansson
Port: Move retry from port base class to Master/SlavePort
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2012-07-09
Andreas Hansson
Fix: Address a few benign memory leaks
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2012-07-02
Andreas Hansson
gcc: Fix warnings for gcc 4.7 and clang 3.1
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2012-06-29
Lena Olson
Cache: Fix the LRU policy for classic memory hierarchy
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2012-06-29
Uri Wiener
Bus: enable non/coherent buses sub-classes
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2012-06-29
Dam Sunwoo
Mem: fix master id assertion in cache_impl.hh
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2012-06-29
Matt Evans
Style: Make style.py's invalid warning print which...
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2012-06-29
Matt Evans
Mem: Fix a livelock resulting in LLSC/locked memory...
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2012-06-29
Ali Saidi
Stats: Update stats for RAS and LRU fixes.
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2012-06-29
Nathanael Premillieu
O3: Track if the RAS has been pushed or not to pop...
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2012-06-29
Ali Saidi
ARM: Fix identification of one RAS pop instruction.
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2012-06-29
Ali Saidi
Cache: Only invalidate a line in the cache when an...
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2012-06-29
Ali Saidi
ARM: Update version of linux we claim to be to 3.0.0.
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2012-06-29
Ali Saidi
ARM: Fix issue with predicted next pc being wrong becau...
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2012-06-27
Ali Saidi
ARM: Fix address range issue with VExpress EMM
stable_2012_06_28
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2012-06-20
Andreas Hansson
swig: Use SWIG from environment when determining version
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2012-06-18
Andreas Hansson
Build: Point to the appropriate tcmalloc package
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2012-06-11
Anthony Gutierrez
configs: add run scripts for ics/gb versions of android...
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2012-06-11
Anthony Gutierrez
ARM: implement the ProcessInfo methods
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2012-06-11
Ali Saidi
scons: Make compiler version error more verbose and...
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2012-06-11
Marc Orr
Regression: Fix some bugs in simple-timing-mp-ruby.py.
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2012-06-08
Andreas Hansson
Timing CPU: Remove a redundant port pointer
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2012-06-08
Andreas Hansson
Power: Fix MaxMiscDestRegs which was set to zero
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2012-06-07
Nilay Vaish
X86 TLB: Add a missing = sign
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2012-06-07
Ali Saidi
mem: Delay deleting of incoming packets by one call.
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2012-06-07
Jayneel Gandhi
X86 TLB: Fix for gcc 4.4.3
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2012-06-07
Nilay Vaish
Config: call to setWorkCountOptions() for all ISAs
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2012-06-07
Nilay Vaish
Config: Remove setMipsOptions
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2012-06-07
Nilay Vaish
Config: changes to a couple of error msgs
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2012-06-05
Anthony Gutierrez
cpu: Don't init simple and inorder CPUs if they are...
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2012-06-05
Ali Saidi
ISA: Back-out NoopMachInst as a StaticInstPtr change.
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2012-06-05
Ali Saidi
cpt: update some comments in the checkpoint migration...
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2012-06-05
Ali Saidi
all: Update stats for memory per master and total fix.
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2012-06-05
William Wang
stats: when applying an operation to two vectors sum...
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2012-06-05
Dam Sunwoo
Mem: add per-master stats to physmem
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2012-06-05
Geoffrey Blake
ARM: Add PCIe support to VExpress_EMM model and remove...
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2012-06-05
Chander Sudanthi
ARM: removed extra white space
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2012-06-05
Chander Sudanthi
ARM: Fix MPIDR and MIDR register implementation.
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2012-06-05
Chander Sudanthi
ARM: PS2 encoding fix
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2012-06-05
Ali Saidi
sim: Provide a framework for detecting out of data...
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2012-06-05
Ali Saidi
stats: Add stats unittest for total calculations.
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2012-06-05
Ali Saidi
O3: Clean up the O3 structures and try to pack them...
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2012-06-05
Ali Saidi
sim: Add support for tcmalloc if it's installed and...
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2012-06-05
Ali Saidi
sim: Remove FastAlloc
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2012-06-05
Ali Saidi
ARM: Fix over-eager assert in gic.
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2012-06-05
Mitchell Hayenga
stats: Provide a mechanism to get a callback when stats...
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2012-06-05
Ali Saidi
ARM: Fix compilation on ARM after Gabe's change.
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2012-06-04
Gabe Black
ISA: Turn the ExtMachInst NoopMachinst into the StaticI...
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2012-06-04
Gabe Black
X86: Update stats for the CPUID change.
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2012-06-04
Gabe Black
X86: Ensure that the CPUID instruction always writes...
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2012-06-04
Gabe Black
X86: Ensure that the decoder's internal ExtMachInst...
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2012-05-31
Andreas Hansson
Bus: Split the bus into a non-coherent and coherent bus
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2012-05-09
Andreas Hansson
Stats: Fix stats to match output after changeset 8800b0...
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2012-05-30
Andreas Hansson
gcc: Small fixes to compile with gcc 4.7
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2012-05-30
Andreas Hansson
Bus: Remove redundant packet parameter from isOccupied
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2012-05-30
Andreas Hansson
Bus: Turn the PortId into a transport function parameter
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2012-05-30
Andreas Hansson
Packet: Unify the use of PortID in packet and port
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2012-05-30
Andreas Hansson
Packet: Updated comments for src and dest fields
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2012-05-30
Andreas Hansson
Bridge: Split deferred request, response and sender...
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2012-05-29
Gabe Black
X86: Use the HandyM5Reg to avoid a register read and...
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2012-05-28
Gabe Black
X86: Add a 32 bit hello world test binary.
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2012-05-28
Gabe Black
X86: Move the GDT down to where it can be accessed...
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2012-05-28
Gabe Black
X86: Truncate addresses to 32 bits except in 64 bit...
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2012-05-26
Gabe Black
ISA,CPU: Generalize and split out the components of...
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2012-05-26
Gabe Black
CPU: Merge the predecoder and decoder.
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2012-05-25
Gabe Black
ISA: Make the decode function part of the ISA's decoder.
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2012-05-25
Gabe Black
CPU: Simplify the implementation of the decode cache.
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2012-05-25
Gabe Black
Decode: Make the Decoder class defined per ISA.
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2012-05-24
Andreas Hansson
Cache: Remove dangling doWriteback declaration
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2012-05-23
Andreas Hansson
Packet: Cleaning up packet command and attribute
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