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openpower-isa.git
2021-11-23
Luke Kenneth...
add write-after-write hazard test for inorder core
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2021-11-23
R Veera Kumar
Add expected state to case_rand in alu_cases unit test
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2021-11-23
R Veera Kumar
Add expected state to case_addis_nonzero_r0 in alu_case...
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2021-11-23
R Veera Kumar
Add expected state to case_extsb in alu_cases unit...
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2021-11-23
R Veera Kumar
Add computed CR0 to expected version of case_adde_0
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2021-11-22
Luke Kenneth...
add expected version of case_adde_0
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2021-11-22
Luke Kenneth...
adding a couple more hazard avoidance cases
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2021-11-22
R Veera Kumar
Add expected state to case_cmpeqb in alu_cases unit...
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2021-11-22
R Veera Kumar
Add expected state to case_cmplw_microwatt_1 in alu_cas...
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2021-11-22
R Veera Kumar
Add expected state to case_cmpli_microwatt in alu_cases...
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2021-11-22
R Veera Kumar
Add expected state to case_cmpl_microwatt_0_disasm...
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2021-11-22
R Veera Kumar
Add expected state to case_cmpl_microwatt_0 in alu_case...
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2021-11-22
R Veera Kumar
Add expected state to case_addme_ca_so_4 in alu_cases...
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2021-11-22
R Veera Kumar
Add expected state to case_addme_ca_so_3 in alu_cases...
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2021-11-22
R Veera Kumar
Add expected state to case_addme_ca_1 in alu_cases...
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2021-11-21
Luke Kenneth...
sigh, for overlap mode there is no safe way to get...
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2021-11-21
Luke Kenneth...
move dump state to base class State in test API
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2021-11-21
R Veera Kumar
Add expected state to case_cmp3 in alu_cases unit test
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2021-11-21
R Veera Kumar
Add expected state to case_cmp2 in alu_cases unit test
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2021-11-21
R Veera Kumar
Add expected state to case_cmp in alu_cases unit test
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2021-11-21
R Veera Kumar
Add expected state to all of case_addze in alu_cases...
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2021-11-17
Jacob Lifshay
add bitmanip_cases.py
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2021-11-17
Jacob Lifshay
rename ternary->ternlog and associated form/field TI...
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2021-11-17
Luke Kenneth...
add allow_overlap argument to TestRunnerBase
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2021-11-17
Luke Kenneth...
code-comments
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2021-11-17
Luke Kenneth...
XER regspec_decode_write was not sophisticated enough.
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2021-11-17
Luke Kenneth...
split up regression cases so that a single Rc=1 add...
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2021-11-16
Luke Kenneth...
truncate CR regspec_decode_write reg mask to 8 bit
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2021-11-16
Luke Kenneth...
argh, regspec_decode_write is supposed to return single...
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2021-11-16
Luke Kenneth...
name of cr reg3 was numbered 2
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2021-11-13
Jacob Lifshay
remove excess I from ternary-related names
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2021-11-12
Jacob Lifshay
change ternaryi to correct register fields
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2021-11-12
Jacob Lifshay
format code
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2021-11-12
Jacob Lifshay
format code
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2021-11-11
Luke Kenneth...
add case-based expected results in addme alu_cases
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2021-11-11
Luke Kenneth...
invert speedup (commenting-out) of tests
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2021-11-11
Luke Kenneth...
sort out numbering on CRs in SimState
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2021-11-11
Luke Kenneth...
whitespace
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2021-11-11
Luke Kenneth...
fix test API State.compare which was overwriting intreg...
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2021-11-11
Luke Kenneth...
https://bugs.libre-soc.org/show_bug.cgi?id=730#c27
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2021-11-11
Luke Kenneth...
add unexpected result to see what happens
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2021-11-11
Luke Kenneth...
use append on expected state dump, not ideal but
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2021-11-11
Luke Kenneth...
add core state to gtkw
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2021-11-11
R Veera Kumar
Add expected state to case_addze for addze in alu_cases...
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2021-11-11
R Veera Kumar
Add expected state to case_1_regression for 'add' in...
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2021-11-11
R Veera Kumar
Add expected state to case_1_regression for extsb in...
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2021-11-11
R Veera Kumar
Add expected state to case_1_regression for subf (2...
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2021-11-10
Luke Kenneth...
attempt to get gtkw simulator signals updated on WB MMU
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2021-11-10
R Veera Kumar
Add expected state to case_1_regression for subf in...
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2021-11-10
Luke Kenneth...
add LDST msr_pr to gtkw debug
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2021-11-10
Luke Kenneth...
display 64 bits of msr
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2021-11-10
Luke Kenneth...
add MSR to ldst operand debug gtkw
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2021-11-10
Luke Kenneth...
add MSR to gtkw file for simulation output
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2021-11-10
Luke Kenneth...
add RT as an option for ternary instruction as 3rd...
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2021-11-10
Luke Kenneth...
add creation of 8 and 16 DCT butterfly diagrams
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2021-11-09
Tobias Platen
forward mmu sprs
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2021-11-09
R Veera Kumar
Add expected state to case_1_regression for extsw for...
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2021-11-05
Jacob Lifshay
add ternaryi
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2021-11-05
Jacob Lifshay
format code
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2021-11-05
Jacob Lifshay
format code
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2021-11-05
Jacob Lifshay
add comment2 and unofficial fields to existing instructions
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2021-11-04
Tobias Platen
dcbz needs to go through ldst function unit
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2021-11-04
klehman
caller.py: Fix ISACaller modifying test state
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2021-10-28
klehman
state.py: Fix expected dump for cr regs
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2021-10-25
klehman
spacing fix
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2021-10-25
klehman
tests now dump into caller dirs
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2021-10-25
klehman
get file name from stack, add in TestCase
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2021-10-25
klehman
tmp creation/string formatting
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2021-10-25
klehman
added dump_state_tofile for code creation
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2021-10-23
R Veera Kumar
Add a new test caller for ALU based on shift_rot test...
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2021-10-13
Dmitry Selyutin
fixedlogical: simplify extsw
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2021-10-13
Dmitry Selyutin
fixedlogical: simplify extsh
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2021-10-13
Dmitry Selyutin
fixedlogical: simplify extsb
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2021-10-13
Dmitry Selyutin
decoder/helpers: introduce EXTSXL helper
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2021-10-13
Dmitry Selyutin
decoder/helpers: simplify XLCASTU
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2021-10-10
Luke Kenneth...
corrections to EXTSXL 0x000000090000093 table for extsb...
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2021-10-10
Dmitry Selyutin
test_caller_exts: extsb/extsh/extsw test
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2021-10-10
Dmitry Selyutin
isafunctions/extsxl: fix one of markdown tables
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2021-10-07
klehman
additional comments for runner
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2021-10-07
klehman
typo: gpr not fpr
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2021-10-07
klehman
various test state comments
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2021-10-04
Luke Kenneth...
corrections to csv files
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2021-10-04
Luke Kenneth...
add another extsxl csv file
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2021-10-04
Luke Kenneth...
replace f with F in csv files
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2021-10-04
Luke Kenneth...
add extsxl csv files
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2021-10-04
Luke Kenneth...
test adding extsxl data
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2021-10-04
Luke Kenneth...
add blank example file
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2021-10-01
klehman
fix for self.rom core
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2021-10-01
Luke Kenneth...
set run_hdl arg to None because it passes in a class now
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2021-10-01
Luke Kenneth...
copy over TestRunner class from soc/simple/test/test_ru...
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2021-09-30
Luke Kenneth...
whoops, use cache of pseudocode rather than attempt...
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2021-09-30
Luke Kenneth...
reduce PyFnWriter compile time (pywriter) by 75%
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2021-09-29
Dmitry Selyutin
isa/caller: initialize helper and redirect XLEN
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2021-09-29
Dmitry Selyutin
decoder/helpers: use globals() with exception
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2021-09-29
Dmitry Selyutin
decoder/parser: self.XLEN instead of XLEN
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2021-09-29
Dmitry Selyutin
fixedlogical: switch xoris to XCASTU
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2021-09-29
Dmitry Selyutin
fixedlogical: switch oris to XCASTU
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2021-09-29
Dmitry Selyutin
fixedlogical: switch andis. to XCASTU
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2021-09-29
Dmitry Selyutin
fixedlogical: switch xori to XCASTU
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2021-09-29
Dmitry Selyutin
fixedlogical: switch ori to XCASTU
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