| 2015-03-01 |
Florent Kermarrec | uart: create phy directory and move phy logic to serial... |
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| 2015-03-01 |
Florent Kermarrec | litesata: create example design derived from SoC |
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| 2015-03-01 |
Florent Kermarrec | liteXXX cores: remove Identifier duplication |
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| 2015-03-01 |
Florent Kermarrec | liteXXX cores: share same methodology for on-board... |
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| 2015-03-01 |
Florent Kermarrec | litesata: create specialized kc705 platform to avoid... |
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| 2015-03-01 |
Florent Kermarrec | litescope: avoid uart code duplication |
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| 2015-03-01 |
Florent Kermarrec | video: reintegrate dvisampler from mixxeo (DVI/HDMI... |
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| 2015-02-28 |
Robert Jordens | pipistrello: fix lpddr parameters, crg, flash, style |
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| 2015-02-28 |
Florent Kermarrec | soc: fix register_rom |
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| 2015-02-28 |
Florent Kermarrec | liteeth: create example design derived from SoC that... |
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| 2015-02-28 |
Florent Kermarrec | liteXXX cores: remove setup.py and relative paths ... |
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| 2015-02-28 |
Florent Kermarrec | litescope: create example design derived from SoC that... |
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| 2015-02-28 |
Florent Kermarrec | liteXXX cores: remove redefinition of get_csr_csv |
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| 2015-02-28 |
Florent Kermarrec | liteXXX cores: update README and doc |
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| 2015-02-28 |
Florent Kermarrec | soc: use self.cpu_reset_address as rom mem_map address... |
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| 2015-02-28 |
Florent Kermarrec | test implementation on all targets and fix issues |
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| 2015-02-28 |
Florent Kermarrec | move mxcrg to others (we should integrate it in mlabs_v... |
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| 2015-02-28 |
Florent Kermarrec | soc: move SDRAMSoC to a separate sdram.py file (ideally... |
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| 2015-02-28 |
Florent Kermarrec | remane GenSoC to SoC (more coherent and we will add... |
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| 2015-02-28 |
Florent Kermarrec | liteusb: move files and modify import to misoclib.com... |
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| 2015-02-28 |
Florent Kermarrec | merge liteusb |
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| 2015-02-28 |
Florent Kermarrec | liteeth: fix example design generation and remove Vivad... |
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| 2015-02-28 |
Florent Kermarrec | liteeth: fix example design generation and remove Vivad... |
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| 2015-02-28 |
Florent Kermarrec | litesata: move file and modify import to misoclib.mem... |
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| 2015-02-28 |
Florent Kermarrec | merge litesata |
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| 2015-02-28 |
Florent Kermarrec | litescope: create example_designs directory |
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| 2015-02-28 |
Florent Kermarrec | litescope: move files and modify import to misoclib... |
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| 2015-02-28 |
Florent Kermarrec | merge litescope |
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| 2015-02-28 |
Florent Kermarrec | misoclib/com: add spi (only SPIMaster for now) |
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| 2015-02-28 |
Florent Kermarrec | misoclib: better organization (create cores categories... |
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| 2015-02-28 |
Florent Kermarrec | gensoc: parameter check is now more restrictive, add... |
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| 2015-02-27 |
Florent Kermarrec | test minicon with de0nano (OK) and fix missing self... |
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| 2015-02-27 |
Florent Kermarrec | gensoc: move I/O for rom initialization to make.py |
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| 2015-02-27 |
Florent Kermarrec | targets: add de0nano (100MHz, integrated bios and SDRAM) |
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| 2015-02-27 |
Florent Kermarrec | make.py fix indent |
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| 2015-02-27 |
Florent Kermarrec | bios: we can now use -Ot with_rom True on targets to... |
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| 2015-02-27 |
Florent Kermarrec | targets: fix MiniSoC |
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| 2015-02-27 |
Florent Kermarrec | sdram: import dfi, lasmibus, wishbone2lasmi from Migen... |
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| 2015-02-27 |
Florent Kermarrec | gensoc: make it more generic (a SoC does not necessaril... |
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| 2015-02-27 |
Florent Kermarrec | reserve csr_map 0-->16 for gensoc internal csrs |
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| 2015-02-27 |
Florent Kermarrec | use cachesize reported in wishbone2lasmi |
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| 2015-02-27 |
Florent Kermarrec | create cpu dir and move lm32/mor1kx in it |
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| 2015-02-27 |
Florent Kermarrec | move memtest to sdram |
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| 2015-02-27 |
Florent Kermarrec | replace self._r_register by self._register in all CSR... |
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| 2015-02-27 |
Florent Kermarrec | make.py: avoid some actions in make all (do not flash... |
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| 2015-02-27 |
Florent Kermarrec | gensoc: add check_cpu_memory_region and check_csr_regio... |
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| 2015-02-27 |
Florent Kermarrec | liteeth: move doc |
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| 2015-02-27 |
Robert Jordens | add pipistrello target |
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| 2015-02-27 |
Robert Jordens | gensoc: missing self. |
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| 2015-02-27 |
Sebastien Bourdeauducq | Merge branch 'master' of https://github.com/m-labs... |
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| 2015-02-26 |
Yann Sionneau | target/kc705: allow access to pll_sys signal before... |
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| 2015-02-26 |
Florent Kermarrec | gensoc: cpus now directly add their verilog sources |
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| 2015-02-26 |
Florent Kermarrec | gensoc: add mem_map and mem_decoder to avoid duplications |
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| 2015-02-26 |
Florent Kermarrec | gensoc: get platform_id from platform |
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| 2015-02-26 |
Florent Kermarrec | targets/simple: make it generic (no default_platform... |
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| 2015-02-26 |
Florent Kermarrec | liteeth: fix example_designs generation |
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| 2015-02-26 |
Florent Kermarrec | liteeth: fix import (from liteeth --> from misoclib... |
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| 2015-02-26 |
Florent Kermarrec | move files to liteeeth and create example_designs directory |
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| 2015-02-25 |
Sebastien Bourdeauducq | remove litex submodule |
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| 2015-02-25 |
Sebastien Bourdeauducq | merge liteeth |
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| 2015-02-25 |
Sebastien Bourdeauducq | move files for misoc integration |
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| 2015-02-25 |
Florent Kermarrec | phy/sim: generate sop/eop |
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| 2015-02-24 |
Florent Kermarrec | remove upload optimization (we will use wishbone later... |
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| 2015-02-24 |
Florent Kermarrec | add sim phy |
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| 2015-02-23 |
Florent Kermarrec | add read grouping to etherbone, we now have interesting... |
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| 2015-02-23 |
Florent Kermarrec | test: add make.py to replace static config.py file |
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| 2015-02-23 |
Florent Kermarrec | prepare reads grouping to speed up upload |
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| 2015-02-23 |
Florent Kermarrec | use new Migen sel signal to change the way we upload... |
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| 2015-02-23 |
Florent Kermarrec | rle: increase dw automatically when needed |
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| 2015-02-23 |
Florent Kermarrec | host/dump: optimize get_bits / decode_rle since we... |
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| 2015-02-22 |
Florent Kermarrec | host/driver/reg: use burst mode to speed up upload... |
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| 2015-02-22 |
Florent Kermarrec | test: add make.py to replace static config.py file |
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| 2015-02-22 |
Florent Kermarrec | tty working |
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| 2015-02-22 |
Florent Kermarrec | mac: add padding |
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| 2015-02-21 |
Florent Kermarrec | remove MiSoC dependency |
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| 2015-02-21 |
Florent Kermarrec | doc: remove IP |
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| 2015-02-21 |
Florent Kermarrec | doc: remove IP |
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| 2015-02-21 |
Florent Kermarrec | doc: remove IP |
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| 2015-02-21 |
Florent Kermarrec | doc: remove IP |
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| 2015-02-21 |
Florent Kermarrec | add ft2232h software code (will need rework) |
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| 2015-02-21 |
Florent Kermarrec | add ft2232h hdl code (will need rework) |
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| 2015-02-21 |
Florent Kermarrec | init repo structure |
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| 2015-02-21 |
Florent Kermarrec | add README skeleton |
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| 2015-02-21 |
Florent Kermarrec | add tty over udp (will need mac to insert padding) |
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| 2015-02-21 |
Florent Kermarrec | remove MiSoC dependency |
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| 2015-02-21 |
Florent Kermarrec | remove MiSoC dependency |
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| 2015-02-19 |
Florent Kermarrec | la: fix intput_buffer clocking when clk_domain is not... |
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| 2015-02-19 |
Florent Kermarrec | fix rle when used with subsampler |
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| 2015-02-19 |
Florent Kermarrec | driver/la: add samplerate computation (required by... |
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| 2015-02-19 |
Florent Kermarrec | remove limitation on debug tuple definition |
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| 2015-02-19 |
Florent Kermarrec | rle: expose length parameter to user, add assertion... |
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| 2015-02-19 |
Florent Kermarrec | enable RLE only in POST_HIT_RECORDING state (to ensure... |
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| 2015-02-19 |
Florent Kermarrec | simplify RLE |
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| 2015-02-18 |
Florent Kermarrec | fix typo |
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| 2015-02-18 |
Florent Kermarrec | dump/sigrok: fix against real dumps, now able to import... |
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| 2015-02-18 |
Florent Kermarrec | update LiteX |
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| 2015-02-18 |
Florent Kermarrec | targets/kc705: fix csr address conflict on eth |
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| 2015-02-18 |
Florent Kermarrec | add LiteX external core and remove ethmac |
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| 2015-02-18 |
Florent Kermarrec | remove verilog and move mxcrg.v to misoclib/mxcrg |
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| 2015-02-18 |
Florent Kermarrec | move lm32/mor1kx submodules to extcores |
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