openpower-isa.git
2022-12-29 Luke Kenneth... add bryan hawkins chacha20 source from
2022-11-11 Jacob Lifshayadd maddedus
2022-11-11 Jacob Lifshayfix case_sv_bigint_shift_left_then_back
2022-11-11 Jacob LifshayXLEN-ify maddedu
2022-11-11 Jacob Lifshayfix maddedu title line
2022-11-11 Jacob Lifshayfix bug in parser when concatenating stuff that isn...
2022-11-01 Dmitry Selyutintests/bigint: provide shadd/shadduw tests
2022-11-01 Dmitry Selyutinselectable_int: support variable concatenation
2022-11-01 Dmitry Selyutinbitmanip.mdwn: avoid overflow for m variable
2022-11-01 Dmitry SelyutinRevert "Revert "https://bugs.libre-soc.org/show_bug...
2022-11-01 Dmitry SelyutinRevert "corrections to shadd/uw after reverting to...
2022-11-01 Luke Kenneth... corrections to shadd/uw after reverting to switch
2022-11-01 Luke Kenneth... Revert "https://bugs.libre-soc.org/show_bug.cgi?id...
2022-10-29 Luke Kenneth... add dsld. (Rc=1) test, make overflow acceptable to...
2022-10-28 Jacob Lifshayadd tests for carry/overflow calculation of addmeo...
2022-10-28 Jacob Lifshayformat code
2022-10-28 Luke Kenneth... dsld: MASK(0, 63-n) works just as well as MASK(64,...
2022-10-28 Luke Kenneth... overflow condition in dsld and dsrd if RS is non-zero
2022-10-28 Luke Kenneth... fix dsrd pseudocode to use ROTL64 not ROTL128
2022-10-28 Luke Kenneth... fix dsld pseudocode to use ROTL64 instead of ROTL128
2022-10-28 Luke Kenneth... add test showing that dsld and dsrd are not quite inverses
2022-10-28 Jacob Lifshayupdate csvs to match make output
2022-10-28 Jacob Lifshayfix bigint shift tests
2022-10-28 Luke Kenneth... fix dsrd, ROTL128 use 128-n not 64-n,
2022-10-28 Luke Kenneth... redo sv_analysis for dsld/dsrd
2022-10-28 Luke Kenneth... fix dsrd pseudocode for new 3-in 2-out
2022-10-28 Luke Kenneth... sort out dsld pseudocode, creating mask is tricky
2022-10-28 Luke Kenneth... endeavouring to implement shift-carry-dsld
2022-10-28 Luke Kenneth... restore Z23 shadd/shadduw
2022-10-28 Luke Kenneth... redo the 3-in 1-out move of dsld/dsrd to EXT04 VA2...
2022-10-28 Luke Kenneth... first cut pseudocode for dsld/dsrd to be 3-in 1-out,
2022-10-27 Luke Kenneth... add test for identifying [expr] * name in parser
2022-10-27 Dmitry Selyutinpower_enums: support shadd/shadduw instructions
2022-10-27 Dmitry Selyutinisa/caller.py: support shadd/shadduw instructions
2022-10-27 Luke Kenneth... https://bugs.libre-soc.org/show_bug.cgi?id=966#c4
2022-10-25 Luke Kenneth... code-comments on divmod2du and maddedu are wrong
2022-10-25 Luke Kenneth... comments
2022-10-25 Luke Kenneth... shadd pseudocode cleanup
2022-10-25 Dmitry Selyutinpysvp64asm: support shadd/shadduw instructions
2022-10-25 Dmitry Selyutinpysvp64asm: introduce more flexible Z23 wrapper
2022-10-25 Dmitry Selyutintest_pysvp64dis: test shadd/shadduw instructions
2022-10-25 Dmitry Selyutinbitmanip.mdwn: support shadd/shadduw instructions
2022-10-25 Dmitry Selyutinminor_4.csv: support shadd/shadduw instructions
2022-10-24 Luke Kenneth... add maxs. combined with cmp capability
2022-10-23 Luke Kenneth... use svshape2 instead of svindex for the 4th shape
2022-10-22 Luke Kenneth... add extra pysvp64dis tests for divmod2du and maddedu
2022-10-22 Luke Kenneth... argh, extremely annoying: 4-operand dsld/dsrd is not...
2022-10-22 Luke Kenneth... remove redundant case_dsrd3
2022-10-22 Luke Kenneth... bigint shuffle
2022-10-22 Jacob Lifshayfix get_masked_reg and add test
2022-10-22 Jacob Lifshayformat code removing unused imports
2022-10-21 Luke Kenneth... code-comments
2022-10-21 Luke Kenneth... add 2nd outer loop, CTR 2 rounds, in chacha20 test
2022-10-21 Luke Kenneth... move chacha20 to separate test, set/get masked regs...
2022-10-21 Luke Kenneth... move HASK, ROTL32, ROTL64, MASK32, into helper class
2022-10-21 Luke Kenneth... use XLEN/2 for ROTL32 in fixedshift.mdwn
2022-10-20 Luke Kenneth... comments
2022-10-20 Luke Kenneth... add first chacha20 round test
2022-10-19 Dmitry Selyutinsv_binutils_fptrans: fix registers generation
2022-10-19 Dmitry Selyutinav.mdwn: fix missing bmask operand
2022-10-19 Luke Kenneth... TODO, sort out remap indices order
2022-10-18 Jacob Lifshayadd test for scalar sv.maddedu
2022-10-18 Jacob Lifshayadd missing files to .gitignore
2022-10-17 Dmitry Selyutinav.mdwn: fix Rc-augmented cprop instruction
2022-10-16 Luke Kenneth... debug print correction
2022-10-16 Luke Kenneth... sigh, have to use yield from on get_out_map()
2022-10-16 Luke Kenneth... rewrite get_idx_out2 in ISACaller to split out
2022-10-16 Luke Kenneth... rewrite get_idx_out in ISACaller to split out
2022-10-16 Luke Kenneth... add unit test showing two svindex calls, found bugs,
2022-10-16 Luke Kenneth... code-shuffle, rework get_idx_in() to separate out the...
2022-10-14 Luke Kenneth... whoops missed an update MEM(EA...) in pifixedstore
2022-10-14 Dmitry Selyutinsv_binutils_fptrans: fix opcodes mode
2022-10-14 Dmitry Selyutinpower_insn: really skip sv. entries for PPC database
2022-10-14 Dmitry Selyutinsv_binutils_fptrans: generate all permutations
2022-10-14 Dmitry Selyutinpysvp64asm: fix coding style
2022-10-14 Dmitry Selyutinpower_insn: skip sv. instructions in PPC database
2022-10-14 Dmitry Selyutinpower_insn: fix AA match
2022-10-14 Dmitry Selyutinpower_insn: do not allow default records
2022-10-14 Luke Kenneth... add max-with-getting-index-of vertical-first loop example
2022-10-14 Konstantinos... small update in the max detection code
2022-10-14 Luke Kenneth... SVP64RMModeDecode detects Post-Inc LDST-imm mode
2022-10-14 Luke Kenneth... correct comments
2022-10-14 Luke Kenneth... add in zeroing on test strncpy
2022-10-14 Luke Kenneth... remove unneeded svstate from test
2022-10-14 Luke Kenneth... add strncpy example - 6 instructions
2022-10-14 Luke Kenneth... add sv.stwu/pi example in test_sv_load_store_postinc
2022-10-14 Luke Kenneth... add ld/st-immediate "post-inc" mode support. unit test...
2022-10-14 Luke Kenneth... add /pi to sv/trans/svp64.py and power_insns.py
2022-10-14 Luke Kenneth... add new LD-Immediate Post constants
2022-10-14 Konstantinos... first working version
2022-10-14 Konstantinos... increase buffer size, fix svp64 address for r5
2022-10-12 Luke Kenneth... add sv.divmod2du test, inverse of the sv.madded
2022-10-12 Luke Kenneth... comments clean-up on bigint big-mul case
2022-10-11 Luke Kenneth... whoops ea not ra in pifixedstore.mdwn
2022-10-11 Luke Kenneth... add Post-increment version of fixedstore.mdwn
2022-10-11 Luke Kenneth... add asciidump option to Mem class
2022-10-11 Luke Kenneth... whoops zero-error on masked-out
2022-10-11 Konstantinos... WIP: add initial AV1 SVP64 porting
2022-10-11 Konstantinos... move pypowersim_wrapper on its own
2022-10-11 Luke Kenneth... add experimental post-increment fixedload pseudocode
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