git.libre-soc.org Git - yosys.git/shortlog

2019-07-26	Eddie Hung	Allow adders/accumulators with 33 bits using CO output	commit \| commitdiff \| tree
2019-07-24	Eddie Hung	Add copyright header, comment on cascade	commit \| commitdiff \| tree
2019-07-23	Eddie Hung	Eliminate warnings by sizing O correctly	commit \| commitdiff \| tree
2019-07-23	Eddie Hung	Typo for Y_WIDTH	commit \| commitdiff \| tree
2019-07-23	Eddie Hung	Fix muxAB logic	commit \| commitdiff \| tree
2019-07-23	Eddie Hung	Remove debug print	commit \| commitdiff \| tree
2019-07-23	Eddie Hung	Simplify and fix for MACs	commit \| commitdiff \| tree
2019-07-23	Eddie Hung	Fix typo	commit \| commitdiff \| tree
2019-07-22	Eddie Hung	Fix spacing	commit \| commitdiff \| tree
2019-07-22	Eddie Hung	Remove debug	commit \| commitdiff \| tree
2019-07-22	Eddie Hung	Pack hi and lo registers separately	commit \| commitdiff \| tree
2019-07-22	Eddie Hung	SigSpec::extract() to return as many bits as poss if...	commit \| commitdiff \| tree
2019-07-22	Eddie Hung	Rename according to vendor doc TN1295	commit \| commitdiff \| tree
2019-07-22	Eddie Hung	Pack Y register	commit \| commitdiff \| tree
2019-07-22	Eddie Hung	opt and wreduce necessary for -dsp	commit \| commitdiff \| tree
2019-07-22	Eddie Hung	Pack adders not just accumulators	commit \| commitdiff \| tree
2019-07-22	Eddie Hung	Use minimum sized width wires	commit \| commitdiff \| tree
2019-07-20	Eddie Hung	Restore old ffY behaviour	commit \| commitdiff \| tree
2019-07-20	Eddie Hung	Cleanup	commit \| commitdiff \| tree
2019-07-20	Eddie Hung	Indirection via $__soft_mul	commit \| commitdiff \| tree
2019-07-19	Eddie Hung	Do not do sign extension in techmap; let packer do it	commit \| commitdiff \| tree
2019-07-19	Eddie Hung	Merge remote-tracking branch 'origin/eddie/wreduce_add...	commit \| commitdiff \| tree
2019-07-19	Eddie Hung	Add another test	commit \| commitdiff \| tree
2019-07-19	Eddie Hung	Do not access beyond bounds	commit \| commitdiff \| tree
2019-07-19	Eddie Hung	Add an SigSpec::at(offset, defval) convenience method	commit \| commitdiff \| tree
2019-07-19	Eddie Hung	Wrap A and B in sigmap	commit \| commitdiff \| tree
2019-07-19	Eddie Hung	Remove "top" from message	commit \| commitdiff \| tree
2019-07-19	Eddie Hung	Merge remote-tracking branch 'origin/eddie/wreduce_add...	commit \| commitdiff \| tree
2019-07-19	Eddie Hung	Also optimise MSB of $sub	commit \| commitdiff \| tree
2019-07-19	Eddie Hung	Add one more test with trimming Y_WIDTH of $sub	commit \| commitdiff \| tree
2019-07-19	Eddie Hung	Be more explicit	commit \| commitdiff \| tree
2019-07-19	Eddie Hung	wreduce for $sub	commit \| commitdiff \| tree
2019-07-19	Eddie Hung	Add tests for sub too	commit \| commitdiff \| tree
2019-07-19	Eddie Hung	Add test	commit \| commitdiff \| tree
2019-07-19	Eddie Hung	SigSpec::extract to take negative lengths	commit \| commitdiff \| tree
2019-07-19	Eddie Hung	Do not $mul -> $__mul if A and B are less than maxwidth	commit \| commitdiff \| tree
2019-07-19	Eddie Hung	Add DSP_MINWIDTH=11 for ice40 since ice40_dsp uses...	commit \| commitdiff \| tree
2019-07-19	Eddie Hung	Add a DSP_MINWIDTH macro, and soft-logic for {A_WIDTH...	commit \| commitdiff \| tree
2019-07-19	Eddie Hung	Fine tune ice40_dsp.pmg, add support for packing subset...	commit \| commitdiff \| tree
2019-07-19	Eddie Hung	Add support for ice40 signed multipliers	commit \| commitdiff \| tree
2019-07-19	Eddie Hung	Merge branch 'xc7dsp' into ice40dsp	commit \| commitdiff \| tree
2019-07-19	Eddie Hung	Fix typo in B	commit \| commitdiff \| tree
2019-07-19	Eddie Hung	Merge remote-tracking branch 'origin/eddie/signed_ice40...	commit \| commitdiff \| tree
2019-07-19	David Shah	ice40: Fix test_dsp_model.sh	commit \| commitdiff \| tree
2019-07-19	David Shah	ice40/cells_sim.v: Fix sign of J and K partial products	commit \| commitdiff \| tree
2019-07-19	Eddie Hung	Use sign_headroom instead	commit \| commitdiff \| tree
2019-07-19	David Shah	ice40/cells_sim.v: LSB of A/B only signed in 8x8 mode	commit \| commitdiff \| tree
2019-07-19	Eddie Hung	Add tests for all combinations of A and B signedness...	commit \| commitdiff \| tree
2019-07-19	Eddie Hung	Don't copy ref if exists already	commit \| commitdiff \| tree
2019-07-19	Eddie Hung	Fix SB_MAC sim model -- do not sign extend internal...	commit \| commitdiff \| tree
2019-07-19	Eddie Hung	Add params	commit \| commitdiff \| tree
2019-07-19	Eddie Hung	Merge remote-tracking branch 'origin/master' into ice40dsp	commit \| commitdiff \| tree
2019-07-19	Eddie Hung	Merge remote-tracking branch 'origin/master' into xc7dsp	commit \| commitdiff \| tree
2019-07-18	Eddie Hung	Do not define `DSP_SIGNEDONLY macro if no exists	commit \| commitdiff \| tree
2019-07-18	Eddie Hung	Merge remote-tracking branch 'origin/master' into ice40dsp	commit \| commitdiff \| tree
2019-07-18	Eddie Hung	ice40_dsp to accept $__MUL16X16 too	commit \| commitdiff \| tree
2019-07-18	Eddie Hung	synth_ice40 to decompose into 16x16	commit \| commitdiff \| tree
2019-07-18	Eddie Hung	mul2dsp to create cells that can be interchanged with...	commit \| commitdiff \| tree
2019-07-18	Eddie Hung	Check if RHS is empty first	commit \| commitdiff \| tree
2019-07-18	Eddie Hung	Make consistent	commit \| commitdiff \| tree
2019-07-18	Eddie Hung	Do not autoremove ffP aor muxP	commit \| commitdiff \| tree
2019-07-18	Eddie Hung	Improve pattern matcher to match subsets of $dffe?...	commit \| commitdiff \| tree
2019-07-18	Eddie Hung	Improve A/B reg packing	commit \| commitdiff \| tree
2019-07-18	Eddie Hung	Do not autoremove A/B registers since they might have...	commit \| commitdiff \| tree
2019-07-18	Eddie Hung	Fix xilinx_dsp index cast	commit \| commitdiff \| tree
2019-07-18	Eddie Hung	Fix signed multiplier decomposition	commit \| commitdiff \| tree
2019-07-18	Eddie Hung	Use single DSP_SIGNEDONLY macro	commit \| commitdiff \| tree
2019-07-18	David Shah	Merge pull request #1208 from ZirconiumX/intel_cleanups	commit \| commitdiff \| tree
2019-07-18	Dan Ravensloft	synth_intel: Use stringf	commit \| commitdiff \| tree
2019-07-18	Eddie Hung	Working for unsigned	commit \| commitdiff \| tree
2019-07-18	David Shah	Merge pull request #1207 from ZirconiumX/intel_new_pass...	commit \| commitdiff \| tree
2019-07-18	Dan Ravensloft	synth_intel: s/not family/no family/	commit \| commitdiff \| tree
2019-07-18	Eddie Hung	Cleanup	commit \| commitdiff \| tree
2019-07-18	Dan Ravensloft	synth_intel: revert change to run_max10	commit \| commitdiff \| tree
2019-07-18	Ben Widawsky	intel_synth: Fix help message	commit \| commitdiff \| tree
2019-07-18	Ben Widawsky	intel_synth: Small code cleanup to remove if ladder	commit \| commitdiff \| tree
2019-07-18	Ben Widawsky	intel_synth: Make family explicit and match	commit \| commitdiff \| tree
2019-07-18	Ben Widawsky	intel_synth: Minor code cleanups	commit \| commitdiff \| tree
2019-07-18	Dan Ravensloft	synth_intel: rename for consistency with #1184	commit \| commitdiff \| tree
2019-07-18	Eddie Hung	Wrong wildcard symbol	commit \| commitdiff \| tree
2019-07-18	Eddie Hung	Merge branch 'xc7dsp' of github.com:YosysHQ/yosys into...	commit \| commitdiff \| tree
2019-07-18	Clifford Wolf	Merge pull request #1184 from whitequark/synth-better...	commit \| commitdiff \| tree
2019-07-18	Clifford Wolf	Merge pull request #1203 from whitequark/write_verilog...	commit \| commitdiff \| tree
2019-07-18	David Shah	mul2dsp: Lower partial products always have unsigned...	commit \| commitdiff \| tree
2019-07-17	Eddie Hung	Make all operands signed	commit \| commitdiff \| tree
2019-07-17	Eddie Hung	Update comment	commit \| commitdiff \| tree
2019-07-17	Eddie Hung	Pattern matcher to check pool of bits, not exactly	commit \| commitdiff \| tree
2019-07-17	Eddie Hung	Fix mul2dsp signedness	commit \| commitdiff \| tree
2019-07-17	Eddie Hung	A_SIGNED == B_SIGNED so flip both	commit \| commitdiff \| tree
2019-07-17	Eddie Hung	SigSpec::remove_const() to return SigSpec&	commit \| commitdiff \| tree
2019-07-17	Clifford Wolf	Remove old $pmux_safe code from write_verilog	commit \| commitdiff \| tree
2019-07-17	David Shah	Merge pull request #1204 from smunaut/fix_1187	commit \| commitdiff \| tree
2019-07-16	Eddie Hung	Add DSP_{A,B}_SIGNEDONLY macro	commit \| commitdiff \| tree
2019-07-16	Eddie Hung	Signedness	commit \| commitdiff \| tree
2019-07-16	Eddie Hung	Signed extension	commit \| commitdiff \| tree
2019-07-16	Sylvain Munaut	ice40: Adapt the relut process passes to the new $lut...	commit \| commitdiff \| tree
2019-07-16	Eddie Hung	Revert drop down to 24x16 multipliers for all	commit \| commitdiff \| tree
2019-07-16	Eddie Hung	Merge branch 'xc7dsp' of github.com:YosysHQ/yosys into...	commit \| commitdiff \| tree
2019-07-16	Eddie Hung	Add support {A,B,P}REG packing	commit \| commitdiff \| tree
2019-07-16	Eddie Hung	SigSpec::extract to allow negative length	commit \| commitdiff \| tree
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