yosys.git
2015-04-07 Clifford Wolftypo fix
2015-04-07 Clifford WolfAdded "chparam" command
2015-04-06 Clifford WolfAdded support for initialized xilinx brams
2015-04-06 Clifford WolfAdded support for initialized brams
2015-04-06 Clifford WolfAdded Xilinx test case for initialized brams
2015-04-06 Clifford WolfAdded Xilinx bram black-box modules
2015-04-05 Clifford WolfAdded "port_directions" to write_json output
2015-04-05 Clifford WolfAvoid parameter values with size 0 ($mem cells)
2015-04-05 Clifford Wolfmake all vector-size related integer params in $mem...
2015-04-05 Clifford WolfAdded $_MUX4_, $_MUX8_, and $_MUX16_ cell types
2015-04-04 Clifford WolfAdded "dffinit", Support for initialized Xilinx DFF
2015-04-04 Clifford WolfAdded "init" attribute support to verilog backend
2015-04-04 Clifford Wolfappnote 012 fix
2015-04-04 Clifford WolfAppnote 012
2015-04-04 Clifford WolfUpdated ABC to 51705b168d7a
2015-04-04 Clifford WolfMerge pull request #55 from ahmedirfan1983/master
2015-04-03 Ahmed IrfanUpdate README
2015-04-03 Ahmed IrfanDelete btor.ys
2015-04-03 Ahmed IrfanUpdate README
2015-04-03 Ahmed Irfanseparated memory next from write cell
2015-04-03 Ahmed IrfanMerge branch 'master' of https://github.com/cliffordwol...
2015-04-03 Ahmed IrfanMerge branch 'btor' of https://github.com/ahmedirfan198...
2015-04-03 Ahmed Irfanappnote for verilog to btor
2015-03-29 Clifford Wolfdocumentation improvements
2015-03-25 Clifford WolfIgnore celldefine directive in verilog front-end
2015-03-25 Clifford WolfFixes in cmos_cells.v
2015-03-22 Clifford WolfFixed detection of absolute paths in ABC for win32
2015-03-22 Clifford WolfAdded blif reference to appnote 010
2015-03-20 Clifford WolfMerge branch 'master' of github.com:cliffordwolf/yosys
2015-03-20 Clifford Wolffix for python 2.6.6
2015-03-18 Clifford WolfFixed handling of quotes in liberty parser
2015-03-18 Clifford WolfAdded hierarchy -auto-top
2015-03-18 Clifford WolfAdded Verilog backend $dffsr support
2015-03-06 Clifford WolfDocumentation for JSON format, added attributes
2015-03-05 Clifford WolfAdded very first version of "synth_ice40"
2015-03-04 Clifford WolfFixed bug in "hierarchy" for parametric designs
2015-03-03 Clifford WolfJson bugfix
2015-03-03 Clifford WolfJson backend improvements
2015-03-02 Clifford WolfAdded write_blif -attr
2015-03-02 Clifford WolfAdded JSON backend
2015-03-01 Clifford WolfConst-fold parameter defs on-demand in AstNode::detectS...
2015-02-26 Clifford WolfAdded $assume support to write_smt2
2015-02-26 Clifford WolfAdded non-std verilog assume() statement
2015-02-26 Clifford WolfAdded $assume cell type
2015-02-25 Clifford WolfMerge branch 'master' of github.com:cliffordwolf/yosys
2015-02-25 Clifford WolfBugfix in iopadmap
2015-02-25 Clifford WolfAdded "keep_hierarchy" attribute
2015-02-24 Clifford WolfSome cleanups in "clean"
2015-02-24 Clifford WolfFixed compilation problems with gcc 4.6.3; use enum...
2015-02-22 Clifford WolfMinor "write_smt2" help msg change
2015-02-22 Clifford WolfFixed "check -assert"
2015-02-22 Clifford WolfAdded "<mod>_a" and "<mod>_i" to write_smt2 output
2015-02-22 Clifford WolfAdded "check -assert" doc
2015-02-22 Clifford WolfAdded "check -assert"
2015-02-22 Clifford WolfFixed "sat -initsteps" off-by-one bug
2015-02-21 Clifford WolfAdded "sat -stepsize" and "sat -tempinduct-step"
2015-02-21 Clifford Wolfsat docu change
2015-02-21 Clifford WolfWhen "sat -tempinduct-baseonly -maxsteps N" reaches...
2015-02-21 Clifford WolfAdded "sat -tempinduct-baseonly -tempinduct-inductonly"
2015-02-21 Clifford WolfFixed basecase init for "sat -tempinduct"
2015-02-21 Clifford WolfFixed "flatten" for non-pre-derived modules
2015-02-21 Clifford WolfHotfix for yosysjs/demo03.html
2015-02-21 Clifford WolfYosysJS: Wait for Viz to load
2015-02-21 Clifford WolfReplaced ezDefaultSAT with ezSatPtr
2015-02-21 Clifford WolfCatch constants assigned to cell outputs in "flatten"
2015-02-20 Clifford WolfAdded deep recursion warning to AST simplify
2015-02-20 Clifford WolfParser support for complex delay expressions
2015-02-19 Clifford WolfYosysJS firefox fixes
2015-02-19 Clifford WolfYosysJS stuff
2015-02-19 Clifford Wolfformat fixes in "sat -dump_json"
2015-02-19 Clifford WolfAdded "sat -dump_json" (WaveJSON format)
2015-02-19 Clifford WolfChanged "show" defaults for Win32
2015-02-18 Clifford WolfConvert floating point cell parameters to strings
2015-02-18 Clifford WolfFixed clang (svn trunk) warnings
2015-02-18 Clifford WolfMerge branch 'master' of github.com:cliffordwolf/yosys
2015-02-18 Clifford WolfAdded "select %xe %cie %coe"
2015-02-17 Clifford Wolfwreduce help typo fix
2015-02-17 Clifford WolfCodingReadme
2015-02-16 Clifford WolfYosysJS fixes for firefox
2015-02-16 Clifford WolfMore YosysJS stuff
2015-02-16 Clifford WolfAdded YosysJS wrapper
2015-02-16 Clifford WolfBugfix in wreduce
2015-02-15 Clifford WolfMore yosys.js improvements
2015-02-15 Clifford WolfAdded Viz to yosys.js
2015-02-15 Clifford WolfAdded yosys.js FS support
2015-02-15 Clifford WolfMore emcc stuff
2015-02-15 Clifford WolfImproved yosys.js example
2015-02-15 Clifford WolfAdded "stat" to "synth" and "synth_xilinx"
2015-02-15 Clifford WolfAdded final checks to "synth" and "synth_xilinx"
2015-02-15 Clifford WolfAdded "check -noinit"
2015-02-15 Clifford WolfCosmetic fixes in "hierarchy" for blackbox modules
2015-02-15 Clifford WolfMore emscripten stuff, Added example app
2015-02-15 Clifford WolfFixed default EMCCFLAGS
2015-02-14 Clifford WolfSmaller default parameters in $mem simlib model
2015-02-14 Clifford WolfFixed "stat" handling of blackbox modules
2015-02-14 Clifford WolfVarious fixes for memories with offsets
2015-02-14 Clifford WolfAdded $meminit support to "memory" command
2015-02-14 Clifford WolfAdded $meminit test case
2015-02-14 Clifford WolfAdded "read_verilog -nomeminit" and "nomeminit" attribute
2015-02-14 Clifford WolfCreating $meminit cells in verilog front-end
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