yosys.git
2019-02-28 Eddie HungAdd techmap rule for $__SHREG_DFF_P_ to SRL16/32
2019-02-24 Clifford WolfMinor changes ontop of 71bcc4c: Remove hierarchy warnin...
2019-02-24 Clifford WolfMerge pull request #812 from ucb-bar/arrayhierarchyfixes
2019-02-24 Clifford WolfCleanups in ARST handling in wreduce
2019-02-24 Clifford WolfMerge pull request #824 from litghost/fix_reduce_on_ff
2019-02-24 Clifford WolfFix handling of defparam for when default_nettype is...
2019-02-24 Clifford WolfCheck if Verific was built with DB_PRESERVE_INITIAL_VALUE
2019-02-23 Jim LawsonAddress requested changes - don't require non-$ name.
2019-02-22 Keith RothmanFix WREDUCE on FF not fixing ARST_VALUE parameter.
2019-02-22 Clifford WolfMerge pull request #819 from YosysHQ/clifford/optd
2019-02-22 Clifford WolfMerge pull request #820 from YosysHQ/clifford/fix810
2019-02-22 Clifford WolfMerge pull request #740 from daveshah1/improve_dress
2019-02-21 Clifford WolfFix Travis
2019-02-21 Clifford WolfHotfix for 4c82ddf
2019-02-21 Clifford WolfMerge pull request #822 from litghost/expand_setundef
2019-02-21 Keith RothmanAdd -params mode to force undef parameters in selected...
2019-02-21 Clifford WolfMerge pull request #818 from YosysHQ/clifford/dffsrfix
2019-02-21 Clifford WolfMerge pull request #786 from YosysHQ/pmgen
2019-02-21 Clifford WolfFix typo in passes/pmgen/README.md
2019-02-21 Clifford WolfMerge pull request #821 from eddiehung/dff_init
2019-02-21 Clifford WolfFixes related to handling of autowires and upto-ranges...
2019-02-21 Eddie HungRevert "Add -B option to autotest.sh to append to backe...
2019-02-21 Clifford WolfFix handling of expression width in $past, fixes #810
2019-02-21 Clifford WolfFix segfault in printing of some internal error messages
2019-02-21 Clifford WolfRename "yosys -U" to "yosys -P" to avoid confusion...
2019-02-21 Clifford WolfRename "yosys -D" to "yosys -U", add "yosys -D" with...
2019-02-21 Clifford WolfFix opt_rmdff handling of $_DFFSR_???_ and $_DLATCHSR_...
2019-02-21 Clifford WolfBugfix in ice40_dsp
2019-02-21 Eddie HungMerge pull request #817 from eddiehung/dff_init
2019-02-20 Eddie HungRemove simple_defparam tests
2019-02-20 Clifford WolfAdd ice40 test_dsp_map test case generator
2019-02-20 Clifford WolfAdd "synth_ice40 -dsp"
2019-02-20 Clifford WolfAdd FF support to wreduce
2019-02-20 Clifford WolfImprove iCE40 SB_MAC16 model
2019-02-20 Clifford WolfDetect and reject cases that do not map well to iCE40...
2019-02-19 Jim LawsonFix normal (non-array) hierarchy -auto-top.
2019-02-19 Eddie HungMerge pull request #805 from eddiehung/dff_init
2019-02-19 Clifford WolfAdd first draft of functional SB_MAC16 model
2019-02-17 Eddie HungInstead of INIT param on cells, use initial statement...
2019-02-17 Eddie HungRevert "Add INIT parameter to all ff/latch cells"
2019-02-17 Eddie HungMerge https://github.com/YosysHQ/yosys into dff_init
2019-02-17 Clifford WolfAdd actual DSP inference to ice40_dsp pass
2019-02-17 Clifford WolfMerge branch 'master' of github.com:YosysHQ/yosys into...
2019-02-17 Clifford WolfMerge pull request #811 from ucb-bar/firrtlfixes
2019-02-15 Jim LawsonRemoved unused variables, functions.
2019-02-15 Jim LawsonAppend (instead of over-writing) EXTRA_FLAGS
2019-02-15 Jim LawsonDefine basic_cell_type() function and use it to derive...
2019-02-15 Jim LawsonUpdate cells supported for verilog to FIRRTL conversion.
2019-02-13 Clifford WolfFix sign handling of real constants
2019-02-12 Clifford WolfMerge pull request #802 from whitequark/write_verilog_a...
2019-02-12 Clifford WolfMerge pull request #806 from daveshah1/fsm_opt_no_reset
2019-02-07 David Shahfsm_opt: Fix runtime error for FSMs without a reset...
2019-02-06 Eddie HungCope WIDTH of ff/latch cells is default of zero
2019-02-06 Eddie HungRemove check for cell->name[0] == '$'
2019-02-06 Eddie HungRefactor
2019-02-06 Eddie Hungwrite_verilog to cope with init attr on q when -noexpr
2019-02-06 Eddie HungAdd INIT parameter to all ff/latch cells
2019-02-06 Eddie HungAdd tests for simple cases using defparam
2019-02-06 Eddie HungAdd -B option to autotest.sh to append to backend_opts
2019-02-06 Eddie HungExtend testcase
2019-02-06 David Shahecp5: Use abc -dress
2019-02-06 David Shahabc: Improved recovered netnames, also preserve src...
2019-02-06 David Shahice40: Use abc -dress in synth_ice40
2019-02-06 David Shahabc: Preserve naming through ABC using 'dress' command
2019-02-06 Eddie HungAdd testcase
2019-02-06 Clifford WolfAdd missing blackslash-to-slash convertion to smtio...
2019-01-29 whitequarkwrite_verilog: correctly emit asynchronous transparent...
2019-01-27 Clifford WolfMerge pull request #798 from mmicko/master
2019-01-27 Clifford WolfMerge pull request #800 from whitequark/write_verilog_t...
2019-01-27 Clifford WolfMerge branch 'whitequark-write_verilog_keyword'
2019-01-27 Clifford WolfRemove asicworld tests for (unsupported) switch-level...
2019-01-27 whitequarkwrite_verilog: write $tribuf cell as ternary.
2019-01-27 whitequarkwrite_verilog: escape names that match SystemVerilog...
2019-01-25 David ShahMerge pull request #796 from whitequark/proc_clean_typo
2019-01-25 Miodrag MilanovicFixed Anlogic simulation model
2019-01-23 whitequarkproc_clean: fix critical typo.
2019-01-19 Clifford WolfMerge pull request #793 from whitequark/proc_clean_fix_...
2019-01-18 whitequarkproc_clean: fix fully def check to consider compare...
2019-01-17 Clifford WolfCleanups in igloo2 example design
2019-01-17 Clifford WolfAdd SF2 IO buffer insertion
2019-01-17 Clifford WolfImprove Igloo2 example
2019-01-17 Clifford WolfAdd "synth_sf2 -vlog", fix "synth_sf2 -edif"
2019-01-17 Clifford WolfAdd "write_edif -gndvccy"
2019-01-15 Clifford WolfProgress in pmgen
2019-01-15 Clifford WolfProgress in pmgen, add pmgen README
2019-01-15 Clifford WolfFix pmgen "reject" statement
2019-01-15 Clifford WolfProgress in pmgen
2019-01-15 Clifford WolfProgress in pmgen
2019-01-15 Clifford WolfProgress in pmgen
2019-01-15 Clifford WolfAdd mockup .pmg (pattern matcher generator) file
2019-01-15 Clifford WolfAdd optional nullstr argument to log_id()
2019-01-15 Clifford WolfFix handling of $shiftx in Verilog back-end
2019-01-15 Clifford WolfMerge pull request #788 from whitequark/master
2019-01-15 Clifford WolfMerge pull request #787 from whitequark/flowmap_relax
2019-01-14 whitequarkmanual: document some gates.
2019-01-14 whitequarkmanual: explain $tribuf cell.
2019-01-08 Clifford WolfImprove igloo2 example
2019-01-08 whitequarkflowmap: clean up terminology.
2019-01-08 whitequarkflowmap: implement depth relaxation.
2019-01-07 Clifford WolfFix typo in manual
next