microwatt.git
2019-09-19 Anton BlanchardMerge pull request #65 from antonblanchard/loadstore-opt
2019-09-19 Anton BlanchardReformat loadstore1
2019-09-19 Anton BlanchardReformat loadstore2
2019-09-19 Anton Blanchardloads don't do both byte reversal and sign extension
2019-09-19 Anton BlanchardMerge pull request #64 from antonblanchard/reformat-3
2019-09-19 Anton BlanchardMerge pull request #63 from antonblanchard/multiply...
2019-09-19 Anton BlanchardReformat wishbone code
2019-09-19 Anton BlanchardReformat glibc_random
2019-09-19 Anton BlanchardReformat simple_ram_behavioural
2019-09-19 Anton BlanchardReformat sim_console
2019-09-19 Anton BlanchardReformat multiply_tb
2019-09-19 Anton BlanchardReformat execute2
2019-09-19 Anton BlanchardReformat CR file
2019-09-19 Anton BlanchardReformat register file
2019-09-19 Anton BlanchardReformat multiply code
2019-09-19 Anton BlanchardDon't use VHDL 2008 condition operator in multiply
2019-09-16 Anton BlanchardMerge pull request #62 from antonblanchard/byte-reverse...
2019-09-16 Anton BlanchardMerge pull request #61 from antonblanchard/execute...
2019-09-16 Anton BlanchardMove byte reversal of stores to first cycle
2019-09-16 Anton Blanchardexecute1 no longer needs sim_console
2019-09-15 Anton BlanchardMerge pull request #60 from antonblanchard/testbenches
2019-09-15 Anton BlanchardFix multiply_tb
2019-09-15 Anton BlanchardAdd an icache testbench
2019-09-15 Anton BlanchardMerge pull request #56 from antonblanchard/writeback...
2019-09-15 Anton BlanchardRemove cycle in writeback
2019-09-15 Anton BlanchardMerge pull request #59 from antonblanchard/trap-decode
2019-09-15 Anton BlanchardMerge pull request #58 from antonblanchard/decode2...
2019-09-15 Anton BlanchardFix make check
2019-09-15 Anton BlanchardFix spurious outstanding assert
2019-09-15 Anton BlanchardMerge pull request #57 from antonblanchard/add-nop
2019-09-15 Anton BlanchardAdd a decode for the nop instruction
2019-09-15 Anton BlanchardMerge pull request #55 from antonblanchard/fetch-fix
2019-09-15 Anton BlanchardAdd a default value for RESET_ADDRESS
2019-09-14 Anton BlanchardMerge pull request #51 from antonblanchard/writeback-fix
2019-09-14 Anton BlanchardReformat writeback.vhdl
2019-09-14 Anton BlanchardExit if we try to write more than one GPR or CR in...
2019-09-12 Anton BlanchardMerge pull request #50 from antonblanchard/decode1-opt
2019-09-12 Anton BlanchardNo need to gate nia or insn in decode1
2019-09-12 Anton BlanchardMerge pull request #49 from antonblanchard/icache-2
2019-09-12 Anton BlanchardAdd a simple direct mapped icache
2019-09-12 Anton BlanchardSOC memory wishbone should clear ACK regardless of STB
2019-09-12 Anton BlanchardMerge pull request #48 from antonblanchard/clk_gen_bypass
2019-09-12 Anton BlanchardFix clk_gen_bypass
2019-09-11 Anton BlanchardMerge pull request #47 from antonblanchard/if-fix
2019-09-11 Anton BlanchardMerge pull request #46 from antonblanchard/record-fix
2019-09-11 Anton BlanchardExplicitly check against '1' in if statements
2019-09-11 Anton BlanchardRemove names from end record statements
2019-09-11 Anton BlanchardMerge pull request #45 from antonblanchard/fixes
2019-09-11 Anton BlanchardFix issue in loadstore1
2019-09-11 Anton BlanchardFix issue in execute2
2019-09-11 Anton BlanchardMerge pull request #44 from antonblanchard/nia-remove
2019-09-11 Anton BlanchardRemove nia from loadstore and multiply
2019-09-11 Anton BlanchardMerge pull request #43 from mikey/trivial
2019-09-11 Michael NeulingRemove FIXME comment
2019-09-11 Anton BlanchardMerge pull request #41 from mikey/travis
2019-09-11 Anton BlanchardMerge pull request #42 from antonblanchard/fetch-rework-v2
2019-09-11 Anton BlanchardReformat core.vhdl
2019-09-11 Anton BlanchardRemove sim console
2019-09-11 Anton BlanchardReduce multiply to 2 cycles
2019-09-11 Anton BlanchardRegister outputs on writeback
2019-09-11 Anton BlanchardRegister outputs on execute2
2019-09-11 Anton BlanchardRegister outputs on loadstore1
2019-09-11 Anton BlanchardMove debug execute output into decode2
2019-09-11 Anton BlanchardRework pipeline, add stall and flush signals
2019-09-11 Michael NeulingAllow a full make check on Travis
2019-09-10 Anton BlanchardMerge pull request #40 from antonblanchard/makefile...
2019-09-10 Anton BlanchardUpdate Makefile dependencies
2019-09-10 Benjamin HerrenschmidtSwitch soc to use std_ulogic
2019-09-10 Benjamin HerrenschmidtShare soc.vhdl between FPGA and sim
2019-09-10 Benjamin HerrenschmidtPass wishbone record to bram memory module
2019-09-10 Benjamin HerrenschmidtRework wishbone slave address decoding
2019-09-10 Benjamin HerrenschmidtMove wishbone arbiter out of the core
2019-09-10 Benjamin HerrenschmidtRe-indent and reformat soc.vhdl
2019-09-10 Benjamin HerrenschmidtSplit FPGA toplevel from soc
2019-09-10 Anton BlanchardMerge pull request #39 from antonblanchard/no-x-state
2019-09-10 Anton BlanchardDon't send out X state from the memory behavioural
2019-09-10 Anton BlanchardMerge pull request #36 from mikey/gitignore
2019-09-10 Anton BlanchardMerge pull request #38 from antonblanchard/multiply...
2019-09-10 Anton BlanchardQuieten multiply warning
2019-09-10 Michael NeulingAdd new files to git ignore
2019-09-09 Anton BlanchardMerge pull request #35 from antonblanchard/multiply-opt
2019-09-09 Anton BlanchardSimplify multiply
2019-09-09 Anton BlanchardMerge pull request #34 from antonblanchard/decode-table
2019-09-09 Anton BlanchardAdd a decode bit to mark an instruction as single throu...
2019-09-09 Benjamin Herrenschmidtdecode1 array fix header
2019-09-09 Anton BlanchardMerge pull request #33 from antonblanchard/cr-fix
2019-09-09 Anton BlanchardMerge pull request #32 from antonblanchard/register...
2019-09-09 Benjamin HerrenschmidtUse simulated UART in core test bench
2019-09-09 Benjamin HerrenschmidtMake sim poll non-blocking
2019-09-09 Benjamin HerrenschmidtAdd simulated UART design
2019-09-09 Anton BlanchardFix CR forwarding
2019-09-09 Anton BlanchardAdd forwarding in the register file
2019-09-09 Anton BlanchardMerge pull request #31 from antonblanchard/no-second...
2019-09-09 Anton BlanchardMerge pull request #30 from antonblanchard/writeback...
2019-09-09 Anton BlanchardMore second write port removal
2019-09-09 Anton BlanchardAdd some assertions to writeback
2019-09-09 Anton BlanchardMerge pull request #29 from antonblanchard/no-second...
2019-09-09 Anton BlanchardMerge pull request #28 from antonblanchard/loadstore...
2019-09-09 Anton BlanchardRemove second write port
2019-09-09 Anton BlanchardRemove some more loadstore debug
next