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gem5.git
2020-10-22 Yu-hsin Wangconfigs: Fix FastmodelCluster cpu initialization commit | commitdiff | tree
2020-10-21 Gabe Blackmisc: Fix a few accidental transitive includes. commit | commitdiff | tree
2020-10-21 Gabe Blacksim: Implement optParamIn using paramIn. commit | commitdiff | tree
2020-10-21 Giacomo Travagliniarch: Use getTlb in BaseMMU to reduce boilerplate commit | commitdiff | tree
2020-10-21 Giacomo Travagliniarch-arm: Replace any getDTBPtr/getITBPtr usage commit | commitdiff | tree
2020-10-21 Giacomo Travaglinicpu: Remove unused demapInstPage and demapDataPage commit | commitdiff | tree
2020-10-21 Giacomo Travaglinimisc: BaseCPU using ArchMMU instead of ArchDTB/ArchITB commit | commitdiff | tree
2020-10-20 Jason Lowe... cpu-kvm, arch-x86: Fix KVM on Intel platforms commit | commitdiff | tree
2020-10-20 Giacomo Travaglinidev-arm: Adding a SRAM in VExpress_GEM5_V1 commit | commitdiff | tree
2020-10-20 Hoa Nguyenscons: Raise an exception when scons is run a Python2... commit | commitdiff | tree
2020-10-19 Jason Lowe... misc: Minor updates to CONTRIBUTING.md commit | commitdiff | tree
2020-10-19 Gabe Blackmisc: Wrap __attribute__((aligned())) in a macro in... commit | commitdiff | tree
2020-10-19 Gabe Blackmisc: Use compiler.hh macros when available. commit | commitdiff | tree
2020-10-17 Giacomo Travagliniarch-arm: Implement ArmPMU DTB generation commit | commitdiff | tree
2020-10-17 Giacomo Travaglinidev: Use generateFdtProperty in the PioDevice commit | commitdiff | tree
2020-10-17 Giacomo Travaglinidev-arm: Use generateFdtProperty in the GenericTimer commit | commitdiff | tree
2020-10-17 Giacomo Travaglinidev-arm: Automate FdtProperty generation with ArmInterr... commit | commitdiff | tree
2020-10-17 Giacomo Travaglinidev-arm, fastmodel: Rewrite Gic.interruptCells commit | commitdiff | tree
2020-10-17 Giacomo Travaglinidev-arm: Define ArmInterruptType commit | commitdiff | tree
2020-10-17 Matthew Porembaconfigs: Make GPU_VIPER config python3 friendly commit | commitdiff | tree
2020-10-16 Kyle Roartyconfigs: python3 compatibility for apu_se commit | commitdiff | tree
2020-10-16 Kyle Roartyutil: Update GCN dockerfile for python3 commit | commitdiff | tree
2020-10-16 Jason Lowe... sim,python: Flip logic on loopback listeners commit | commitdiff | tree
2020-10-15 Gabe Blackdev: Rework how PCI BARs are set up in python and C++. commit | commitdiff | tree
2020-10-15 Kyle Roartygpu-compute,mem-ruby: Properly create/handle WriteCompl... commit | commitdiff | tree
2020-10-15 Giacomo Travagliniconfigs: Remove dangling reference to bus port in devic... commit | commitdiff | tree
2020-10-14 Gabe Blackbase: Clean up some #ifs in _format_string. commit | commitdiff | tree
2020-10-14 Gabe Blackmisc: Standardize the way create() constructs SimObjects. commit | commitdiff | tree
2020-10-14 Hoa Nguyenext: Add support for comma-separated inputs of testlib... commit | commitdiff | tree
2020-10-14 Gabe Blackcpu: Remove automatic overriding of numThreads in SE... commit | commitdiff | tree
2020-10-14 Jordi Vaqueroarch-arm: Implement Armv8.2-LPA commit | commitdiff | tree
2020-10-14 Jordi Vaqueroarch-arm: Implement Armv8.2-LVA commit | commitdiff | tree
2020-10-14 Gabe Blacksystemc: Use the new M5_WEAK macro to hide [[gnu::weak]]. commit | commitdiff | tree
2020-10-14 Gabe Blackbase: Add an M5_WEAK macro to compiler.hh. commit | commitdiff | tree
2020-10-14 Gabe Blackfastmodel: Update to c++14, and add some missing consts. commit | commitdiff | tree
2020-10-14 Gabe Blackpython: Remove a call to reduce() from code_formatter.py. commit | commitdiff | tree
2020-10-13 Gabe Blackcpu: Change how O3 handles requests for SMT in full... commit | commitdiff | tree
2020-10-13 Gabe Blackcpu: Remove the "SingleThreaded" fetch policy from... commit | commitdiff | tree
2020-10-13 Hoa Nguyenmisc: Remove an extra file in src/cpu commit | commitdiff | tree
2020-10-13 Tiago Mückmem-ruby: allow qualifiers in SLICC functions commit | commitdiff | tree
2020-10-13 Tiago Mückmem-ruby: more specialized address to node mapping commit | commitdiff | tree
2020-10-13 Tiago Mückmem-ruby: Expose MessageBuffer methods commit | commitdiff | tree
2020-10-13 Tiago Mückmem-ruby: add addressOffset util commit | commitdiff | tree
2020-10-13 Gabe Blackfastmodel: Add a wrapper for the CortexR52. commit | commitdiff | tree
2020-10-13 Gabe Blackutil: Add a copyright to gem5img.py. commit | commitdiff | tree
2020-10-13 Gabe Blackconfigs,tests: Update configs to use compatible SE... commit | commitdiff | tree
2020-10-13 Gabe Blackarch: Use finditer in the (Sub)OperandList classes. commit | commitdiff | tree
2020-10-13 Gabe Blackarch: Pull the (Sub)OperandList classes into their... commit | commitdiff | tree
2020-10-12 Daniel R. Carvalhomem-cache: Create ReplacementPolicy namespace commit | commitdiff | tree
2020-10-12 Tiago Mückmem-ruby: detailed transaction latency profiling commit | commitdiff | tree
2020-10-12 Tiago Mückmem-ruby: expose transition info to actions commit | commitdiff | tree
2020-10-12 Tiago Mückmem-ruby: change MessageBuffer randomization param commit | commitdiff | tree
2020-10-12 Tiago Mückmem-ruby: sequencer callback for unique writes commit | commitdiff | tree
2020-10-12 Tiago Mückmem-ruby: move AddrRange propagation to RubyPort commit | commitdiff | tree
2020-10-12 Tiago Mückmem-ruby: Sequencer can be used without cache commit | commitdiff | tree
2020-10-12 Tiago Mückmem-ruby: int to Cycle converter commit | commitdiff | tree
2020-10-12 Tiago Mückmem-ruby: support for template types in structs commit | commitdiff | tree
2020-10-12 Tiago Mückmem-ruby: added function to check addr range commit | commitdiff | tree
2020-10-12 Tiago Mückmem-ruby: missing method in NetDest interface commit | commitdiff | tree
2020-10-12 Tiago Mückmem-ruby: added %(mod) operator to SLICC commit | commitdiff | tree
2020-10-12 Gabe Blackarch: Minor cleanup of imports in isa_parser.py. commit | commitdiff | tree
2020-10-12 Gabe Blackarch: Split utility methods/variables out of the ISA... commit | commitdiff | tree
2020-10-12 Gabe Blackarch: Split the operand types out of the ISA parser. commit | commitdiff | tree
2020-10-12 Gabe Blackarch: Move the ISA parser into a package. commit | commitdiff | tree
2020-10-10 Gabe Blackx86: Change how IO port devices are structured in the... commit | commitdiff | tree
2020-10-09 Andreas Sandbergstats: Output new-world stats before legacy stats commit | commitdiff | tree
2020-10-09 Andreas Sandbergsim, stats: Move global stats to Root commit | commitdiff | tree
2020-10-09 Daniel R. Carvalhomem-ruby: Simplify Ruby prefetcher's filter access... commit | commitdiff | tree
2020-10-09 Daniel R. Carvalhomem-ruby: Use CircularQueue for prefetcher's non unit... commit | commitdiff | tree
2020-10-09 Daniel R. Carvalhomem-ruby: Use CircularQueue for prefetcher's unit filter commit | commitdiff | tree
2020-10-09 Gabe Blackarch: Build the operand REs in the isa_parser on demand. commit | commitdiff | tree
2020-10-09 Tiago Mückmem-ruby: fix include dependency commit | commitdiff | tree
2020-10-09 Tiago Mückmem-ruby: additional WriteMask methods commit | commitdiff | tree
2020-10-09 Tiago Mückmem-ruby: Network can use custom data msg size commit | commitdiff | tree
2020-10-09 Tiago Muckmem-ruby: Allow same-cycle enqueue commit | commitdiff | tree
2020-10-09 Tiago Muckmem-ruby: MessageBuffer capacity check commit | commitdiff | tree
2020-10-08 Daniel R. Carvalhomem-cache: Encapsulate CacheBlk's status commit | commitdiff | tree
2020-10-08 Daniel R. Carvalhomem-cache: Isolate compression bit commit | commitdiff | tree
2020-10-08 Daniel R. Carvalhomem-cache: Isolate prefetching bit commit | commitdiff | tree
2020-10-08 Daniel R. Carvalhomem-cache: Create a tagged entry class commit | commitdiff | tree
2020-10-08 Daniel R. Carvalhomem-cache: Debug with blk's information instead of... commit | commitdiff | tree
2020-10-08 Daniel R. Carvalhomem-cache: Add missing StridePrefetcher invalidation commit | commitdiff | tree
2020-10-08 Andreas Sandbergstats: Make Stats::Group::mergeStatGroup public commit | commitdiff | tree
2020-10-08 Giacomo Travagliniarch-arm: Default ArmSystem to AArch64 commit | commitdiff | tree
2020-10-07 Gabe Blacksparc: Simplify the IntOp format slightly. commit | commitdiff | tree
2020-10-07 Gabe Blacksparc: Clean up some code in base.isa. commit | commitdiff | tree
2020-10-07 Gabe Blacksim: Add a mechanism for finding an compatible SE workload. commit | commitdiff | tree
2020-10-07 Giacomo Travaglinifastmodel: Add IrisMMU model commit | commitdiff | tree
2020-10-07 Giacomo Travagliniarch: Add generic BaseMMU commit | commitdiff | tree
2020-10-06 Hoa Nguyenarch-arm: Replace call to `tmpnam()` by a deterministic one commit | commitdiff | tree
2020-10-06 Pierre Ayoubcpu: Add recursion for DTB entry generation inside... commit | commitdiff | tree
2020-10-06 Pierre Ayoubarch-arm: Add recursion for DTB entry generation inside... commit | commitdiff | tree
2020-10-06 Daniel R. Carvalhomem-cache: Encapsulate CacheBlk's srcRequestorId commit | commitdiff | tree
2020-10-06 Daniel R. Carvalhomem-cache: Encapsulate CacheBlk's tickInserted commit | commitdiff | tree
2020-10-06 Daniel R. Carvalhomem-cache: Encapsulate CacheBlk's refCount commit | commitdiff | tree
2020-10-06 Daniel R. Carvalhomem-cache: Encapsulate CacheBlk's task_id commit | commitdiff | tree
2020-10-06 Daniel R. Carvalhomem-cache: Protect tag from being mishandled commit | commitdiff | tree
2020-10-06 Earl Ouscons: only wrap message with positive value commit | commitdiff | tree
2020-10-06 Earl Ouscons: avoid interactive access in non-tty commit | commitdiff | tree
2020-10-01 Bobby R. Brucemisc: Changed gem5 version info for gem5 20.2 dev commit | commitdiff | tree
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