openpower-isa.git
2023-05-02 Luke Kenneth... update comments and correct retiring, remove registers...
2023-05-02 Luke Kenneth... start on cycle-accurate model of inorder core
2023-04-30 Luke Kenneth... ffnmadds converted to 3-operand
2023-04-30 Luke Kenneth... converted ffnmadds to 3-operand
2023-04-30 Luke Kenneth... ffmsubs number of operands reduced to match ffmadds
2023-04-30 Dmitry Selyutinpower_insn: forbid zero for non-zero operands
2023-04-30 Dmitry Selyutinpower_insn: drop registers remapping hack
2023-04-30 Dmitry Selyutinpower_insn: support int and index opcode methods
2023-04-28 Luke Kenneth... reduce number of operands to ffmadds as well
2023-04-28 Jacob Lifshayprefix-sum remap works!
2023-04-28 Jacob Lifshaychange order to tuple in remap preduce tests/demos...
2023-04-28 Jacob Lifshayfix <u and >u with int arguments
2023-04-28 Luke Kenneth... reduce fdmadds down to only 3 operands, RT-overwrite...
2023-04-27 Luke Kenneth... add SVSHAPE setup for parallel/prefix but it refuses...
2023-04-27 Luke Kenneth... add implicit rs detection for maddsubrs
2023-04-27 Luke Kenneth... link in new parallel-prefix REMAP schedule
2023-04-27 Jacob Lifshayadd scan/prefix-sum support to copy of parallel-reduce...
2023-04-27 Jacob Lifshayformat remap_preduce_yield.py
2023-04-26 Dmitry Selyutinpower_insn: deprecate ff/pr common code nopr
2023-04-26 Dmitry Selyutinpower_insn: deprecate PR specifier
2023-04-26 Dmitry Selyutinpower_insn: deprecate normal PR mode
2023-04-26 Dmitry Selyutinpysvp64dis: deprecate pr tests
2023-04-26 Dmitry Selyutinpysvp64asm: deprecate pr tests
2023-04-26 Dmitry Selyutinpower_enums: sync forms
2023-04-25 Luke Kenneth... add CW and CW2 Form
2023-04-25 Luke Kenneth... check RC1, add data-dependent fail-first LD/ST test
2023-04-25 Jacob Lifshayreplace min/max[su][.] with minmax[.]
2023-04-25 Jacob Lifshayadd unofficial and comment2 columns to minor_19.csv
2023-04-25 Jacob Lifshayadd MM-form
2023-04-25 Jacob Lifshayfix bug where pseudo-code assignments modify more than...
2023-04-21 Jacob Lifshayrename/convert/merge XLCASTU/XLCASTS to EXTZXL/EXTSXL change-xlenification-bug-1064
2023-04-21 Jacob Lifshayrewrite all uses of XLCASTU/XLCASTS
2023-04-21 Jacob Lifshayadd EXTZ since it's in PowerISA v3.1B (see lbz for...
2023-04-20 Jacob Lifshayfix EXTSXL/XLCASTU/XLCASTS when inputs are python ints
2023-04-20 Jacob Lifshayuse proper cast function
2023-04-20 Jacob Lifshaychange XLEN-ification
2023-04-20 Jacob Lifshaychange extsb/h/w to scale based on XLEN rather than...
2023-04-18 Jacob Lifshayadd shaddw
2023-04-18 Jacob Lifshayspelling fix
2023-04-12 Dmitry Selyutinmedia: migrate to binutils
2023-04-10 Dmitry Selyutinsv_binutils: fix broken script
2023-04-06 Luke Kenneth... add power_decode_svp64_rm.py capability for new LD...
2023-04-04 Luke Kenneth... add quick test_pysvp64dis.py of LD/ST data-dependent...
2023-04-04 Luke Kenneth... https://bugs.libre-soc.org/show_bug.cgi?id=1047
2023-04-04 Luke Kenneth... whitespace cleanup (80 char per line hard limit)
2023-04-04 Luke Kenneth... comment about massive unnecessary code-duplication...
2023-04-04 Luke Kenneth... fix setvl unit test which happened to use deprecated
2023-03-30 Jacob Lifshayfix add-like CA/OV outputs
2023-03-30 Jacob Lifshayfix broken test case
2023-03-30 Jacob Lifshayadd addex to simulator
2023-03-30 Jacob Lifshayfix typo when getting pseudo-code output variables
2023-03-30 Jacob Lifshayswitch to testing Rc=1 variants
2023-03-30 Jacob Lifshayfix `neg[o].` causing the simulator to raise TypeError
2023-03-30 Jacob Lifshayadd case_nego_
2023-03-30 Jacob Lifshayrename le -> lt since CR bits are lt, gt, eq, and so...
2023-03-29 Luke Kenneth... remove DCT/iDCT redundant modes which require less...
2023-03-29 Jacob Lifshayadd test cases for ca/ov outputs of a bunch of add...
2023-03-28 Jacob Lifshayadd check against PIA's output downloaded from ftp...
2023-03-25 Luke Kenneth... all whitespace. reduce to under 80 chars
2023-03-25 Luke Kenneth... update comments on svstep returning pack/unpack state
2023-03-25 Konstantinos... fix docs to align with recent change in setvl syntax...
2023-03-25 Luke Kenneth... whitespace - 80 char limit
2023-03-25 Luke Kenneth... in xchacha20 svp64 assembler remove r22 from setvl and
2023-03-25 Luke Kenneth... updated simplev setvl specification pseudocode: MAJOR...
2023-03-25 Luke Kenneth... whitespace
2023-03-24 Luke Kenneth... whoops added "CRB-Form" format not "CRB"
2023-03-20 Konstantinos... add .bin files to target
2023-03-20 Konstantinos... fix typo
2023-03-20 Konstantinos... and *.elf files
2023-03-20 Konstantinos... also clean *.bin files
2023-03-20 Konstantinos... Enable compilation and execution on x86 as well
2023-03-20 Konstantinos... Pass object code filename instead of actual data
2023-03-18 Luke Kenneth... brief explanation of Vertical-First
2023-03-18 Luke Kenneth... spelling
2023-03-18 Luke Kenneth... whitespace cleanup
2023-03-18 Konstantinos... Documentation about SVP64 implementation of XChacha20
2023-03-18 Konstantinos... fix tabs
2023-03-18 Konstantinos... final working version
2023-03-18 Konstantinos... add for syntax highlighting
2023-03-18 Konstantinos... comment some prints, use correct boundaries when copyin...
2023-03-18 Konstantinos... use svp64 version
2023-03-18 Konstantinos... print correct/svp64 cipher text
2023-03-17 Konstantinos... Add xchacha_encrypt_bytes_svp64
2023-03-17 Konstantinos... call xchacha_encrypt_bytes_svp64
2023-03-17 Konstantinos... rewrite loop
2023-03-17 Konstantinos... Refactor code, add quarterround macros
2023-03-17 Konstantinos... Add xchacha_encrypt_bytes_svp64 wrapper function
2023-03-15 Luke Kenneth... add CRB-Form fields for crternlogi and crbinlog, they...
2023-03-12 Konstantinos... First working version of SVP64 arm xchacha_hchacha20...
2023-03-12 Luke Kenneth... set MAXVL=VL=32 first, then set vertical-first separately
2023-03-12 Konstantinos... used same input data as the actual C test
2023-03-12 Konstantinos... WIP: fixed some registers, wrong VL
2023-03-12 Konstantinos... uncomment loop
2023-03-12 Luke Kenneth... change target registers in test_caller_svp64_chacha20...
2023-03-12 Luke Kenneth... whoops use same temp reg for ctr
2023-03-12 Luke Kenneth... parameterise svstep RT (set to 16 in chacha20 test)
2023-03-12 Luke Kenneth... parameterising VL and SHAPE0-2 in chacha20 test
2023-03-12 Luke Kenneth... parameterise the target block in chacha20 test,
2023-03-12 Luke Kenneth... add print-out for chacha20 schedule
2023-03-12 Konstantinos... fix tabs
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