2021-12-31 |
whitequark | back.pysim: fix emission of undriven traces to VCD... |
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2021-12-31 |
whitequark | setup: bump pyvcd to ~=0.2. |
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2021-12-31 |
Jacob Lifshay | Add support for using non-compat Elaboratable instances... |
commit | commitdiff | tree |
2021-12-31 |
whitequark | setup: tighten version constraint on Jinja2. |
commit | commitdiff | tree |
2021-12-31 |
whitequark | hdl.ast: implement abs() on values. |
commit | commitdiff | tree |
2021-12-31 |
WRansohoff | vendor.lattice_ice40: add support for SB_[LH]FOSC as... |
commit | commitdiff | tree |
2021-12-31 |
Nicolas Robin | vendor: fix typo `async_ff_sync` |
commit | commitdiff | tree |
2021-12-31 |
Stuart Olsen | back.pysim: implement modulus operator. |
commit | commitdiff | tree |
2021-12-31 |
awygle | Correctly handle resets in AsyncFIFO. |
commit | commitdiff | tree |
2020-03-12 |
whitequark | vendor: fix a few issues in commit 2f8669ca. |
commit | commitdiff | tree |
2020-03-08 |
awygle | lib.cdc: extract AsyncFFSynchronizer. |
commit | commitdiff | tree |
2020-02-19 |
whitequark | hdl.ast: fix off-by-1 in Initial.__init__(). |
commit | commitdiff | tree |
2020-02-19 |
whitequark | back.pysim: fix RHS codegen for Cat() and Repl(...... |
commit | commitdiff | tree |
2020-02-19 |
whitequark | back.pysim: optionally allow introspecting generated... |
commit | commitdiff | tree |
2020-02-16 |
awygle | nmigen.compat.genlib.cdc: add PulseSynchronizer. |
commit | commitdiff | tree |
2020-02-16 |
awygle | nmigen.lib.cdc: port PulseSynchronizer. |
commit | commitdiff | tree |
2020-02-14 |
whitequark | Travis: prune dependencies. |
commit | commitdiff | tree |
2020-02-14 |
whitequark | Travis: test on Python 3.8. |
commit | commitdiff | tree |
2020-02-12 |
whitequark | cli: update use of deprecated code. |
commit | commitdiff | tree |
2020-02-12 |
whitequark | back.pysim: accept write_vcd(vcd_file=None). |
commit | commitdiff | tree |
2020-02-09 |
whitequark | setup: update project URLs. |
commit | commitdiff | tree |
2020-02-09 |
whitequark | doc: remove outdated files and references to them. |
commit | commitdiff | tree |
2020-02-08 |
whitequark | README: link to IRC channel. |
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2020-02-08 |
whitequark | README: consolidate requirements in the Installation... |
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2020-02-07 |
whitequark | test_build_res: fix after commit 3e2ecdf2. |
commit | commitdiff | tree |
2020-02-06 |
whitequark | build.res,vendor: place clock constraint on port, not... |
commit | commitdiff | tree |
2020-02-06 |
whitequark | xilinx_{7series,ultrascale}: run `report_methodology`. |
commit | commitdiff | tree |
2020-02-06 |
whitequark | hdl.ast: add Value.{as_signed,as_unsigned}. |
commit | commitdiff | tree |
2020-02-06 |
whitequark | test_lib_fifo: define all referenced FSM states. |
commit | commitdiff | tree |
2020-02-06 |
whitequark | hdl.dsl: make referencing undefined FSM states an error. |
commit | commitdiff | tree |
2020-02-06 |
whitequark | hdl.ir: type check ports. |
commit | commitdiff | tree |
2020-02-06 |
whitequark | back.pysim: emit toplevel inputs in VCD files as well. |
commit | commitdiff | tree |
2020-02-06 |
whitequark | back.pysim: make `write_vcd(traces=)` actually use... |
commit | commitdiff | tree |
2020-02-06 |
whitequark | hdl.dsl: reject name mismatch in `m.domains.<name>... |
commit | commitdiff | tree |
2020-02-06 |
whitequark | hdl.dsl: type check when adding to m.domains. |
commit | commitdiff | tree |
2020-02-06 |
whitequark | hdl.mem: add synthesis attribute support. |
commit | commitdiff | tree |
2020-02-06 |
whitequark | hdl.mem: document Memory. |
commit | commitdiff | tree |
2020-02-04 |
whitequark | hdl.{ast,dsl}: allow whitespace in bit patterns. |
commit | commitdiff | tree |
2020-02-01 |
whitequark | hdl.ast: update documentation for Signal. |
commit | commitdiff | tree |
2020-02-01 |
whitequark | hdl.ast: prohibit shifts by signed value. |
commit | commitdiff | tree |
2020-02-01 |
whitequark | build.plat: align pipeline with Fragment.prepare(). |
commit | commitdiff | tree |
2020-02-01 |
whitequark | hdl.dsl: don't allow inheriting from Module. |
commit | commitdiff | tree |
2020-02-01 |
whitequark | hdl.ast: warn on unused property statements (Assert... |
commit | commitdiff | tree |
2020-02-01 |
whitequark | _unused: extract must-use logic from hdl.ir. |
commit | commitdiff | tree |
2020-01-31 |
whitequark | hdl.dsl: add missing case width check for Enum values. |
commit | commitdiff | tree |
2020-01-31 |
whitequark | README: clarify relationship to Migen. |
commit | commitdiff | tree |
2020-01-31 |
whitequark | hdl.dsl: make `if m.{If,Elif,Else}(...)` a syntax error. |
commit | commitdiff | tree |
2020-01-31 |
whitequark | back.rtlil: don't emit wires for empty signals. |
commit | commitdiff | tree |
2020-01-31 |
Mike Walters | vendor.lattice_ecp5: support internal oscillator (OSCG). |
commit | commitdiff | tree |
2020-01-31 |
Jaro Habiger | build.dsl: allow strings to be used as connector numbers. |
commit | commitdiff | tree |
2020-01-31 |
Sylvain Munaut | vendor.lattice_{ice40,ecp5}: Support .il (RTLIL) files... |
commit | commitdiff | tree |
2020-01-27 |
whitequark | Update README. |
commit | commitdiff | tree |
2020-01-18 |
whitequark | hdl.ir: resolve hierarchy conflicts before creating... |
commit | commitdiff | tree |
2020-01-17 |
whitequark | hdl.xfrm: transform drivers as well in DomainRenamer. |
commit | commitdiff | tree |
2020-01-12 |
whitequark | Remove everything deprecated in nmigen 0.1. |
commit | commitdiff | tree |
2020-01-11 |
Staf Verhaegen | Signal: allow to use integral Enum for reset value. |
commit | commitdiff | tree |
2020-01-09 |
schwigi | vendor.intel: fix output enable width for XDR=0 case. |
commit | commitdiff | tree |
2020-01-07 |
Alain Péteut | build.run: fix indentation. |
commit | commitdiff | tree |
2020-01-01 |
whitequark | back.rtlil: do not consider unreachable array elements... |
commit | commitdiff | tree |
2019-12-15 |
whitequark | hdl.mem: fix src_loc_at in ReadPort, WritePort. |
commit | commitdiff | tree |
2019-12-04 |
Marcin Kościelnicki | hdl.ast: Fix width for unary minus operator on signed... |
commit | commitdiff | tree |
2019-12-02 |
whitequark | back.pysim: fix miscompilation of Signal(unsigned)... |
commit | commitdiff | tree |
2019-12-02 |
whitequark | hdl.ast: actually remove simulator commands. |
commit | commitdiff | tree |
2019-12-01 |
Dan Ravensloft | vendor.intel: silence meaningless warnings in nMigen... |
commit | commitdiff | tree |
2019-11-28 |
whitequark | back.pysim: redesign the simulator. |
commit | commitdiff | tree |
2019-11-27 |
whitequark | back.rtlil: infer bit width for instance parameters. |
commit | commitdiff | tree |
2019-11-26 |
whitequark | hdl.ir: for instance ports, prioritize defs over uses. |
commit | commitdiff | tree |
2019-11-18 |
Jean-François... | vendor.xilinx_*: Set IOB attribute on cels instead... |
commit | commitdiff | tree |
2019-11-18 |
whitequark | back.rtlil: extend shorter operand of a binop when... |
commit | commitdiff | tree |
2019-11-15 |
whitequark | build.plat: in Platform.add_file(), allow adding exact... |
commit | commitdiff | tree |
2019-11-15 |
whitequark | test: add tests for build.plat.Platform.add_file. |
commit | commitdiff | tree |
2019-11-09 |
whitequark | hdl.rec: fix Record.like() being called through a subclass. |
commit | commitdiff | tree |
2019-11-09 |
Staf Verhaegen | hdl.rec: make Record(name=) keyword-only. |
commit | commitdiff | tree |
2019-11-07 |
whitequark | hdl.ir: lower domains before resolving hierarchy conflicts. |
commit | commitdiff | tree |
2019-11-02 |
whitequark | Improve .gitignore. |
commit | commitdiff | tree |
2019-10-28 |
whitequark | back.verilog: remove $verilog_initial_trigger after... |
commit | commitdiff | tree |
2019-10-26 |
whitequark | test: use `#nmigen:` magic comment instead of monkey... |
commit | commitdiff | tree |
2019-10-26 |
whitequark | hdl.ir: allow disabling UnusedElaboratable warning... |
commit | commitdiff | tree |
2019-10-26 |
whitequark | back.rtlil: avoid exponential behavior when legalizing... |
commit | commitdiff | tree |
2019-10-26 |
whitequark | back.rtlil: fix lowering of Part() on LHS to account... |
commit | commitdiff | tree |
2019-10-26 |
whitequark | hdl.ast: simplify {bit,word}_select with constant offset. |
commit | commitdiff | tree |
2019-10-21 |
whitequark | Explicitly restrict prelude imports. |
commit | commitdiff | tree |
2019-10-17 |
whitequark | compat.fhdl.specials: fix argument parsing compatibility. |
commit | commitdiff | tree |
2019-10-16 |
whitequark | lib.io: use keyword-only arguments in Pin(). |
commit | commitdiff | tree |
2019-10-16 |
whitequark | setup: fix commit 5198d99b. |
commit | commitdiff | tree |
2019-10-16 |
Sebastien Bourdeauducq | verilog: fix yosys version error message |
commit | commitdiff | tree |
2019-10-16 |
whitequark | back.verilog: fix Yosys version check. |
commit | commitdiff | tree |
2019-10-15 |
whitequark | setup: don't append local version for tags. |
commit | commitdiff | tree |
2019-10-14 |
whitequark | vendor.lattice_ice40: fix commit 88649def. |
commit | commitdiff | tree |
2019-10-13 |
whitequark | vendor.lattice_{ice40,ecp5}: fix typo. |
commit | commitdiff | tree |
2019-10-13 |
whitequark | vendor.lattice_ice40: use pcf files instead of pre... |
commit | commitdiff | tree |
2019-10-13 |
whitequark | build.plat: batch files use EQU, not EQ. |
commit | commitdiff | tree |
2019-10-13 |
whitequark | {,_}tools→{,_}utils |
commit | commitdiff | tree |
2019-10-13 |
whitequark | vendor.lattice_{ice40,ecp5}: emit Verilog as well,... |
commit | commitdiff | tree |
2019-10-13 |
whitequark | build.plat: fold emit_prelude() into emit_commands(). |
commit | commitdiff | tree |
2019-10-13 |
Emily | Refactor build script toolchain lookups. |
commit | commitdiff | tree |
2019-10-13 |
whitequark | hdl.ir: allow ClockSignal and ResetSignal in ports. |
commit | commitdiff | tree |
2019-10-13 |
whitequark | hdl.ir: cast instance port connections to Values. |
commit | commitdiff | tree |
2019-10-13 |
whitequark | compat.fhdl.decorators: improve backwards compatibility. |
commit | commitdiff | tree |
2019-10-13 |
whitequark | compat.fhdl.bitcontainer: update Value.wrap call. |
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