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yosys.git
2019-04-20
Eddie Hung
Merge remote-tracking branch 'origin/master' into xaig
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2019-04-20
Clifford Wolf
Merge pull request #943 from YosysHQ/clifford/whitebox
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2019-04-20
Clifford Wolf
Add "techmap -wb", use in formal flows
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2019-04-20
Clifford Wolf
Check blackbox attribute in techmap/simplemap
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2019-04-20
Clifford Wolf
Add "wbflip" command
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2019-04-20
Clifford Wolf
Merge pull request #942 from YosysHQ/clifford/fix931
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2019-04-20
Eddie Hung
ABC_FLOPS -> ABC_MODEL -- only whitebox if ABC_MODEL set
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2019-04-19
Eddie Hung
Select to find union of both sets on stack
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2019-04-19
Eddie Hung
Fixes for simple_abc9 tests
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2019-04-19
Clifford Wolf
Improve "show" handling of 0/1/X/Z padding
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2019-04-19
Clifford Wolf
Change "ne" to "neq" in btor2 output
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2019-04-19
Eddie Hung
Do not assume inst_module is always present
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2019-04-19
Eddie Hung
ignore_boxes -> holes_mode
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2019-04-19
Eddie Hung
Make SB_DFF whitebox
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2019-04-19
Clifford Wolf
Add tests/aiger/.gitignore
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2019-04-19
Eddie Hung
Spelling fixes
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2019-04-19
Eddie Hung
Fix SB_DFF comb model
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2019-04-19
Eddie Hung
Revert "write_json to not write contents (cells/wires...
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2019-04-19
Eddie Hung
Missing close bracket
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2019-04-19
Eddie Hung
Annotate SB_DFF* with abc_flop and abc_box_id
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2019-04-19
Eddie Hung
Add SB_DFF* to boxes
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2019-04-19
Eddie Hung
Add flop support for write_xaiger
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2019-04-19
Eddie Hung
read_aiger to parse 'r' extension
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2019-04-19
Eddie Hung
Spelling
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2019-04-18
Clifford Wolf
Update to ABC 3709744
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2019-04-18
Eddie Hung
Merge pull request #917 from YosysHQ/eddie/fix_retime
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2019-04-18
Eddie Hung
Use new -wb flag for ABC flow
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2019-04-18
Eddie Hung
write_json to not write contents (cells/wires) of white...
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2019-04-18
Eddie Hung
Ignore 'whitebox' attr in flatten with "-wb" option
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2019-04-18
Eddie Hung
write_json to not write contents (cells/wires) of white...
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2019-04-18
Eddie Hung
Ignore 'whitebox' attr in flatten with "-wb" option
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2019-04-18
Eddie Hung
Also update Makefile.inc
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2019-04-18
Eddie Hung
Fix abc's remap_name to not ignore [^0-9] when extracti...
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2019-04-18
Eddie Hung
Make SB_LUT4 a blackbox
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2019-04-18
Eddie Hung
Fix rename
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2019-04-18
Eddie Hung
Rename to abc_*.{box,lut}
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2019-04-18
Eddie Hung
Merge remote-tracking branch 'origin/clifford/whitebox...
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2019-04-18
Eddie Hung
ABC to call retime all the time
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2019-04-18
Clifford Wolf
Add "whitebox" attribute, add "read_verilog -wb"
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2019-04-18
Eddie Hung
Revert "synth_* with -retime option now calls abc with...
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2019-04-18
Eddie Hung
Merge branch 'master' into eddie/fix_retime
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2019-04-18
Clifford Wolf
Improve proc full_case detection and handling, fixes...
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2019-04-17
Eddie Hung
Skip if abc_box_id earlier
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2019-04-17
Eddie Hung
Remove use of abc_box_id in stat
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2019-04-17
Eddie Hung
Fix $anyseq warning and cleanup
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2019-04-17
Eddie Hung
Update Makefile.inc too
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2019-04-17
Eddie Hung
Reduce to three devices: hx, lp, u
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2019-04-17
Eddie Hung
Do not print slack histogram
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2019-04-17
Eddie Hung
Add up5k timings
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2019-04-17
Eddie Hung
Fix grammar
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2019-04-17
Eddie Hung
Update error message
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2019-04-17
Eddie Hung
Add "-device" argument to synth_ice40
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2019-04-17
Eddie Hung
Missing abc_flop_q attribute on SPRAM
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2019-04-17
Eddie Hung
Cope with inout ports
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2019-04-17
Eddie Hung
Map to SB_LUT4 from fastest input first
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2019-04-17
Eddie Hung
Working ABC9 script
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2019-04-17
Eddie Hung
Stop topological sort at abc_flop_q
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2019-04-17
Eddie Hung
Mark seq output ports with "abc_flop_q" attr
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2019-04-17
Eddie Hung
Also update Makefile.inc
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2019-04-17
Eddie Hung
synth_ice40 to use renamed files
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2019-04-17
Eddie Hung
Rename to abc.*
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2019-04-17
Eddie Hung
Revert "Try using an ICE40_CARRY_LUT primitive to avoid...
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2019-04-17
Eddie Hung
Try using an ICE40_CARRY_LUT primitive to avoid ABC...
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2019-04-17
Eddie Hung
Remove init* from xaiger, also topo-sort cells for...
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2019-04-17
Eddie Hung
Merge remote-tracking branch 'origin/master' into xaig
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2019-04-17
Eddie Hung
Ignore a/i/o/h XAIGER extensions
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2019-04-17
Eddie Hung
Fix spacing
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2019-04-17
Clifford Wolf
Update to ABC d1b6413
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2019-04-17
Eddie Hung
Optimise
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2019-04-17
Eddie Hung
Add SB_LUT4 to box library
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2019-04-16
Eddie Hung
Add ice40 box files
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2019-04-16
Eddie Hung
abc9 to output some more info
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2019-04-16
Eddie Hung
CIs before PIs; also sort each cell's connections befor...
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2019-04-16
Eddie Hung
Merge remote-tracking branch 'origin/master' into xaig
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2019-04-16
Eddie Hung
Port from xc7mux branch
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2019-04-16
Eddie Hung
Re-enable partsel.v test
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2019-04-16
Eddie Hung
abc9 to call "setundef -zero" behaving as for abc
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2019-04-16
Eddie Hung
Merge pull request #939 from YosysHQ/revert895
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2019-04-16
Eddie Hung
Revert #895
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2019-04-16
Eddie Hung
Merge remote-tracking branch 'origin/master' into xaig
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2019-04-16
Eddie Hung
Merge pull request #937 from YosysHQ/revert-932-eddie...
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2019-04-16
Eddie Hung
Revert "Recognise default entry in case even if all...
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2019-04-15
Eddie Hung
Merge pull request #936 from YosysHQ/README-fix-quotes
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2019-04-15
whitequark
README: fix some incorrect quoting.
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2019-04-13
Eddie Hung
Forgot backslashes
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2019-04-13
Eddie Hung
Handle __dummy_o__ and __const[01]__ in read_aiger...
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2019-04-13
Eddie Hung
abc to ignore __dummy_o__ and __const[01]__ when re...
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2019-04-13
Eddie Hung
Output __const0__ and __const1__ CIs
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2019-04-13
Eddie Hung
Merge branch 'xaig' of github.com:YosysHQ/yosys into...
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2019-04-13
Eddie Hung
Fix inout handling for -map option
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2019-04-12
Eddie Hung
Merge branch 'xaig' of github.com:YosysHQ/yosys into...
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2019-04-12
Eddie Hung
Merge remote-tracking branch 'origin/master' into xaig
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2019-04-12
Eddie Hung
Use -map instead of -symbols for aiger
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2019-04-12
Eddie Hung
ci_bits and co_bits now a list, order is important...
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2019-04-12
Eddie Hung
Also cope with duplicated CIs
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2019-04-12
Eddie Hung
WIP
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2019-04-12
Eddie Hung
Comment out
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2019-04-12
Eddie Hung
Add support for synth_xilinx -abc9 and ignore abc9...
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2019-04-12
Eddie Hung
Cope with an output having same name as an input (i...
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2019-04-12
Eddie Hung
Merge remote-tracking branch 'origin/master' into xaig
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