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litex.git
2012-02-20
Sebastien Bourdeauducq
s6ddrphy: generate DQ/DQS/DM OE
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2012-02-20
Sebastien Bourdeauducq
s6ddrphy: DQ/DQS/DM SERDES
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2012-02-19
Sebastien Bourdeauducq
s6ddrphy: clock, address and command
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2012-02-19
Sebastien Bourdeauducq
Prepare for new DDR PHY
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2012-02-18
Sebastien Bourdeauducq
bios: fix function prototypes
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2012-02-18
Sebastien Bourdeauducq
Send SDRAM initialization sequence and answer PHY read...
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2012-02-17
Sebastien Bourdeauducq
DFI injector (untested)
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2012-02-17
Sebastien Bourdeauducq
bios: DDR initialization skeleton
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2012-02-17
Sebastien Bourdeauducq
bios: add flash target using m1nor
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2012-02-17
Sebastien Bourdeauducq
Add build Makefile and JTAG load script
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2012-02-17
Sebastien Bourdeauducq
Map DDR PHY controls in CSR
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2012-02-17
Sebastien Bourdeauducq
Connect DDR PHY
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2012-02-17
Sebastien Bourdeauducq
s6ddrphy: use single-ended DQS
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2012-02-16
Sebastien Bourdeauducq
clkfx: remove
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2012-02-16
Sebastien Bourdeauducq
m1crg: make clock feedback pin bidirectional
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2012-02-16
Sebastien Bourdeauducq
lm32: compatibility with the new instance API
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2012-02-16
Sebastien Bourdeauducq
Generate all clocks for the DDR PHY
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2012-02-15
Sebastien Bourdeauducq
Use new bus API
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2012-02-14
Sebastien Bourdeauducq
s6ddrphy: prepare quilt
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2012-02-14
Sebastien Bourdeauducq
README
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2012-02-14
Sebastien Bourdeauducq
Use double quotes for all strings
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2012-02-13
Sebastien Bourdeauducq
Include Wishbone to ASMI bridge
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2012-02-08
Sebastien Bourdeauducq
tools: use install and /usr/local (as suggested by...
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2012-02-08
Sebastien Bourdeauducq
tools: remove bin2hex
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2012-02-07
Sebastien Bourdeauducq
libbase: blocking UART write if IRQs are enabled
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2012-02-07
Sebastien Bourdeauducq
software: shell from original BIOS
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2012-02-07
Sebastien Bourdeauducq
software: UART RX demo
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2012-02-07
Sebastien Bourdeauducq
uart: RX support
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2012-02-07
Sebastien Bourdeauducq
software: enable -Wmissing-prototypes
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2012-02-07
Sebastien Bourdeauducq
software: use the Clang/LLVM compiler
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2012-02-07
Sebastien Bourdeauducq
software: fix size_t and ptrdiff_t
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2012-02-06
Sebastien Bourdeauducq
software: remove unnecessary IRQ acks
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2012-02-06
Sebastien Bourdeauducq
LM32: make IP read-only and interrupt lines level-sensitive
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2012-02-06
Sebastien Bourdeauducq
software: interrupt driven UART working
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2012-02-06
Sebastien Bourdeauducq
sram: fix sub-word write
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2012-02-06
Sebastien Bourdeauducq
software: use new UART
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2012-02-06
Sebastien Bourdeauducq
top: connect UART IRQ
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2012-02-06
Sebastien Bourdeauducq
UART: use new bank API and event manager
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2012-02-05
Sebastien Bourdeauducq
BIOS: hello world
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2012-02-05
Sebastien Bourdeauducq
Update gitignore
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2012-02-05
Sebastien Bourdeauducq
Memory map
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2012-02-05
Sebastien Bourdeauducq
Add tools
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2012-02-05
Sebastien Bourdeauducq
flash: remove splash screens
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2012-02-03
Sebastien Bourdeauducq
software: dependencies the Werner way
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2012-02-03
Sebastien Bourdeauducq
Copy some software code from the original Milkymist...
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2012-02-03
Sebastien Bourdeauducq
sram: fix WE signal
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2012-01-27
Sebastien Bourdeauducq
Remove explicit bus names
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2012-01-27
Sebastien Bourdeauducq
Add on-chip SRAM
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2012-01-21
Sebastien Bourdeauducq
Use meaningful class names
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2012-01-20
Sebastien Bourdeauducq
Use new verilog.convert API
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2012-01-13
Sebastien Bourdeauducq
Wishbone: omit fixed LSBs
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2012-01-13
Sebastien Bourdeauducq
convtools -> tools
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2012-01-05
Sebastien Bourdeauducq
Convert -> convert
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2011-12-18
Sebastien Bourdeauducq
Use new syntax
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2011-12-17
Sebastien Bourdeauducq
uart: new design using FHDL and bank (TX only, incomplete)
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2011-12-17
Sebastien Bourdeauducq
32-device, 8-bit CSR bus
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2011-12-17
Sebastien Bourdeauducq
norflash tb: use get_fragment
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2011-12-17
Sebastien Bourdeauducq
Multiply system clock
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2011-12-17
Sebastien Bourdeauducq
clkfx module
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2011-12-16
Sebastien Bourdeauducq
Proper reset generation
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2011-12-16
Sebastien Bourdeauducq
Support the new FHDL syntax
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2011-12-16
Sebastien Bourdeauducq
Pay a bit more attention to PEP8
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2011-12-13
Sebastien Bourdeauducq
Initial import
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