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yosys.git
2018-12-17 Clifford WolfMerge pull request #744 from whitequark/write_verilog_... commit | commitdiff | tree
2018-12-16 Clifford WolfMerge pull request #745 from YosysHQ/revert-714-abc_pre... commit | commitdiff | tree
2018-12-16 Clifford WolfRevert "Proof-of-concept: preserve naming through ABC... commit | commitdiff | tree
2018-12-16 whitequarkwrite_verilog: handle the $shift cell. commit | commitdiff | tree
2018-12-16 Clifford WolfMerge pull request #736 from whitequark/select_assert_list commit | commitdiff | tree
2018-12-16 whitequarkselect: print selection if a -assert-* flag causes... commit | commitdiff | tree
2018-12-16 Clifford WolfRename "fine:" label to "map:" in "synth_ice40" commit | commitdiff | tree
2018-12-16 Clifford WolfMerge pull request #704 from webhat/feature/fix-awk commit | commitdiff | tree
2018-12-16 whitequarkwrite_verilog: add a missing newline. commit | commitdiff | tree
2018-12-16 Clifford WolfMerge pull request #738 from smunaut/issue_737 commit | commitdiff | tree
2018-12-16 Clifford WolfMerge pull request #735 from daveshah1/trifixes commit | commitdiff | tree
2018-12-16 Clifford WolfMerge pull request #739 from whitequark/patch-1 commit | commitdiff | tree
2018-12-16 whitequarkAdd .editorconfig file. commit | commitdiff | tree
2018-12-16 Clifford WolfFix equiv_opt indenting commit | commitdiff | tree
2018-12-16 Clifford WolfMerge pull request #724 from whitequark/equiv_opt commit | commitdiff | tree
2018-12-16 Clifford WolfMerge pull request #734 from grahamedgecombe/fix-shuffl... commit | commitdiff | tree
2018-12-16 Clifford WolfMerge pull request #730 from smunaut/ffssr_dont_touch commit | commitdiff | tree
2018-12-16 Clifford WolfMerge pull request #729 from whitequark/write_verilog_i... commit | commitdiff | tree
2018-12-16 Clifford WolfMerge pull request #725 from olofk/ram4k-init commit | commitdiff | tree
2018-12-16 Clifford WolfMerge pull request #714 from daveshah1/abc_preserve_naming commit | commitdiff | tree
2018-12-16 Clifford WolfMerge pull request #723 from whitequark/synth_ice40_map... commit | commitdiff | tree
2018-12-16 Clifford WolfMerge pull request #722 from whitequark/rename_src commit | commitdiff | tree
2018-12-16 Clifford WolfMerge pull request #720 from whitequark/master commit | commitdiff | tree
2018-12-14 Sylvain Munautverilog_parser: Properly handle recursion when processi... commit | commitdiff | tree
2018-12-12 David Shahdeminout: Consider $tribuf cells commit | commitdiff | tree
2018-12-12 David Shahdeminout: Don't demote constant-driven inouts to inputs commit | commitdiff | tree
2018-12-11 Graham Edgecombememory_bram: Fix initdata bit order after shuffling commit | commitdiff | tree
2018-12-10 Clifford WolfAdd yosys-smtbmc support for btor witness commit | commitdiff | tree
2018-12-08 Sylvain Munautice40: Honor the "dont_touch" attribute in FFSSR pass commit | commitdiff | tree
2018-12-08 Clifford WolfAdd "yosys-smtbmc --btorwit" skeleton commit | commitdiff | tree
2018-12-08 Clifford WolfFix btor init value handling commit | commitdiff | tree
2018-12-07 whitequarkwrite_verilog: correctly map RTLIL `sync init`. commit | commitdiff | tree
2018-12-07 whitequarkequiv_opt: pass -D EQUIV when techmapping. commit | commitdiff | tree
2018-12-07 whitequarkequiv_opt: new command, for verifying optimization... commit | commitdiff | tree
2018-12-07 David ShahMerge pull request #727 from whitequark/opt_lut commit | commitdiff | tree
2018-12-07 whitequarkopt_lut: leave intact LUTs with cascade feeding module... commit | commitdiff | tree
2018-12-07 whitequarkopt_lut: show original truth table for both cells. commit | commitdiff | tree
2018-12-07 whitequarkopt_lut: add -limit option, for debugging misoptimizations. commit | commitdiff | tree
2018-12-06 Olof KindgrenOnly use non-blocking assignments of SB_RAM40_4K for... commit | commitdiff | tree
2018-12-06 David Shahabc: Preserve naming through ABC using 'dress' command commit | commitdiff | tree
2018-12-06 whitequarksynth_ice40: split `map_gates` off `fine`. commit | commitdiff | tree
2018-12-06 Clifford WolfAdd missing .gitignore commit | commitdiff | tree
2018-12-06 Clifford WolfBugfix in opt_expr handling of a<0 and a>=0 commit | commitdiff | tree
2018-12-06 Clifford WolfVerific updates commit | commitdiff | tree
2018-12-05 whitequarkrename: add -src, for inferring names from source locat... commit | commitdiff | tree
2018-12-05 whitequarklut2mux: handle 1-bit INIT constant in $lut cells. commit | commitdiff | tree
2018-12-05 whitequarkopt_lut: simplify type conversion. NFC. commit | commitdiff | tree
2018-12-05 Clifford WolfMerge pull request #709 from smunaut/issue_708 commit | commitdiff | tree
2018-12-05 Clifford WolfMerge pull request #718 from whitequark/gate2lut commit | commitdiff | tree
2018-12-05 whitequarksynth_ice40: add -noabc option, to use built-in LUT... commit | commitdiff | tree
2018-12-05 whitequarkgate2lut: new techlib, for converting Yosys gates to... commit | commitdiff | tree
2018-12-05 whitequarkFix typo. commit | commitdiff | tree
2018-12-05 Clifford WolfMerge pull request #713 from Diego-HR/master commit | commitdiff | tree
2018-12-05 Clifford WolfMerge pull request #712 from mmicko/anlogic-support commit | commitdiff | tree
2018-12-05 Clifford WolfRename opt_lut.cpp to opt_lut.cc commit | commitdiff | tree
2018-12-05 Clifford WolfMerge pull request #717 from whitequark/opt_lut commit | commitdiff | tree
2018-12-05 Clifford WolfMerge pull request #716 from whitequark/ice40_unlut commit | commitdiff | tree
2018-12-05 whitequarkopt_lut: add -dlogic, to avoid disturbing logic such... commit | commitdiff | tree
2018-12-05 whitequarkopt_lut: always prefer to eliminate 1-LUTs. commit | commitdiff | tree
2018-12-05 whitequarkopt_lut: collect and display statistics. commit | commitdiff | tree
2018-12-05 whitequarkopt_lut: refactor to use a worker. NFC. commit | commitdiff | tree
2018-12-05 whitequarksynth_ice40: add -relut option, to run ice40_unlut... commit | commitdiff | tree
2018-12-05 whitequarkopt_lut: new pass, to combine LUTs for tighter packing. commit | commitdiff | tree
2018-12-05 whitequarkExtract ice40_unlut pass from ice40_opt. commit | commitdiff | tree
2018-12-05 Serge BazanskiMerge pull request #719 from YosysHQ/q3k/flailing-aroun... commit | commitdiff | tree
2018-12-05 Sergiusz Bazanskitravis/osx: fix, use clang instead of gcc commit | commitdiff | tree
2018-12-04 Clifford WolfFix typo commit | commitdiff | tree
2018-12-04 Clifford WolfMerge pull request #702 from smunaut/min_ce_use commit | commitdiff | tree
2018-12-04 Diego HChanges in GoWin synth commands and ALU primitive support commit | commitdiff | tree
2018-12-02 Miodrag MilanovicLeave only real black box cells commit | commitdiff | tree
2018-12-01 Miodrag MilanovicInitial support for Anlogic FPGA commit | commitdiff | tree
2018-12-01 Clifford WolfMerge pull request #676 from rafaeltp/master commit | commitdiff | tree
2018-11-29 Clifford WolfImprove ConstEval error handling for non-eval cell... commit | commitdiff | tree
2018-11-27 Sylvain Munautice40: Add option to only use CE if it'd be use by... commit | commitdiff | tree
2018-11-27 Sylvain Munautdff2dffe: Add option for unmap to only remove DFFE... commit | commitdiff | tree
2018-11-24 Sylvain MunautMake return value of $clog2 signed commit | commitdiff | tree
2018-11-20 Clifford WolfAdd iteration limit to "opt_muxtree" commit | commitdiff | tree
2018-11-19 Daniël W. CromptonUsing awk rather than gawk commit | commitdiff | tree
2018-11-13 Clifford WolfUpdate ABC to git rev 2ddc57d commit | commitdiff | tree
2018-11-12 Clifford WolfAdd "write_aiger -I -O -B" commit | commitdiff | tree
2018-11-12 Clifford WolfMerge branch 'master' of github.com:YosysHQ/yosys commit | commitdiff | tree
2018-11-12 Clifford WolfMerge pull request #697 from eddiehung/xilinx_ps7 commit | commitdiff | tree
2018-11-12 Clifford WolfMerge pull request #695 from daveshah1/ecp5_bb commit | commitdiff | tree
2018-11-11 Clifford WolfUpdate ABC to git rev 68da3cf commit | commitdiff | tree
2018-11-10 Eddie HungAdd support for Xilinx PS7 block commit | commitdiff | tree
2018-11-09 Clifford WolfSet Verific flag vhdl_support_variable_slice=1 commit | commitdiff | tree
2018-11-09 David Shahecp5: Add 'fake' DCU parameters commit | commitdiff | tree
2018-11-09 David Shahecp5: Add blackboxes for ancillary DCU cells commit | commitdiff | tree
2018-11-09 Clifford WolfMerge pull request #696 from arjenroodselaar/verific_darwin commit | commitdiff | tree
2018-11-08 Clifford WolfFix "make ystests" to use correct Yosys binary commit | commitdiff | tree
2018-11-08 Arjen RoodselaarUse appropriate static libraries when building with... commit | commitdiff | tree
2018-11-07 Clifford WolfMerge pull request #693 from YosysHQ/rlimit commit | commitdiff | tree
2018-11-07 David Shahecp5: Adding some blackbox cells commit | commitdiff | tree
2018-11-07 Clifford WolfLimit stack size to 16 MB on Darwin commit | commitdiff | tree
2018-11-06 Clifford WolfMerge pull request #694 from trcwm/dffmap_expr_fix commit | commitdiff | tree
2018-11-06 Niels MoseleyDFFLIBMAP: changed 'missing pin' error into a warning... commit | commitdiff | tree
2018-11-06 Clifford WolfRun solver in non-incremental mode whem smtio.py is... commit | commitdiff | tree
2018-11-06 Clifford WolfUpdate ABC rev to 4d56acf commit | commitdiff | tree
2018-11-06 Clifford WolfFix for improved smtio.py rlimit code commit | commitdiff | tree
2018-11-06 Clifford WolfImprove stack rlimit code in smtio.py commit | commitdiff | tree
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