gem5.git
2014-01-24 Ali Saidistats: update stats for ARMv8 changes
2014-01-24 ARM gem5 Developersarm: Add support for ARMv8 (AArch64 & AArch32)
2014-01-24 Ali Saidistats: update stats for cache occupancy and clock domai...
2014-01-24 Andreas Hanssonarch: Make all register index flattening const
2014-01-24 Geoffrey Blakechecker: CheckerCPU handling of MiscRegs was incorrect
2014-01-24 Ali Saidiarch, cpu: Add support for flattening misc register...
2014-01-24 Giacomo Gabriellicpu: Add support for Memory+Barrier instruction types...
2014-01-24 Ali Saidicpu: Add support for instructions that zero cache lines.
2014-01-24 Ali Saidicpu: Add CPU support for generatig wake up events when...
2014-01-24 Giacomo Gabriellimem: Add flag to request if it was generated by a...
2014-01-24 Giacomo Gabriellimem: Add support for a security bit in the memory system
2014-01-24 Chris Adeniyi... sim: Add openat/fstatat syscalls and fix mremap
2014-01-24 Ali Saidimem: Remove explict cast from memhelper.
2014-01-24 Timothy M.... Cache: Collect very basic stats on tag and data accesses
2014-01-24 Dam Sunwoomem: per-thread cache occupancy and per-block ages
2014-01-24 Matt Horsnellbase: add support for probe points and common probes
2014-01-24 Andreas Hanssonsim: Expose the current voltage for each object as...
2014-01-24 Andreas Hanssonsim: Expose the current clock period as a stat
2014-01-24 Matt Horsnellmem: track per-request latencies and access depths...
2014-01-24 Andreas Hanssonconfig: Make the Clock a Tick parameter like Latency...
2014-01-24 Andreas Hanssonx86: Fix memory leak in table walker
2014-01-24 Andreas Hanssoncpu: Relax check on squashed non-speculative instructions
2014-01-24 Dam Sunwooutil: updated Streamline flow to support ARM DS-5 v5...
2014-01-24 Dam Sunwoocpu: remove faulty simpoint basic block inst count...
2014-01-17 Nilay Vaishruby: remove unused label no_vector
2014-01-10 Nilay Vaishstats: updates due to changes to ruby
2014-01-10 Nilay Vaishruby: move all statistics to stats.txt, eliminate ruby...
2014-01-10 Nilay Vaishstats: add function for adding two histograms
2014-01-09 Nilay Vaishruby: fix bug introduced to revision 8523754f8885
2014-01-08 Nilay Vaishruby: slicc: remove variable 'addr' used in calls to...
2014-01-04 Nilay Vaishruby: add a three level MESI protocol.
2014-01-04 Nilay Vaishruby: rename MESI_CMP_directory to MESI_Two_Level
2014-01-04 Nilay Vaishruby: remove cntrl_id from python config scripts.
2014-01-04 Nilay Vaishruby: add support for clusters
2014-01-04 Nilay Vaishruby: some small changes
2014-01-04 Steve Reinhardtconfig, x86: move kernel specification from tests to... stable_2014_02_15
2014-01-04 Steve Reinhardtpython: provide better error message for wrapped C...
2014-01-04 Steve Reinhardtpython: don't die on assignment to cloned object
2013-12-30 Christopher... sim: Add support for dynamic frequency scaling
2013-12-30 Christopher... mips: Floating point convert bug fix
2013-12-26 Nilay Vaishstats: updates due to bug fixed in mesi coherence protocol
2013-12-26 Nilay Vaishruby: fix bugs in mesi cmp directory protocol
2013-12-21 Nilay Vaishruby: slicc: replace max_in_port_rank with number of...
2013-12-21 Nilay Vaishruby: declare variables to be unsigned in Address.hh
2013-12-21 Nilay Vaishruby: mesi: remove owner and sharer fields from directo...
2013-12-03 Nilay Vaishsim: reset stats after startup
2013-12-03 Nilay Vaishcpu: call BaseCPU startup() function in o3 cpu
2013-12-03 Nilay Vaishutil: update checkpoint aggregation script
2013-11-29 Andreas Sandbergbase: Fix race in PollQueue and remove SIGALRM workaround
2013-11-29 Andreas Sandbergbase: Clean up signal handling
2013-11-26 Nilay Vaishstats: updates due to changes to ticksToCycles()
2013-11-26 Nilay Vaishsim: correct ticksToCycles() function.
2013-10-15 Andreas Sandbergkvm: Set the perf exclude_host attribute if available
2013-11-26 Christian Menardx86: Implementation of Int3 and Int_Ib in long mode
2013-11-26 Andreas Sandbergkvm: Remove the unused hostFreq member from BaseKvmCPU
2013-11-25 Steve Reinhardt... sim: simulate with multiple threads and event queues
2013-11-15 Anthony Gutierrezcpu: allow the fetch buffer to be smaller than a cache...
2013-11-15 Andreas Hanssoncpu: Fix Checker register index use
2013-11-14 Steve Reinhardttests: suppress output on switcheroo tests
2013-11-12 Anthony Gutierrezsim: fix event priority name for debug-start option
2013-11-01 Andreas Hanssonstats: Bump stats to match DRAM controller changes
2013-11-01 Andreas Hanssonmem: Fixes for DRAM stats accounting
2013-11-01 Andreas Hanssonmem: Fix the LPDDR3 page size
2013-11-01 Neha Agarwalmem: Adding stats for DRAM power calculation
2013-11-01 Neha Agarwalmem: Unify request selection for read and write queues
2013-11-01 Andreas Hanssonmem: Add a simple adaptive version of the open-page...
2013-11-01 Neha Agarwalmem: Just-in-time write scheduling in DRAM controller
2013-11-01 Andreas Hanssonmem: Add tRRD as a timing parameter for the DRAM controller
2013-11-01 Andreas Hanssonmem: Less conservative tRAS in DRAM configurations
2013-11-01 Ani Udipimem: Make tXAW enforcement less conservative and per...
2013-11-01 Neha Agarwalmem: Fix for 100% write threshold in DRAM controller
2013-11-01 Andreas Hanssonmem: Pick the next DRAM request based on bank availability
2013-11-01 Ani Udipimem: Use the same timing calculation for DRAM read...
2013-11-01 Ani Udipimem: Fix DRAM bank occupancy for streaming access
2013-11-01 Ani Udipimem: Schedule time for DRAM event taking tRAS into...
2013-11-01 Ani Udipimem: Add tRAS parameter to the DRAM controller model
2013-11-01 Andreas Hanssonstats: Bump stats after shifting to SimpleMemory
2013-11-01 Andreas Hanssontest: Use SimpleMemory for atomic full-system tests
2013-11-01 Andreas Hanssonsim: Clarify the difference between tracing and debugging
2013-10-31 Chander SudanthiARM: add support for TEEHBR access
2013-10-31 Matt Evansdev: Add 'OSC' oscillator sys control reg support to...
2013-10-31 Geoffrey Blakedev: Add support for MSI-X and Capability Lists for...
2013-10-31 Geoffrey Blakedev: Fix race conditions in IDE device on newer kernels
2013-10-31 Geoffrey Blakebase: Add support for ipv6 into inet.hh/inet.cc
2013-10-31 Faissal Sleimancpu: Construct ROB with cpu params struct instead of...
2013-10-31 Geoffrey Blakeconfig: Fix handling of parents for simobject vectors
2013-10-31 Dam Sunwoosim: added option to serialize SimLoopExitEvent
2013-10-31 Stephan Diestelhorstmem: Add "const" attribute to Packet getters
2013-10-31 Prakash Ramrakhyanimem: Add privilege info to request class
2013-10-31 Ali Saidiarm: fix m5ops binary for ARM and add m5fail.
2013-10-31 Ali Saidicpu: Fix O3 issuse with load+barrier instructions.
2013-10-30 Lluc Alvarezruby: set SenderMachine in messages of MOESI_CMP_directory
2013-10-30 Emilio Castilloruby: Fixed a deadlock when restoring a checkpoint...
2013-10-17 Stephan Diestelhorstmem: De-virtualise interfaces in the CoherentBus
2013-10-17 Matt Horsnellcpu: add consistent guarding to *_impl.hh files.
2013-10-17 Sascha Bischoffmem: Add PortID to QueuedMasterPort constructor
2013-10-17 Matt Evansarm: Add a 'clear PPI' method to gic_pl390
2013-10-17 Geoffrey Blakeconfig: Fix ommission of number base in ethernet addres...
2013-10-17 Geoffrey Blakeconfig: Fix for port references generated multiple...
2013-10-17 Dam Sunwoodev: Add option to disable framebuffer .bmp dump in...
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