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yosys.git
2015-04-16
Clifford Wolf
A "#" does start a comment, not a label.
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2015-04-16
Clifford Wolf
Changed ice40 ICESTORM_CARRYCONST port name
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2015-04-16
Clifford Wolf
Fixed "dff2dffe -direct-match"
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2015-04-16
Clifford Wolf
Added simple ice40 dff tests
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2015-04-16
Clifford Wolf
improved ice40 dff cell mapping
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2015-04-16
Clifford Wolf
Added "dff2dffe -direct-match"
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2015-04-14
Clifford Wolf
use "hierarchy -auto-top" in synth_ice40
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2015-04-14
Clifford Wolf
more cells in ice40 cell library
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2015-04-13
Clifford Wolf
Added "splice -wires"
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2015-04-13
Clifford Wolf
Added handling of bool-output cells to "wreduce"
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2015-04-09
Clifford Wolf
Improved xilinx "bram1" test
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2015-04-09
Clifford Wolf
Added memory_bram "make_outreg" feature
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2015-04-09
Clifford Wolf
Added back-end auto-detect for .edif and .json
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2015-04-09
Clifford Wolf
Minor fixes in handling of "init" attribute
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2015-04-09
Clifford Wolf
Xilinx DRAMS: RAM64X1D, RAM128X1D
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2015-04-09
Clifford Wolf
Fixed const2big performance bug
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2015-04-09
Clifford Wolf
techmap code cleanup
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2015-04-09
Clifford Wolf
Towards DRAM support in Xilinx flow
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2015-04-08
Clifford Wolf
Added support for "file names with blanks"
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2015-04-08
Clifford Wolf
Removed "techmap -share_map" (use "-map +/filename...
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2015-04-07
Clifford Wolf
Added %M and %C select operators
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2015-04-07
Clifford Wolf
Added "pmuxtree" command
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2015-04-07
Clifford Wolf
Added "chparam -list"
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2015-04-07
Clifford Wolf
Added decoder generation to "muxcover"
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2015-04-07
Clifford Wolf
Added hashlib support for std::tuple<>
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2015-04-07
Clifford Wolf
Added "muxcover" command
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2015-04-07
Clifford Wolf
Added pool<K>::pop()
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2015-04-07
Clifford Wolf
typo fix
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2015-04-07
Clifford Wolf
Added "chparam" command
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2015-04-06
Clifford Wolf
Added support for initialized xilinx brams
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2015-04-06
Clifford Wolf
Added support for initialized brams
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2015-04-06
Clifford Wolf
Added Xilinx test case for initialized brams
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2015-04-06
Clifford Wolf
Added Xilinx bram black-box modules
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2015-04-05
Clifford Wolf
Added "port_directions" to write_json output
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2015-04-05
Clifford Wolf
Avoid parameter values with size 0 ($mem cells)
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2015-04-05
Clifford Wolf
make all vector-size related integer params in $mem...
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2015-04-05
Clifford Wolf
Added $_MUX4_, $_MUX8_, and $_MUX16_ cell types
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2015-04-04
Clifford Wolf
Added "dffinit", Support for initialized Xilinx DFF
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2015-04-04
Clifford Wolf
Added "init" attribute support to verilog backend
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2015-04-04
Clifford Wolf
appnote 012 fix
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2015-04-04
Clifford Wolf
Appnote 012
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2015-04-04
Clifford Wolf
Updated ABC to 51705b168d7a
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2015-04-04
Clifford Wolf
Merge pull request #55 from ahmedirfan1983/master
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2015-04-03
Ahmed Irfan
Update README
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2015-04-03
Ahmed Irfan
Delete btor.ys
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2015-04-03
Ahmed Irfan
Update README
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2015-04-03
Ahmed Irfan
separated memory next from write cell
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2015-04-03
Ahmed Irfan
Merge branch 'master' of https://github.com/cliffordwol...
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2015-04-03
Ahmed Irfan
Merge branch 'btor' of https://github.com/ahmedirfan198...
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2015-04-03
Ahmed Irfan
appnote for verilog to btor
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2015-03-29
Clifford Wolf
documentation improvements
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2015-03-25
Clifford Wolf
Ignore celldefine directive in verilog front-end
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2015-03-25
Clifford Wolf
Fixes in cmos_cells.v
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2015-03-22
Clifford Wolf
Fixed detection of absolute paths in ABC for win32
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2015-03-22
Clifford Wolf
Added blif reference to appnote 010
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2015-03-20
Clifford Wolf
Merge branch 'master' of github.com:cliffordwolf/yosys
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2015-03-20
Clifford Wolf
fix for python 2.6.6
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2015-03-18
Clifford Wolf
Fixed handling of quotes in liberty parser
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2015-03-18
Clifford Wolf
Added hierarchy -auto-top
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2015-03-18
Clifford Wolf
Added Verilog backend $dffsr support
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2015-03-06
Clifford Wolf
Documentation for JSON format, added attributes
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2015-03-05
Clifford Wolf
Added very first version of "synth_ice40"
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2015-03-04
Clifford Wolf
Fixed bug in "hierarchy" for parametric designs
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2015-03-03
Clifford Wolf
Json bugfix
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2015-03-03
Clifford Wolf
Json backend improvements
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2015-03-02
Clifford Wolf
Added write_blif -attr
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2015-03-02
Clifford Wolf
Added JSON backend
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2015-03-01
Clifford Wolf
Const-fold parameter defs on-demand in AstNode::detectS...
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2015-02-26
Clifford Wolf
Added $assume support to write_smt2
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2015-02-26
Clifford Wolf
Added non-std verilog assume() statement
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2015-02-26
Clifford Wolf
Added $assume cell type
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2015-02-25
Clifford Wolf
Merge branch 'master' of github.com:cliffordwolf/yosys
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2015-02-25
Clifford Wolf
Bugfix in iopadmap
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2015-02-25
Clifford Wolf
Added "keep_hierarchy" attribute
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2015-02-24
Clifford Wolf
Some cleanups in "clean"
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2015-02-24
Clifford Wolf
Fixed compilation problems with gcc 4.6.3; use enum...
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2015-02-22
Clifford Wolf
Minor "write_smt2" help msg change
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2015-02-22
Clifford Wolf
Fixed "check -assert"
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2015-02-22
Clifford Wolf
Added "<mod>_a" and "<mod>_i" to write_smt2 output
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2015-02-22
Clifford Wolf
Added "check -assert" doc
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2015-02-22
Clifford Wolf
Added "check -assert"
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2015-02-22
Clifford Wolf
Fixed "sat -initsteps" off-by-one bug
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2015-02-21
Clifford Wolf
Added "sat -stepsize" and "sat -tempinduct-step"
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2015-02-21
Clifford Wolf
sat docu change
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2015-02-21
Clifford Wolf
When "sat -tempinduct-baseonly -maxsteps N" reaches...
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2015-02-21
Clifford Wolf
Added "sat -tempinduct-baseonly -tempinduct-inductonly"
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2015-02-21
Clifford Wolf
Fixed basecase init for "sat -tempinduct"
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2015-02-21
Clifford Wolf
Fixed "flatten" for non-pre-derived modules
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2015-02-21
Clifford Wolf
Hotfix for yosysjs/demo03.html
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2015-02-21
Clifford Wolf
YosysJS: Wait for Viz to load
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2015-02-21
Clifford Wolf
Replaced ezDefaultSAT with ezSatPtr
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2015-02-21
Clifford Wolf
Catch constants assigned to cell outputs in "flatten"
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2015-02-20
Clifford Wolf
Added deep recursion warning to AST simplify
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2015-02-20
Clifford Wolf
Parser support for complex delay expressions
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2015-02-19
Clifford Wolf
YosysJS firefox fixes
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2015-02-19
Clifford Wolf
YosysJS stuff
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2015-02-19
Clifford Wolf
format fixes in "sat -dump_json"
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2015-02-19
Clifford Wolf
Added "sat -dump_json" (WaveJSON format)
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2015-02-19
Clifford Wolf
Changed "show" defaults for Win32
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2015-02-18
Clifford Wolf
Convert floating point cell parameters to strings
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