2019-12-20 |
Eddie Hung | Merge remote-tracking branch 'origin/master' into xaig_dff |
commit | commitdiff | tree |
2019-12-20 |
Eddie Hung | Add abc9_arrival times for RAM{32,64}M |
commit | commitdiff | tree |
2019-12-20 |
Eddie Hung | Merge remote-tracking branch 'origin/master' into xaig_dff |
commit | commitdiff | tree |
2019-12-20 |
Eddie Hung | Add RAM{32,64}M to abc9_map.v |
commit | commitdiff | tree |
2019-12-20 |
Eddie Hung | Put specify/endspecify inside `` |
commit | commitdiff | tree |
2019-12-20 |
Eddie Hung | Merge pull request #1585 from YosysHQ/eddie/fix_abc9_lut |
commit | commitdiff | tree |
2019-12-20 |
Eddie Hung | Merge pull request #1587 from YosysHQ/revert-1558-eddie... |
commit | commitdiff | tree |
2019-12-20 |
Eddie Hung | Revert "Optimise write_xaiger" |
commit | commitdiff | tree |
2019-12-20 |
Graham Edgecombe | Fix linking with Python 3.8 |
commit | commitdiff | tree |
2019-12-20 |
Graham Edgecombe | Add PYTHON_CONFIG variable to the Makefile |
commit | commitdiff | tree |
2019-12-19 |
Eddie Hung | Add RAM{32,64}M to abc9_map.v |
commit | commitdiff | tree |
2019-12-19 |
Eddie Hung | Split into $__ABC9_ASYNC[01], do not add cell->type... |
commit | commitdiff | tree |
2019-12-19 |
Eddie Hung | Merge remote-tracking branch 'origin/master' into xaig_dff |
commit | commitdiff | tree |
2019-12-19 |
Eddie Hung | Merge pull request #1581 from YosysHQ/clifford/fix1565 |
commit | commitdiff | tree |
2019-12-19 |
Eddie Hung | Merge pull request #1558 from YosysHQ/eddie/xaiger_cleanup |
commit | commitdiff | tree |
2019-12-19 |
Eddie Hung | Merge pull request #1569 from YosysHQ/eddie/fix_1531 |
commit | commitdiff | tree |
2019-12-19 |
Eddie Hung | Merge pull request #1571 from YosysHQ/eddie/fix_1570 |
commit | commitdiff | tree |
2019-12-19 |
Marcin Kościelnicki | xilinx: Add simulation models for remaining CLB primitives. |
commit | commitdiff | tree |
2019-12-19 |
Marcin Kościelnicki | xilinx_dffopt: Keep order of LUT inputs. |
commit | commitdiff | tree |
2019-12-18 |
Eddie Hung | Bump ABC again |
commit | commitdiff | tree |
2019-12-18 |
Eddie Hung | Interpret "abc9 -lut" as lut string only if [0-9:] |
commit | commitdiff | tree |
2019-12-18 |
Eddie Hung | Add "scratchpad" to CHANGELOG |
commit | commitdiff | tree |
2019-12-18 |
Eddie Hung | Merge branch 'master' of github.com:YosysHQ/yosys |
commit | commitdiff | tree |
2019-12-18 |
David Shah | Merge pull request #1563 from YosysHQ/dave/async-prld |
commit | commitdiff | tree |
2019-12-18 |
Eddie Hung | Merge pull request #1572 from nakengelhardt/scratchpad_pass |
commit | commitdiff | tree |
2019-12-18 |
Eddie Hung | Merge pull request #1584 from YosysHQ/mwk/xilinx-flaky... |
commit | commitdiff | tree |
2019-12-18 |
Marcin Kościelnicki | tests/xilinx: fix flaky mux test |
commit | commitdiff | tree |
2019-12-18 |
Marcin Kościelnicki | xilinx: Add xilinx_dffopt pass (#1557) |
commit | commitdiff | tree |
2019-12-18 |
Marcin Kościelnicki | xilinx: Improve flip-flop handling. |
commit | commitdiff | tree |
2019-12-18 |
Clifford Wolf | Send people to symbioticeda.com instead of verific.com |
commit | commitdiff | tree |
2019-12-18 |
N. Engelhardt | use extra_args |
commit | commitdiff | tree |
2019-12-18 |
Eddie Hung | Remove &verify -s |
commit | commitdiff | tree |
2019-12-18 |
Eddie Hung | Bump ABC for upstream fix |
commit | commitdiff | tree |
2019-12-18 |
Eddie Hung | Use pool<> instead of std::set<> to preserver ordering |
commit | commitdiff | tree |
2019-12-17 |
Eddie Hung | aiger frontend to user shorter, $-prefixed, names |
commit | commitdiff | tree |
2019-12-17 |
Eddie Hung | Cleanup xaiger, remove unnecessary complexity with... |
commit | commitdiff | tree |
2019-12-17 |
Eddie Hung | read_xaiger to cope with optional '\n' after 'c' |
commit | commitdiff | tree |
2019-12-17 |
Clifford Wolf | Fix sim for assignments with lhs<rhs size, fixes #1565 |
commit | commitdiff | tree |
2019-12-17 |
Eddie Hung | Cleanup |
commit | commitdiff | tree |
2019-12-17 |
Eddie Hung | Do not sigmap |
commit | commitdiff | tree |
2019-12-17 |
Eddie Hung | Revert "Use sigmap signal" |
commit | commitdiff | tree |
2019-12-17 |
Eddie Hung | Merge pull request #1574 from YosysHQ/eddie/xilinx_lutram |
commit | commitdiff | tree |
2019-12-17 |
Eddie Hung | Merge pull request #1521 from dh73/diego/memattr |
commit | commitdiff | tree |
2019-12-17 |
Eddie Hung | abc9 needs a clean afterwards |
commit | commitdiff | tree |
2019-12-17 |
Eddie Hung | Enforce non-existence |
commit | commitdiff | tree |
2019-12-17 |
Eddie Hung | Put $__ABC9_{FF_,ASYNC} into same clock domain as abc9_flop |
commit | commitdiff | tree |
2019-12-17 |
Eddie Hung | Use sigmap signal |
commit | commitdiff | tree |
2019-12-16 |
Eddie Hung | Update doc |
commit | commitdiff | tree |
2019-12-16 |
Eddie Hung | Skip $inout transformation if not a PI |
commit | commitdiff | tree |
2019-12-16 |
Eddie Hung | Revert "write_xaiger: use sigmap bits more consistently" |
commit | commitdiff | tree |
2019-12-16 |
Eddie Hung | Add another test |
commit | commitdiff | tree |
2019-12-16 |
Eddie Hung | More sloppiness, thanks @dh73 for spotting |
commit | commitdiff | tree |
2019-12-16 |
Eddie Hung | Accidentally commented out tests |
commit | commitdiff | tree |
2019-12-16 |
Eddie Hung | Add unconditional match blocks for force RAM |
commit | commitdiff | tree |
2019-12-16 |
Eddie Hung | Oops |
commit | commitdiff | tree |
2019-12-16 |
Eddie Hung | Merge blockram tests |
commit | commitdiff | tree |
2019-12-16 |
Eddie Hung | Update xc7/xcu bram rules |
commit | commitdiff | tree |
2019-12-16 |
Eddie Hung | Implement 'attributes' grammar |
commit | commitdiff | tree |
2019-12-16 |
Eddie Hung | Merge branch 'diego/memattr' of https://github.com... |
commit | commitdiff | tree |
2019-12-16 |
Eddie Hung | Merge branch 'eddie/xilinx_lutram' of github.com:YosysH... |
commit | commitdiff | tree |
2019-12-16 |
Eddie Hung | Populate DID/DOD even if unused |
commit | commitdiff | tree |
2019-12-16 |
Eddie Hung | Rename *RAM{32,64}M rules to RAM{32X2,64X1}Q |
commit | commitdiff | tree |
2019-12-16 |
Eddie Hung | write_xaiger: use sigmap bits more consistently |
commit | commitdiff | tree |
2019-12-16 |
Diego H | Fixing compiler warning/issues. Moving test script... |
commit | commitdiff | tree |
2019-12-16 |
N. Engelhardt | add assert option to scratchpad command |
commit | commitdiff | tree |
2019-12-16 |
Diego H | Removing fixed attribute value to !ramstyle rules |
commit | commitdiff | tree |
2019-12-16 |
Diego H | Merging attribute rules into a single match block;... |
commit | commitdiff | tree |
2019-12-16 |
Eddie Hung | Merge pull request #1575 from rodrigomelo9/master |
commit | commitdiff | tree |
2019-12-16 |
Eddie Hung | Merge pull request #1577 from gromero/for-yosys |
commit | commitdiff | tree |
2019-12-16 |
Eddie Hung | Merge pull request #1578 from noopwafel/eqneq-debug |
commit | commitdiff | tree |
2019-12-15 |
Alyssa Milburn | Fix opt_expr.eqneq.cmpzero debug print |
commit | commitdiff | tree |
2019-12-14 |
Eddie Hung | Name inputs/outputs of aiger 'i%d' and 'o%d' |
commit | commitdiff | tree |
2019-12-13 |
Diego H | Refactoring memory attribute matching based on IEEE... |
commit | commitdiff | tree |
2019-12-13 |
Eddie Hung | Merge pull request #1533 from dh73/bram_xilinx |
commit | commitdiff | tree |
2019-12-13 |
Eddie Hung | Disable RAM16X1D test |
commit | commitdiff | tree |
2019-12-13 |
Eddie Hung | Disable RAM16X1D match rule; carry-over from LUT4 arches |
commit | commitdiff | tree |
2019-12-13 |
Eddie Hung | RAM64M8 to also have [5:0] for address |
commit | commitdiff | tree |
2019-12-13 |
Diego H | Renaming BRAM memory tests for the sake of uniformity |
commit | commitdiff | tree |
2019-12-13 |
Rodrigo Alejandro... | Fixed some missing "verilog_" in documentation |
commit | commitdiff | tree |
2019-12-13 |
N. Engelhardt | add periods and newlines to help message |
commit | commitdiff | tree |
2019-12-13 |
Eddie Hung | Remove extraneous synth_xilinx call |
commit | commitdiff | tree |
2019-12-13 |
Eddie Hung | Add tests for these new models |
commit | commitdiff | tree |
2019-12-13 |
Eddie Hung | Add RAM32X6SDP and RAM64X3SDP modes |
commit | commitdiff | tree |
2019-12-13 |
Eddie Hung | Fix RAM64M model to have 6 bit address bus |
commit | commitdiff | tree |
2019-12-13 |
Eddie Hung | Add #1460 testcase |
commit | commitdiff | tree |
2019-12-13 |
Eddie Hung | Add memory rules for RAM16X1D, RAM32M, RAM64M |
commit | commitdiff | tree |
2019-12-13 |
Eddie Hung | Rename memory tests to lutram, add more xilinx tests |
commit | commitdiff | tree |
2019-12-12 |
Diego H | Fixing citation in xc7_xcu_brams.txt file. Fixing RAMB3... |
commit | commitdiff | tree |
2019-12-12 |
Eddie Hung | Remove 'clkpart' entry in CHANGELOG |
commit | commitdiff | tree |
2019-12-12 |
Eddie Hung | Merge remote-tracking branch 'origin/master' into xaig_dff |
commit | commitdiff | tree |
2019-12-12 |
Eddie Hung | abc9_map.v: fix Xilinx LUTRAM |
commit | commitdiff | tree |
2019-12-12 |
Eddie Hung | abc9_map.v: fix Xilinx LUTRAM |
commit | commitdiff | tree |
2019-12-12 |
Diego H | Adding a note (TODO) in the memory_params.ys check... |
commit | commitdiff | tree |
2019-12-12 |
N. Engelhardt | add test and make help message more verbose |
commit | commitdiff | tree |
2019-12-12 |
Diego H | Updating RAMB36E1 thresholds. Adding test for both... |
commit | commitdiff | tree |
2019-12-12 |
Diego H | Merge https://github.com/YosysHQ/yosys into bram_xilinx |
commit | commitdiff | tree |
2019-12-12 |
Eddie Hung | Make SV2017 compliant courtesy of @wsnyder |
commit | commitdiff | tree |
2019-12-12 |
N. Engelhardt | add a command to read/modify scratchpad contents |
commit | commitdiff | tree |
2019-12-12 |
Eddie Hung | Stray log_dump |
commit | commitdiff | tree |
2019-12-12 |
Eddie Hung | Preserve size of $genval$-s in for loops |
commit | commitdiff | tree |
next |