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riscv-isa-sim.git
2013-10-29
Andrew Waterman
Pass target machine's return code back to OS
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2013-10-22
Yunsup Lee
clarify vxcptsave/vxctkill semantics
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2013-10-19
Yunsup Lee
implement vxcptsave/vxcptrestore
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2013-10-19
Yunsup Lee
clean up SR_EA, the enable accelerator bit in status reg
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2013-10-19
Yunsup Lee
more hwacha supervisor stuff
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2013-10-19
Yunsup Lee
refactor disassembler, and add hwacha disassembler
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2013-10-18
Yunsup Lee
can't execute frsr/fssr on ut
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2013-10-18
Yunsup Lee
or into control thread's fp exceptions
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2013-10-18
Yunsup Lee
catch trap_illegal_instruction in hwacha
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2013-10-18
Yunsup Lee
add hwacha exception support
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2013-10-18
Yunsup Lee
fix custom-1 rocc encoding
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2013-10-16
Yunsup Lee
fix maxvl calc logic
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2013-10-16
Yunsup Lee
use reset virtual method
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2013-10-16
Yunsup Lee
use uint32_t for vl
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2013-10-16
Yunsup Lee
fix missing null check when there's no extension
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2013-10-16
Yunsup Lee
revamp hwacha; now runs in physical mode
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2013-10-15
Stephen Twigg
Propogate the reset call to the extensions as well...
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2013-10-15
Stephen Twigg
Fix bug where xs2 was not being properly respected.
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2013-10-10
Yunsup Lee
commit configure script; new configure option --enable...
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2013-09-27
Christopher...
Added commit logging (--enable-commitlog). Also fixed...
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2013-09-27
Andrew Waterman
Use WRITE_RD/WRITE_FRD macros to write registers
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2013-09-27
Andrew Waterman
Bye, CB
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2013-09-23
Scott Beamer
fixes compile bug for not being able to find std::logic...
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2013-09-23
Andrew Waterman
Fix Scott's deadlock
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2013-09-22
Stephen Twigg
Adjust rocc_inst_t to properly extract fields due to...
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2013-09-21
Andrew Waterman
Update ISA encoding and AUIPC semantics
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2013-09-15
Andrew Waterman
Add helper disassembly program
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2013-09-15
Andrew Waterman
ISA changes
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2013-09-11
Andrew Waterman
Add AMOXOR
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2013-09-11
Andrew Waterman
Implement zany immediates
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2013-09-10
Andrew Waterman
Don't tick HTIF as often
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2013-09-10
Andrew Waterman
Add rd field to JAL; drop J
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2013-08-18
Andrew Waterman
Renumber PCRs
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2013-08-13
Andrew Waterman
Add test program for dummy rocc
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2013-08-13
Andrew Waterman
Implement RoCC and add a dummy RoCC
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2013-08-12
Andrew Waterman
Instructions are no longer member functions
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2013-08-08
Andrew Waterman
Ignore JALR's effective address LSB
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2013-08-08
Andrew Waterman
Disentangle some header files
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2013-08-08
Andrew Waterman
Rename MTFSR/MFFSR to FSSR/FRSR
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2013-08-08
Andrew Waterman
Swap J and JALR encoding
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2013-08-01
Quan Nguyen
Fix eret (again)
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2013-07-31
Andrew Waterman
Fix dumb ERET bug
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2013-07-29
Andrew Waterman
Don't flush TLB on PTBR writes (only FATC)
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2013-07-27
Andrew Waterman
New supervisor mode
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2013-07-27
Andrew Waterman
Remove more vector stuff
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2013-07-27
Andrew Waterman
Rename MFTX/MXTF to FMV
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2013-07-26
Andrew Waterman
Rip out Hwacha for now
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2013-07-26
Andrew Waterman
Rip out RVC for now
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2013-07-26
Andrew Waterman
Generate instruction decoder dynamically
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2013-07-25
Andrew Waterman
Remove JALR static hints
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2013-07-23
Andrew Waterman
Kill spike when xspike is SIGINTed
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2013-07-22
Andrew Waterman
Don't use stdout for debugging
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2013-07-22
Andrew Waterman
Add xspike program
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2013-07-20
Andrew Waterman
Use calloc to allocate target memory
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2013-07-13
Andrew Waterman
Eliminate infinite loop in debug mode
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2013-07-13
Andrew Waterman
Exit cleanly from debug console
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2013-07-13
Andrew Waterman
Favor procs.size() over num_cores()
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2013-07-13
Andrew Waterman
Fix SR_U64 bit being ignored
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2013-06-03
Andrew Waterman
make spike.o correctly depend on dispatch.h
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2013-06-03
Andrew Waterman
use coreutils `seq' instead of hacky `range'
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2013-05-15
Yunsup Lee
change riscv-isa-run to spike in documentation
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2013-05-15
Yunsup Lee
fix make issue
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2013-05-14
Yunsup Lee
change riscv-isa-run to spike
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2013-05-06
Andrew Waterman
make Makefile sh-friendly
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2013-04-25
Andrew Waterman
use inttypes macros to print uint64_t
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2013-04-25
Andrew Waterman
fix(?) circular dependence on generated headers
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2013-04-25
Andrew Waterman
add range(start, end) method to Makefile
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2013-04-24
Yunsup Lee
fixes to correctly simulate the vector unit
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2013-04-23
Andrew Waterman
make interactive mode cope with canonical terminal
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2013-04-23
Andrew Waterman
destroy htif on simulator termination
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2013-04-22
Andrew Waterman
correctly depend on dispatch.h
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2013-04-20
Andrew Waterman
remove circular dependence in Makefile
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2013-04-20
Andrew Waterman
update abi register names
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2013-04-17
Andrew Waterman
add AUIPC insn; remove RDNPC insn
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2013-03-30
Andrew Waterman
add load-reserved/store-conditional instructions
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2013-03-30
Andrew Waterman
ignore writes to SR IP field
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2013-03-27
Andrew Waterman
opcodes.h must only contain DECLARE_INSN() lines
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2013-03-26
Andrew Waterman
add BSD license
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2013-03-26
Andrew Waterman
update ancient README
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2013-03-26
Andrew Waterman
truncate effective addresses in rv32
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2013-03-26
Andrew Waterman
expose pending interrupts in status register
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2013-03-26
Andrew Waterman
add missing #include
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2013-03-26
Andrew Waterman
ignore host writes to fromhost if old value not 0
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2013-03-26
Andrew Waterman
support compilation with gcc 4.7
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2013-02-15
Andrew Waterman
fix D$ model not acknowledging stores
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2013-02-15
Andrew Waterman
specialize fully-associative caches
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2013-02-15
Andrew Waterman
don't store host pointers in soft TLB
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2013-02-13
Andrew Waterman
clean up fetch-execute loop a bit
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2013-02-13
Andrew Waterman
add I$/D$/L2$ simulators
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2013-02-13
Andrew Waterman
migrate to c++11
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2013-02-13
Andrew Waterman
make HTIF interactions deterministic; fix race
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2013-01-26
Andrew Waterman
remove unnecessary #include
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2013-01-26
Andrew Waterman
change htif to link against libfesvr
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2012-11-13
Yunsup Lee
fix vector code simulation problem, turn on SR_U64
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2012-08-31
Andrew Waterman
new tohost/fromhost semantics
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2012-08-02
Andrew Waterman
new tohost/fromhost semantics
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2012-07-23
Andrew Waterman
correct HTIF reset behavior
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2012-05-16
Andrew Waterman
fix htif interaction with interactive mode
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2012-05-09
Andrew Waterman
per-core tohost/fromhost registers
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2012-03-24
Andrew Waterman
new supervisor mode
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