| 2017-10-12 |
Clifford Wolf | Merge pull request #434 from Kmanfi/vector_fix |
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| 2017-10-12 |
Kaj Tuomi | Fix input vector for reduce cells. |
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| 2017-10-12 |
Clifford Wolf | Add Verific fairness/liveness support |
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| 2017-10-11 |
Clifford Wolf | Update ABC to hg rev 6283c5d99b06 |
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| 2017-10-10 |
Clifford Wolf | Merge branch 'master' of github.com:cliffordwolf/yosys |
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| 2017-10-10 |
Clifford Wolf | Start work on pre-processor for Verific SVA properties |
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| 2017-10-10 |
Clifford Wolf | Rewrite ABC output to include proper net names in timin... |
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| 2017-10-10 |
Clifford Wolf | Add timing constraints to osu035 example |
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| 2017-10-10 |
Clifford Wolf | Remove some dead code |
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| 2017-10-10 |
Clifford Wolf | Allow $past, $stable, $rose, $fell in $global_clock... |
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| 2017-10-07 |
Clifford Wolf | Add $shiftx support to verilog front-end |
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| 2017-10-06 |
Clifford Wolf | Update ABC to hg rev 0fc1803a77c0 |
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| 2017-10-05 |
Larry Doolittle | Clean whitespace and permissions in techlibs/intel |
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| 2017-10-05 |
Clifford Wolf | Improve handling of Verific errors |
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| 2017-10-04 |
Clifford Wolf | Improve Verific error handling, check VHDL static asserts |
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| 2017-10-04 |
Clifford Wolf | Add blackbox command |
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| 2017-10-04 |
Clifford Wolf | Fix nasty bug in Verific bindings |
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| 2017-10-03 |
Clifford Wolf | Merge branch 'pr_ast_const_funcs' of https://github... |
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| 2017-10-03 |
Clifford Wolf | Merge branch 'fix_shift_reduce_conflict' of https:... |
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| 2017-10-03 |
Clifford Wolf | Merge branch 'dh73-master' |
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| 2017-10-03 |
Clifford Wolf | Rename "write_verilog -nobasenradix" to "write_verilog... |
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| 2017-10-02 |
dh73 | Tested and working altsyncarm without init files |
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| 2017-10-01 |
dh73 | Fixed wrong declaration in Verilog backend |
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| 2017-10-01 |
dh73 | Adding Cyclone IV (E, GX), Arria 10, Cyclone V and... |
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| 2017-09-30 |
Udi Finkelstein | Turned a few member functions into const, esp. dumpAst... |
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| 2017-09-30 |
Udi Finkelstein | Resolved classical Bison IF/THEN/ELSE shift/reduce... |
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| 2017-09-29 |
Clifford Wolf | Add first draft of eASIC back-end |
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| 2017-09-29 |
Clifford Wolf | Fix synth_ice40 doc regarding -top default |
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| 2017-09-29 |
Clifford Wolf | Allow $size and $bits in verilog mode, actually check... |
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| 2017-09-29 |
Clifford Wolf | Merge pull request #425 from udif/udif_dollar_bits |
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| 2017-09-28 |
Clifford Wolf | Merge pull request #421 from stephengroat/osx-travis |
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| 2017-09-27 |
Stephen | delete bad backslash |
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| 2017-09-27 |
Stephen | forgot to install bundles |
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| 2017-09-27 |
Stephen Groat | Add osx tests using brew bundle |
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| 2017-09-27 |
Clifford Wolf | Increase maximum LUT size in blifparse to 12 bits |
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| 2017-09-26 |
Udi Finkelstein | $size() now works correctly for all cases! |
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| 2017-09-26 |
Udi Finkelstein | $size() seems to work now with or without the optional... |
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| 2017-09-26 |
Clifford Wolf | Parse reals as string in JSON front-end |
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| 2017-09-26 |
Clifford Wolf | Merge branch 'vlogpp-inc-fixes' |
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| 2017-09-26 |
Clifford Wolf | Minor coding style fix |
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| 2017-09-26 |
Clifford Wolf | Merge branch 'master' of https://github.com/combinatory... |
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| 2017-09-26 |
Udi Finkelstein | enable $bits() and $size() functions only when the... |
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| 2017-09-26 |
Udi Finkelstein | Added $bits() for memories as well. |
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| 2017-09-26 |
Udi Finkelstein | $size() now works with memories as well! |
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| 2017-09-26 |
Udi Finkelstein | Add $size() function. At the moment it works only on... |
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| 2017-09-25 |
Clifford Wolf | Fix ignoring of simulation timings so that invalid... |
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| 2017-09-21 |
combinatorylogic | Adding support for string macros and macros with argume... |
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| 2017-09-16 |
Clifford Wolf | Merge pull request #413 from azonenberg/extract-reduce... |
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| 2017-09-16 |
Andrew Zonenberg | Added missing "break" |
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| 2017-09-15 |
Andrew Zonenberg | Implemented off-chain support for extract_reduce |
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| 2017-09-15 |
Andrew Zonenberg | extract_reduce now only removes the head of the chain... |
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| 2017-09-15 |
Clifford Wolf | Merge branch 'master' of github.com:cliffordwolf/yosys |
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| 2017-09-15 |
Clifford Wolf | Update ABC to hg rev cd6984ee82d4 |
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| 2017-09-14 |
Clifford Wolf | Merge pull request #412 from azonenberg/reduce-fixes |
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| 2017-09-14 |
Robert Ou | extract_reduce: Fix segfault on "undriven" inputs |
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| 2017-09-14 |
Clifford Wolf | Merge pull request #411 from azonenberg/counter-extract... |
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| 2017-09-14 |
Clifford Wolf | Merge pull request #410 from azonenberg/opt_demorgan |
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| 2017-09-14 |
Andrew Zonenberg | Minor changes to opt_demorgan requested during code... |
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| 2017-09-14 |
Andrew Zonenberg | Fixed bug where counter extraction on non-GreenPAK... |
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| 2017-09-14 |
Andrew Zonenberg | Added support for inferring counters with reset to... |
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| 2017-09-14 |
Andrew Zonenberg | Added RESET_TO_MAX parameter to $__COUNT_ cell. Cannot... |
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| 2017-09-14 |
Andrew Zonenberg | Added support for inferring counters with active-low... |
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| 2017-09-14 |
Andrew Zonenberg | Initial support for extraction of counters with clock... |
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| 2017-09-14 |
Andrew Zonenberg | Fixed typo in comment. Fixed bug where extract_counter... |
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| 2017-09-13 |
Andrew Zonenberg | Initial version of opt_demorgan is functioning for... |
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| 2017-09-09 |
Clifford Wolf | Add src attribute to extra cells generated by proc_dlatch |
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| 2017-09-09 |
Clifford Wolf | Add src arguments to all cell creator helper functions |
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| 2017-09-02 |
Clifford Wolf | Further improve extract_fa (but still buggy) |
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| 2017-09-02 |
Clifford Wolf | Merge pull request #406 from azonenberg/coolrunner... |
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| 2017-09-02 |
Clifford Wolf | Merge pull request #405 from azonenberg/gpak-refactoring |
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| 2017-09-01 |
Robert Ou | coolrunner2: Finish fixing special-use p-terms |
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| 2017-09-01 |
Robert Ou | coolrunner2: Generate a feed-through AND term when... |
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| 2017-09-01 |
Robert Ou | coolrunner2: Initial fixes for special p-terms |
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| 2017-09-01 |
Robert Ou | coolrunner2: Fix mapping of flip-flops |
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| 2017-09-01 |
Robert Ou | coolrunner2: Combine some for loops together |
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| 2017-09-01 |
Andrew Zonenberg | Fixed typo in error message |
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| 2017-09-01 |
Andrew Zonenberg | Added blackbox $__COUNT_ cell model |
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| 2017-09-01 |
Andrew Zonenberg | Refactoring: moved modules still in cells_sim to cells_... |
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| 2017-09-01 |
Clifford Wolf | Merge branch 'master' of github.com:cliffordwolf/yosys |
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| 2017-09-01 |
Clifford Wolf | Merge branch 'ChipScan-master' |
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| 2017-09-01 |
Clifford Wolf | Update more stuff to use get_src_attribute() and set_sr... |
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| 2017-08-31 |
Jason Lowdermilk | updated to use get_src_attribute() and set_src_attribute(). |
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| 2017-08-31 |
Clifford Wolf | Merge pull request #399 from azonenberg/counter-extraction |
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| 2017-08-31 |
Andrew Zonenberg | Merge branch 'counter-extraction' of github.com:azonenb... |
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| 2017-08-31 |
Andrew Zonenberg | extract_counter: Added optimizations to remove unused... |
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| 2017-08-30 |
Andrew Zonenberg | Merge branch 'master' of https://github.com/cliffordwol... |
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| 2017-08-30 |
Andrew Zonenberg | extract_counter: Minor changes requested to comply... |
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| 2017-08-30 |
Jason Lowdermilk | Merge remote-tracking branch 'upstream/master' |
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| 2017-08-30 |
Jason Lowdermilk | fix indent level |
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| 2017-08-30 |
Clifford Wolf | Merge pull request #397 from azonenberg/gpak-libfixes |
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| 2017-08-30 |
Clifford Wolf | Add {get,set}_src_attribute() methods on RTLIL::AttrObject |
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| 2017-08-29 |
Jason Lowdermilk | Add support for source line tracking through synthesis... |
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| 2017-08-29 |
Andrew Zonenberg | Finished refactoring counter extraction to be nice... |
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| 2017-08-29 |
Andrew Zonenberg | Refactored extract_counter to be generic vs GreenPAK... |
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| 2017-08-29 |
Andrew Zonenberg | Refactoring: Renamed greenpak4_counters pass to extract... |
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| 2017-08-28 |
Andrew Zonenberg | Reformatted GP_COUNTx_ADV resets to avoid Yosys thinkin... |
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| 2017-08-28 |
Clifford Wolf | Merge branch 'azonenberg-recover-reduce' |
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| 2017-08-28 |
Clifford Wolf | Rename recover_reduce to extract_reduce, fix args handling |
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| 2017-08-28 |
Clifford Wolf | Merge branch 'recover-reduce' of https://github.com... |
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| 2017-08-28 |
Clifford Wolf | Further improve extract_fa pass |
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