litex.git
2013-02-10 Sebastien BourdeauducqMerge branch 'master' of github.com:milkymist/migen
2013-02-10 Sebastien Bourdeauducqdoc/dataflow: remove ActorNode
2013-02-10 Sebastien Bourdeauducqdoc/dataflow: remove ALA
2013-02-10 Sebastien Bourdeauducqdoc: multiple clock domains
2013-02-10 Sebastien Bourdeauducqdoc: do not inline examples as this never works with...
2013-02-10 Sebastien Bourdeauducqdoc: update to new Migen APIs
2013-02-09 Sebastien Bourdeauducqsim: default runner to Icarus Verilog
2013-02-09 Sebastien Bourdeauducqflow/perftools: finish removing ActorNode
2013-01-24 Sebastien Bourdeauducqfhdl/structure: store clock domain name
2013-01-23 Sebastien Bourdeauducqfhdl/verilog: fix spurious clock/reset signals on multi...
2013-01-05 Sebastien Bourdeauducqcorelogic: complex arithmetic support
2013-01-05 Sebastien Bourdeauducqfhdl: support nested statement lists
2012-12-19 Sebastien Bourdeauducqpytholite: fix bug with constant assignment to register
2012-12-19 Sebastien Bourdeauducqpytholite: prune unused registers
2012-12-18 Sebastien BourdeauducqDo not use super()
2012-12-16 Sebastien Bourdeauducqexamples/pytholite: fix imports
2012-12-14 Sebastien Bourdeauducqfhdl/tools: bitreverse
2012-12-14 Sebastien Bourdeauducqactorlib/sim/SimActor: do not drive busy low when gener...
2012-12-14 Sebastien BourdeauducqToken: support idle_wait
2012-12-14 Sebastien BourdeauducqMove Token to migen.flow.transactions
2012-12-12 Sebastien Bourdeauducqreplace some forgotten is_abstract()
2012-12-12 Sebastien BourdeauducqRemove ActorNode
2012-12-06 Sebastien BourdeauducqMerge branch 'master' of github.com:milkymist/migen
2012-12-06 Sebastien Bourdeauducqfhdl/structure: do not create Signal in Instance when...
2012-12-06 Sebastien Bourdeauducqelsewhere: do not create interface in default param
2012-12-06 Sebastien Bourdeauducqmigen/bank: do not create interface in default param
2012-12-06 Sebastien Bourdeauducqbus/csr: add SRAM
2012-12-06 Sebastien Bourdeauducqbank/csrgen: interface -> bus
2012-12-05 Sebastien Bourdeauducqbank/description: define reset value of read signal
2012-12-05 Sebastien Bourdeauducqactorlib/sim: drive busy high until generator is finished
2012-12-01 Sebastien Bourdeauducqbus/wishbone/sram: accept memories < 32 bits
2012-12-01 Sebastien Bourdeauducqbus/wishbone: add SRAM
2012-11-30 Sebastien Bourdeauducqpytholite: fix bit width of selection signal
2012-11-30 Sebastien Bourdeauducqpytholite: support signed registers
2012-11-29 Sebastien Bourdeauducqcorelogic/roundrobin: fix request width (again)
2012-11-29 Sebastien Bourdeauducqcorelogic/roundrobin: fix request width
2012-11-29 Sebastien BourdeauducqFix various errors from new bitwidth/signedness system...
2012-11-29 Sebastien Bourdeauducqfhdl/verilog: make signal behave as integers in arithme...
2012-11-29 Sebastien Bourdeauducqfhdl/structure: add unary minus
2012-11-29 Sebastien BourdeauducqReplace Signal(bits_for(... with Signal(max=...
2012-11-29 Sebastien BourdeauducqNew specification for width and signedness
2012-11-29 Sebastien BourdeauducqRefactor Case
2012-11-28 Sebastien Bourdeauducqpytholite/reg: use source id in dictionary
2012-11-28 Sebastien BourdeauducqRemove Constant
2012-11-28 Sebastien Bourdeauducqexamples/sim/dataflow: update to new APIs
2012-11-28 Sebastien Bourdeauducqexamples/dataflow/dma: update to new APIs
2012-11-28 Sebastien Bourdeauducqexamples/basic: remove unroll example
2012-11-28 Sebastien Bourdeauducqfhdl/structure: improved bits_for function
2012-11-28 Sebastien Bourdeauducqvisit/NodeTransformer: copy most nodes
2012-11-28 Sebastien Bourdeauducqfhdl/tools: use NodeTransformer to lower arrays
2012-11-26 Sebastien Bourdeauducqexamples/basic/arrays: add array assignment to fragment
2012-11-26 Sebastien Bourdeauducqfhdl/tools: use NodeVisitor
2012-11-26 Sebastien BourdeauducqRemove unroll
2012-11-26 Sebastien Bourdeauducqfhdl/structure: remove deprecated MemoryPort
2012-11-26 Sebastien Bourdeauducqbus/wishbone2asmi: do not use MemoryPort
2012-11-26 Sebastien Bourdeauducqactorlib/spi: do not use MemoryPort
2012-11-26 Sebastien Bourdeauducqexamples/sim/memory: do not use MemoryPort
2012-11-23 Sebastien Bourdeauducqactorlib/sim: Dumper
2012-11-23 Sebastien Bourdeauducqfhdl/structure: disable we_granularity when larger...
2012-11-23 Sebastien Bourdeauducqsim/generic/multiread: do not return spurious items
2012-11-23 Sebastien Bourdeauducqpytholite: fix import of _Slice
2012-11-23 Sebastien Bourdeauducqpytholite/io: support memory
2012-11-23 Sebastien Bourdeauducqfhdl/structure/Memory: fix we width
2012-11-23 Sebastien Bourdeauducqexamples/memory: use new get_port API
2012-11-23 Sebastien Bourdeauducqfhdl/structure: add Memory.get_port API
2012-11-23 Sebastien Bourdeauducqfhdl: use object creation counter (HUID) as hash. This...
2012-11-23 Sebastien Bourdeauducqfhdl/structure: use sets for memories and instance...
2012-11-23 Sebastien Bourdeauducqexamples/pytholite/uio: demonstrate memories
2012-11-23 Sebastien Bourdeauducquio: support memories
2012-11-23 Sebastien Bourdeauducqbus: memory initiator
2012-11-23 Sebastien Bourdeauducqpytholite/io: fix Wishbone writes + support sel attribute
2012-11-23 Sebastien Bourdeauducqexamples/pytholite/uio: simulate and convert Pytholite
2012-11-23 Sebastien Bourdeauducqpytholite/io: support Wishbone reads
2012-11-23 Sebastien Bourdeauducqpytholite/io: support Wishbone writes
2012-11-23 Sebastien Bourdeauducqpytholite/compiler: pass keyword arguments to gen_io
2012-11-18 Sebastien Bourdeauducqfhdl/verilog: remove empty cases
2012-11-17 Sebastien Bourdeauducqsim/ipc/Message: convert values
2012-11-17 Sebastien Bourdeauducqpytholite/transel: use python3-compatible comparison...
2012-11-17 Sebastien Bourdeauducqexamples/pytholite: add uio example
2012-11-17 Sebastien Bourdeauducquio/ioo: fix UnifiedIOSimulation
2012-11-17 Sebastien Bourdeauducquio: support generator trampolining in simulation
2012-11-17 Sebastien Bourdeauducquio: add simulation I/O object
2012-11-17 Sebastien Bourdeauducquio: unified I/O object
2012-11-17 Sebastien Bourdeauducqactorlib/sim: swap TokenExchanger parameters
2012-11-17 Sebastien Bourdeauducqbus/csr: allow specifying existing interface
2012-11-17 Sebastien Bourdeauducqbus/asmibus: swap port position to be consistent with...
2012-11-17 Sebastien Bourdeauducqbus/wishbone: allow specifying existing interface
2012-11-17 Sebastien Bourdeauducqbus/transactions: add busname parameter
2012-11-17 Sebastien Bourdeauducqactorlib/sim: split TokenExchanger
2012-11-16 Sebastien Bourdeauducqpytholite/io: support token pull
2012-11-16 Sebastien Bourdeauducqexamples/pytholite/basic: demonstrate conversion to...
2012-11-16 Sebastien Bourdeauducqexamples: basic Pytholite demo
2012-11-16 Sebastien Bourdeauducqpytholite/io: support token push
2012-11-11 Sebastien Bourdeauducqpytholite: move expression and register handling to...
2012-11-11 Sebastien Bourdeauducqpytholite/compiler: recognize composite I/O pattern
2012-11-11 Sebastien Bourdeauducqpytholite/compiler: visit_assign_special
2012-11-11 Sebastien Bourdeauducqpytholite: move FSM management to separate module
2012-11-11 Sebastien Bourdeauducqpytholite/compiler: refactor visit_block
2012-11-10 Sebastien Bourdeauducqpytholite/compiler: clean up visit_statement
2012-11-10 Sebastien Bourdeauducqpytholite: forward 'yield call' statements to io module
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