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nmigen.git
2021-12-31
whitequark
hdl.ir: reject elaboratables that elaborate to themselves.
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2021-12-31
whitequark
sim._pyrtl: reject very large values.
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2021-12-31
Irides
vendor.xilinx: support setting options on synth_design...
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2021-12-31
whitequark
back.rtlil,cli: allow suppressing generation of `src...
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2021-12-31
whitequark
sim.pysim: refuse to write VCD files with whitespace...
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2021-12-31
whitequark
hdl.ast: support division and modulo with negative...
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2021-12-31
Luke Kenneth...
update install.rst yosys version
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2021-12-31
whitequark
back.rtlil: extend unsigned operand of binop if another...
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2021-12-31
whitequark
hdl.ast: warn on bare integer value used in Cat()/Repl().
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2021-12-31
whitequark
_utils: don't crash trying to flatten() strings.
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2021-12-31
whitequark
docs: fix download link in start.rst.
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2021-12-31
whitequark
CI: fix test discovery command.
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2021-12-31
whitequark
CI: only discover tests under tests/.
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2021-12-31
whitequark
CI: preserve YoWASP cache as well.
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2021-12-31
whitequark
_toolchain.cxx: ignore another deprecation warning...
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2021-12-31
whitequark
_toolchain.cxx: ignore deprecation warning (on Python...
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2021-12-31
whitequark
docs: update requirements.
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2021-12-31
whitequark
_toolchain.cxx: use distutils from setuptools.
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2021-12-31
whitequark
vendor.xilinx_*: deprecate legacy Xilinx platform aliases.
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2021-12-31
whitequark
Run tests on Python 3.10.
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2021-12-31
whitequark
Simplify CI workflow.
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2021-12-31
Olivier Galibert
vendor.intel: add Mistral toolchain support.
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2021-12-31
whitequark
hdl.ast: improve interaction of ValueCastable with...
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2021-12-31
Luke Kenneth...
mention benefits of nmigen over MyHDL, ability to use...
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2021-12-31
Luke Kenneth...
mention MyHDL for compare/contrast to nmigen
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2021-12-31
Luke Kenneth...
restore nmigen logos, update wording on git format...
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2021-12-31
Luke Kenneth...
more README whitespace
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2021-12-31
Luke Kenneth...
mention that git format-patch for contributions is...
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2021-12-31
Luke Kenneth...
whitespace update on README.md
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2021-12-31
luke leighton
Merge branch 'update_to_2021oct08' into 'master'
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2021-12-31
luke leighton
Merge branch 'master' into 'update_to_2021oct08'
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2021-12-31
Luke Kenneth...
correct IRC link
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2021-12-31
Luke Kenneth...
replace github with gitlab
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2021-12-31
Luke Kenneth...
add reference to nmigen Trademark
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2021-12-31
whitequark
hdl.ast: simplify Mux implementation.
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2021-12-31
whitequark
hdl.ast: add tests for casting bare integers in {Cat...
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2021-12-31
Anton Blanchard
hdl.ast: remove quadratic time complexity in Statement...
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2021-12-31
H-S-S-11
vendor.xilinx: avoid using `/` for hierarchy in ISE...
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2021-12-31
Marcelina Kościelnicka
Unify Xilinx platforms into a single class, support...
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2021-12-31
Adam Jeliński
_toolchain: Properly set compiler/linker executables...
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2021-12-31
Robin Ole Heinemann
vendor.xilinx_{7series,ultrascale}: hierachical ->...
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2021-12-31
Jean-François...
_toolchain: substitute '+' with 'X' in tool_env_var().
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2021-12-31
whitequark
README: update IRC channel.
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2021-12-31
Robin Ole Heinemann
rpc: fix parsing of negative signed parameters
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2021-12-31
Robin Ole Heinemann
test.test_hdl_ast.OperatorTestCase: remove duplicate...
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2021-12-31
Robin Ole Heinemann
tests: rename tests with duplicate names
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2021-12-31
Robin Ole Heinemann
tests.test_hdl_cd.ClockDomainTestCase.test_name: actual...
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2021-12-31
Robin Ole Heinemann
*: remove unused variables
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2021-12-31
Robin Ole Heinemann
*: remove unused imports
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2021-12-31
Thomas Watson
tests.hdl.dsl: add tests for mis-nested Switch/Case...
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2021-12-31
Thomas Watson
hdl.dsl: raise SyntaxError for mis-nested If/Elif/Else...
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2021-12-31
Adam Greig
vendor.lattice_{ecp5,machxo_2_3l}: remove -forceAll...
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2021-12-31
whitequark
CI: fix sri-csl/formal-methods PPA series.
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2021-12-31
whitequark
hdl.ast: handle int subclasses as slice start/stop...
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2021-12-31
dx-mon
compat.genlib.roundrobin: fix missing imports
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2021-12-31
nickoe
vendor.xilinx_7series: fix tool names for symbiflow.
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2021-12-31
Katherine Temkin
vendor.lattice_ecp5: correctly generate OE signaling...
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2021-12-31
Adam Greig
vendor.lattice_ecp5: replicate OE signal for each outpu...
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2021-12-31
Joel Stanley
docs: Update up_counter to avoid deprecation warning
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2021-12-31
Adam Greig
vendor.lattice_ecp5: remove outdated comment in ECP5...
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2021-12-31
Robin Ole Heinemann
lib.fifo.AsyncFIFOBuffered: fix output register accounting
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2021-12-31
Robin Ole Heinemann
lib.fifo.AsyncFIFOBuffered: fix FFSynchronizer latency
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2021-12-31
Robin Ole Heinemann
lib.fifo: use proper clock domains in AsyncFIFO tests
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2021-12-31
Robin Ole Heinemann
lib.fifo.AsyncFIFOBuffered: use FFSynchronizer instead...
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2021-12-31
whitequark
Revert "vendor.xilinx_7series: byte swap generated...
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2021-12-31
whitequark
hdl.ast: formatting. NFC.
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2021-12-31
whitequark
hdl.ast: normalize case values to two's complement...
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2021-12-31
whitequark
back.rtlil: give private items an appropriate name...
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2021-12-31
whitequark
build.plat: make `verbose` work like all other overrides.
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2021-12-31
whitequark
vendor.intel: implement `add_settings` (QSF) and `add_c...
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2021-12-31
whitequark
vendor.xilinx_spartan_3_6: fix typo.
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2021-12-31
whitequark
hdl.ast: remove dead code. NFC.
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2021-12-31
awygle
nmigen.hdl.rec: restore Record.shape().
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2021-12-31
Marcelina Kościelnicka
sim._pyrtl: mask Mux selection operand.
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2021-12-31
Jan Kowalewski
vendor.quicklogic: enable SoC clock configuration
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2021-12-31
whitequark
vendor.quicklogic: write OpenOCD scripts as part of...
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2021-12-31
whitequark
build.plat: TemplatedPlatform.iter_extra_files→Platform...
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2021-12-31
awygle
hdl.rec: proxy operators correctly.
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2021-12-31
Konrad Beckmann
vendor.intel: add support for Cyclone V internal oscillator
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2021-12-31
whitequark
hdl.ast: deprecate UserValue in favor of ValueCastable.
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2021-12-31
whitequark
sim.pysim: avoid redundant VCD updates.
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2021-12-31
whitequark
examples: clean up oudated code.
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2021-12-31
whitequark
Fix commit 8313d6e7.
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2021-12-31
whitequark
cli: update deprecated import.
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2021-12-31
whitequark
CI: add CPython 3.9 to test matrix.
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2021-12-31
whitequark
CI: run testsuite with -Werror.
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2021-12-31
whitequark
vendor.lattice_{ice40,ecp5}: clean up $verilog_initial_...
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2021-12-31
awygle
hdl.rec: migrate Record from UserValue to ValueCastable.
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2021-12-31
awygle
hdl.ast: implement ValueCastable.
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2021-12-31
whitequark
vendor.quicklogic: part→package
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2021-12-31
Norbert Braun
vendor.xilinx_7series: byte swap generated bitstream
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2021-12-31
Jaro Habiger
lib.fifo: fix {r,w}_level in AsyncFIFOBuffered
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2021-12-31
Jaro Habiger
lib.fifo: fix level on fifo full
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2021-12-31
David Lattimore
vendor.lattice_ice40: zero-pad CLKHF_DIV in SB_HFOSC...
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2021-12-31
Jan Kowalewski
vendor.quicklogic: utilize internal SoC clock in EOS-S3
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2021-12-31
Jan Kowalewski
vendor.quicklogic: fix toolchain nomenclature
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2021-12-31
Robin Ole Heinemann
lib.fifo.AsyncFFSynchronizer: check input and output...
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2021-12-31
whitequark
build.dsl: clean up inversion logic.
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2021-12-31
whitequark
back.{verilog,rtlil}: adjust $verilog_initial_trigger...
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2021-12-31
whitequark
CI: disable codecov project status.
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