2018-12-31 |
Clifford Wolf | Merge pull request #766 from Icenowy/anlogic-latches |
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2018-12-29 |
Larry Doolittle | Fix 7 instances of add_share_file to add_gen_share_file |
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2018-12-29 |
Larry Doolittle | Squelch a little more trailing whitespace |
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2018-12-25 |
Icenowy Zheng | anlogic: add latch cells |
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2018-12-23 |
Clifford Wolf | Merge pull request #761 from whitequark/proc_clean_partial |
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2018-12-23 |
Clifford Wolf | Add "read_ilang -[no]overwrite" |
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2018-12-23 |
Clifford Wolf | Merge branch 'master' of github.com:YosysHQ/yosys |
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2018-12-23 |
whitequark | proc_clean: remove any empty cases if all cases use... |
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2018-12-22 |
Clifford Wolf | Merge pull request #757 from whitequark/manual_mem |
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2018-12-22 |
whitequark | proc_clean: remove any empty cases at the end of the... |
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2018-12-21 |
whitequark | manual: make description of $meminit ports match reality. |
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2018-12-21 |
Clifford Wolf | Merge pull request #758 from whitequark/tcl_script_args |
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2018-12-21 |
Clifford Wolf | Merge pull request #759 from whitequark/memory_collect_... |
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2018-12-21 |
whitequark | memory_collect: do not truncate 'x from \INIT. |
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2018-12-20 |
whitequark | manual: fix typos. |
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2018-12-20 |
whitequark | tcl: add support for passing arguments to scripts. |
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2018-12-20 |
whitequark | manual: document $meminit cell and memory_* passes. |
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2018-12-19 |
Clifford Wolf | Merge pull request #752 from Icenowy/anlogic-lut-cost |
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2018-12-19 |
Clifford Wolf | Merge pull request #753 from Icenowy/anlogic-makefile-fix |
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2018-12-19 |
Clifford Wolf | Merge pull request #749 from Icenowy/anlogic-dram-fix |
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2018-12-19 |
Icenowy Zheng | anlogic: fix Makefile.inc |
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2018-12-19 |
Icenowy Zheng | Anlogic: let LUT5/6 have more cost than LUT4- |
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2018-12-18 |
Clifford Wolf | Minor style fixes |
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2018-12-18 |
Clifford Wolf | Merge pull request #748 from makaimann/add-btor-ops |
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2018-12-18 |
Clifford Wolf | Merge pull request #751 from daveshah1/fix_589 |
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2018-12-18 |
David Shah | memory_dff: Fix typo when checking init value |
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2018-12-18 |
Clifford Wolf | Fix segfault in AST simplify |
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2018-12-18 |
Clifford Wolf | Improve src tagging (using names and attrs) of cells... |
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2018-12-18 |
Icenowy Zheng | anlogic: fix dbits of Anlogic Eagle DRAM16X4 |
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2018-12-17 |
makaimann | Add btor ops for $mul, $div, $mod and $concat |
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2018-12-17 |
Clifford Wolf | Merge pull request #746 from Icenowy/anlogic-dram |
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2018-12-17 |
Clifford Wolf | Merge pull request #742 from whitequark/changelog |
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2018-12-17 |
Clifford Wolf | Merge pull request #741 from whitequark/ilang_slice_sigspec |
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2018-12-17 |
Clifford Wolf | Merge pull request #744 from whitequark/write_verilog_... |
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2018-12-17 |
Icenowy Zheng | anlogic: add support for Eagle Distributed RAM |
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2018-12-17 |
Icenowy Zheng | Revert "Leave only real black box cells" |
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2018-12-16 |
Clifford Wolf | Merge pull request #745 from YosysHQ/revert-714-abc_pre... |
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2018-12-16 |
Clifford Wolf | Revert "Proof-of-concept: preserve naming through ABC... |
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2018-12-16 |
whitequark | write_verilog: handle the $shift cell. |
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2018-12-16 |
whitequark | Update CHANGELOG. |
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2018-12-16 |
whitequark | read_ilang: allow slicing sigspecs. |
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2018-12-16 |
Clifford Wolf | Merge pull request #736 from whitequark/select_assert_list |
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2018-12-16 |
whitequark | select: print selection if a -assert-* flag causes... |
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2018-12-16 |
Clifford Wolf | Rename "fine:" label to "map:" in "synth_ice40" |
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2018-12-16 |
Clifford Wolf | Merge pull request #704 from webhat/feature/fix-awk |
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2018-12-16 |
whitequark | write_verilog: add a missing newline. |
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2018-12-16 |
Clifford Wolf | Merge pull request #738 from smunaut/issue_737 |
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2018-12-16 |
Clifford Wolf | Merge pull request #735 from daveshah1/trifixes |
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2018-12-16 |
Clifford Wolf | Merge pull request #739 from whitequark/patch-1 |
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2018-12-16 |
whitequark | Add .editorconfig file. |
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2018-12-16 |
Clifford Wolf | Fix equiv_opt indenting |
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2018-12-16 |
Clifford Wolf | Merge pull request #724 from whitequark/equiv_opt |
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2018-12-16 |
Clifford Wolf | Merge pull request #734 from grahamedgecombe/fix-shuffl... |
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2018-12-16 |
Clifford Wolf | Merge pull request #730 from smunaut/ffssr_dont_touch |
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2018-12-16 |
Clifford Wolf | Merge pull request #729 from whitequark/write_verilog_i... |
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2018-12-16 |
Clifford Wolf | Merge pull request #725 from olofk/ram4k-init |
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2018-12-16 |
Clifford Wolf | Merge pull request #714 from daveshah1/abc_preserve_naming |
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2018-12-16 |
Clifford Wolf | Merge pull request #723 from whitequark/synth_ice40_map... |
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2018-12-16 |
Clifford Wolf | Merge pull request #722 from whitequark/rename_src |
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2018-12-16 |
Clifford Wolf | Merge pull request #720 from whitequark/master |
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2018-12-14 |
Sylvain Munaut | verilog_parser: Properly handle recursion when processi... |
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2018-12-12 |
David Shah | deminout: Consider $tribuf cells |
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2018-12-12 |
David Shah | deminout: Don't demote constant-driven inouts to inputs |
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2018-12-11 |
Graham Edgecombe | memory_bram: Fix initdata bit order after shuffling |
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2018-12-10 |
Clifford Wolf | Add yosys-smtbmc support for btor witness |
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2018-12-08 |
Sylvain Munaut | ice40: Honor the "dont_touch" attribute in FFSSR pass |
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2018-12-08 |
Clifford Wolf | Add "yosys-smtbmc --btorwit" skeleton |
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2018-12-08 |
Clifford Wolf | Fix btor init value handling |
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2018-12-07 |
whitequark | write_verilog: correctly map RTLIL `sync init`. |
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2018-12-07 |
whitequark | equiv_opt: pass -D EQUIV when techmapping. |
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2018-12-07 |
whitequark | equiv_opt: new command, for verifying optimization... |
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2018-12-07 |
David Shah | Merge pull request #727 from whitequark/opt_lut |
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2018-12-07 |
whitequark | opt_lut: leave intact LUTs with cascade feeding module... |
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2018-12-07 |
whitequark | opt_lut: show original truth table for both cells. |
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2018-12-07 |
whitequark | opt_lut: add -limit option, for debugging misoptimizations. |
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2018-12-06 |
Olof Kindgren | Only use non-blocking assignments of SB_RAM40_4K for... |
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2018-12-06 |
David Shah | abc: Preserve naming through ABC using 'dress' command |
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2018-12-06 |
whitequark | synth_ice40: split `map_gates` off `fine`. |
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2018-12-06 |
Clifford Wolf | Add missing .gitignore |
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2018-12-06 |
Clifford Wolf | Bugfix in opt_expr handling of a<0 and a>=0 |
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2018-12-06 |
Clifford Wolf | Verific updates |
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2018-12-05 |
whitequark | rename: add -src, for inferring names from source locat... |
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2018-12-05 |
whitequark | lut2mux: handle 1-bit INIT constant in $lut cells. |
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2018-12-05 |
whitequark | opt_lut: simplify type conversion. NFC. |
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2018-12-05 |
Clifford Wolf | Merge pull request #709 from smunaut/issue_708 |
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2018-12-05 |
Clifford Wolf | Merge pull request #718 from whitequark/gate2lut |
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2018-12-05 |
whitequark | synth_ice40: add -noabc option, to use built-in LUT... |
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2018-12-05 |
whitequark | gate2lut: new techlib, for converting Yosys gates to... |
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2018-12-05 |
whitequark | Fix typo. |
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2018-12-05 |
Clifford Wolf | Merge pull request #713 from Diego-HR/master |
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2018-12-05 |
Clifford Wolf | Merge pull request #712 from mmicko/anlogic-support |
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2018-12-05 |
Clifford Wolf | Rename opt_lut.cpp to opt_lut.cc |
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2018-12-05 |
Clifford Wolf | Merge pull request #717 from whitequark/opt_lut |
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2018-12-05 |
Clifford Wolf | Merge pull request #716 from whitequark/ice40_unlut |
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2018-12-05 |
whitequark | opt_lut: add -dlogic, to avoid disturbing logic such... |
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2018-12-05 |
whitequark | opt_lut: always prefer to eliminate 1-LUTs. |
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2018-12-05 |
whitequark | opt_lut: collect and display statistics. |
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2018-12-05 |
whitequark | opt_lut: refactor to use a worker. NFC. |
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2018-12-05 |
whitequark | synth_ice40: add -relut option, to run ice40_unlut... |
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2018-12-05 |
whitequark | opt_lut: new pass, to combine LUTs for tighter packing. |
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