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gem5.git
2017-09-27 Bjoern A. Zeebsim: make compile on FreeBSD prior to 11 commit | commitdiff | tree
2017-09-26 Gabe Blackutil: Make dot_writer ignore NULL simobjects. commit | commitdiff | tree
2017-09-26 Gabe Blackdev: Make the IDE controller handle NULL simobject... commit | commitdiff | tree
2017-09-26 Gabe Blacksim: Add a get_config_as_dict to the NullSimObject... commit | commitdiff | tree
2017-09-26 Gabe Blacksim: Don't add the NULL SimObject as a child of other... commit | commitdiff | tree
2017-09-26 Gabe Blackmisc: Make the m5 utilities writefile command accept... commit | commitdiff | tree
2017-09-26 Gabe Blacksim: Give the NullSimObject singleton a _name. commit | commitdiff | tree
2017-09-26 Gabe Blacksim: Add a NullSimObject.descendants function. commit | commitdiff | tree
2017-09-26 Gabe Blacksim: Add a clear_parent function to NullSimObject. commit | commitdiff | tree
2017-09-26 Gabe Blacksim: Check the SimObjectVector.has_parent function... commit | commitdiff | tree
2017-09-26 Gabe Blacksim: Only consider non-NULL elements in SimObjectVector... commit | commitdiff | tree
2017-09-26 Gabe Blacksim: Add a set_parent to NullSimObject which does nothing. commit | commitdiff | tree
2017-09-25 Gabe Blackmem: Fill the new packet ID fields with master IDs... commit | commitdiff | tree
2017-09-25 Gabe Blackmem: Add a "map" of packet IDs to strings in probe... commit | commitdiff | tree
2017-09-25 Gabe Blackmem: Trace the request master ID in the MemTraceProbe. commit | commitdiff | tree
2017-09-25 Gabe Blackmem: Record the request master ID in the PacketInfo... commit | commitdiff | tree
2017-09-25 Anouk Van Laerdev, virtio: Improvements to diod process handling commit | commitdiff | tree
2017-09-21 Gabe Blackalpha: Move some initialization logic from loadState... commit | commitdiff | tree
2017-09-21 Gabe Blacksim: Stop using loadState in the Root SimObject. commit | commitdiff | tree
2017-09-20 Gabe Blackkvm: arm: Get rid of functions which just wrap the... commit | commitdiff | tree
2017-09-11 Matthias Jungtlm: Don't set SystemC time resolution commit | commitdiff | tree
2017-09-11 Gabe Blackstats: Move the swpipl function into the Alpha kernel... commit | commitdiff | tree
2017-09-11 Gabe Blackstats: Get rid of some kernel stats related cruft. commit | commitdiff | tree
2017-09-06 Rico Amslingercpu: Fix bi-mode branch predictor thresholds commit | commitdiff | tree
2017-09-01 Pau Cabrecpu-minor: Fix for addr range coverage calculation commit | commitdiff | tree
2017-08-31 Paul Rosenfeldscons: bump required python version to 2.7 to support... commit | commitdiff | tree
2017-08-30 Jose Marinhoarch-arm: Only increment SW PMU counters on writes... commit | commitdiff | tree
2017-08-30 Andreas Sandbergarch-arm: Add missing override keywords in fault.hh commit | commitdiff | tree
2017-08-30 Andreas Sandbergarch-x86: Add missing override in the X86 TLB commit | commitdiff | tree
2017-08-30 Andreas Sandbergarch-sparc: Add a FaultVals instantiation for VecDisabled commit | commitdiff | tree
2017-08-30 Andreas Sandbergarch-alpha: Add missing overrides commit | commitdiff | tree
2017-08-30 Andreas Sandbergpython: Make GlobalExitEvent.getCode() return an int commit | commitdiff | tree
2017-08-30 Matthias Hillecpu-o3: fix data pkt initialization for split load commit | commitdiff | tree
2017-08-28 Gabe Blackx86: Use the new CondInst format for moves to/from... commit | commitdiff | tree
2017-08-28 Gabe Blackx86: Add a "CondInst" format for conditionally decoded... commit | commitdiff | tree
2017-08-12 Gabe Blackdev: Fix an IDE error check. commit | commitdiff | tree
2017-08-08 Pau Cabremem-cache: Delete squashed HWPrefetches commit | commitdiff | tree
2017-08-03 Andreas Sandbergconfigs, arm: Fix incorrect use of mem_range in bL... commit | commitdiff | tree
2017-08-03 Andreas Sandbergarm, config: Fix CPU names in ARM example configs commit | commitdiff | tree
2017-08-02 Gabe Blackbase: Give more information when setting up asynchronou... commit | commitdiff | tree
2017-08-01 Éder F. Zulianmisc: git ignore file udpated commit | commitdiff | tree
2017-08-01 Andreas Sandbergstyle: Add shared gem5 headers to the style checker commit | commitdiff | tree
2017-08-01 Andreas Sandbergutil: Move m5op.h to the shared include directory commit | commitdiff | tree
2017-08-01 Andreas Sandbergutil, m5: Use consistent naming for m5op C symbols commit | commitdiff | tree
2017-08-01 Andreas Sandbergarch-arm: Use named constants for m5op instructions commit | commitdiff | tree
2017-08-01 Andreas Sandbergsim: Use named constants for pseudo ops commit | commitdiff | tree
2017-08-01 Andreas Sandbergutil: Move the m5ops.h file to a shared directory commit | commitdiff | tree
2017-08-01 Andreas Sandbergkvm, arm: Switch to the device EQ when accessing ISA... commit | commitdiff | tree
2017-08-01 Andreas Sandbergkvm: Add a helper method to access device event queues commit | commitdiff | tree
2017-08-01 Andreas Sandbergcpu, kvm: Fix deadlock issue when resuming a drained... commit | commitdiff | tree
2017-08-01 Andreas Sandbergarch-arm: Switch to DTOnly as the default machine type commit | commitdiff | tree
2017-07-28 Andreas Sandbergconfig: Discover CPU timing models based on target ISA commit | commitdiff | tree
2017-07-27 Gabor Dozsaconfig, arm: SE configuration for the ARM starter kit commit | commitdiff | tree
2017-07-27 Gabor Dozsaconfig, arm: FS configuration for the ARM starter kit commit | commitdiff | tree
2017-07-27 Ashkan Tousiconfig, arm: Add a high-performance in order timing... commit | commitdiff | tree
2017-07-27 Gabor Dozsaconfig: Change mem_range attribute naming in ARM Simple... commit | commitdiff | tree
2017-07-25 Nikos Nikoleristests: Fix path for module imports in ARM system configs commit | commitdiff | tree
2017-07-25 Pau Cabreconfigs,sim-se: fix se.py multi-cpu multi-cmd issue commit | commitdiff | tree
2017-07-20 Jose Marinhosim: Prevent segfault in the wakeCpu m5op if id is... commit | commitdiff | tree
2017-07-19 Rekai Gonzalez... cpu: Add missing rename of vector registers in the... commit | commitdiff | tree
2017-07-17 Anouk Van Laercpu,o3: Fixed checkpointing bug occuring in the o3 CPU commit | commitdiff | tree
2017-07-17 Andreas Sandbergtests: Don't treat new stats as a cause for failures commit | commitdiff | tree
2017-07-17 Sean Wilsonsim, x86: Make clone a virtual function commit | commitdiff | tree
2017-07-17 Swapnil Hariax86: Add stats to X86 TLB commit | commitdiff | tree
2017-07-17 Alec Roelkeriscv: Define register index constants using literals commit | commitdiff | tree
2017-07-14 Gabe Blackriscv: Disambiguate between the C and C++ versions... commit | commitdiff | tree
2017-07-14 Alec Roelketests: Upate RISC-V binaries and results commit | commitdiff | tree
2017-07-14 Alec Roelkeriscv: Fix bugs with RISC-V decoder and detailed CPUs commit | commitdiff | tree
2017-07-14 Alec Roelkeriscv: Add unused attribute to some registers.hh constants commit | commitdiff | tree
2017-07-13 Gedare Bloomarch-arm: fix ldm of pc interswitching branch commit | commitdiff | tree
2017-07-12 Sean Wilsonruby: Refactor some Event subclasses to lambdas commit | commitdiff | tree
2017-07-12 Sean Wilsonarm: Refactor some Event subclasses to lambdas commit | commitdiff | tree
2017-07-12 Sean Wilsondev: Refactor some Event subclasses to lambdas commit | commitdiff | tree
2017-07-12 Sean Wilsonnet: Refactor some Event subclasses to lambdas commit | commitdiff | tree
2017-07-12 Sean Wilsontesters: Refactor some Event subclasses to lambdas commit | commitdiff | tree
2017-07-12 Sean Wilsonkvm, mem: Refactor some Event subclasses into lambdas commit | commitdiff | tree
2017-07-12 Sean Wilsoncpu: Refactor some Event subclasses to lambdas commit | commitdiff | tree
2017-07-12 Sean Wilsongpu-compute: Refactor some Event subclasses to lambdas commit | commitdiff | tree
2017-07-12 Sean Wilsonsim, gdb: Refactor some Event subclasses into lambdas commit | commitdiff | tree
2017-07-12 Sean Wilsonmips, x86: Refactor some Event subclasses into lambdas commit | commitdiff | tree
2017-07-12 Pau Cabreutil,arch-arm: Added python script to generate ARM... commit | commitdiff | tree
2017-07-12 Jose Marinhocpu, sim: Add param to force CPUs to wait for GDB commit | commitdiff | tree
2017-07-11 Alec Roelkearch-riscv,tests: Add insttests for RV64C commit | commitdiff | tree
2017-07-11 Alec Roelkearch-riscv: Add support for compressed extension RV64C commit | commitdiff | tree
2017-07-11 Alec Roelkearch-riscv: Restructure ISA description commit | commitdiff | tree
2017-07-10 Jose Marinhodev-arm: Add ID registers to the GIC model commit | commitdiff | tree
2017-07-10 Jose Marinhoarch-arm: Support PMU evens in the 0x4000-0x4040 range commit | commitdiff | tree
2017-07-10 Jose Marinhodev-arm: Don't unconditionally overwrite bootloader... commit | commitdiff | tree
2017-07-10 Rohit Kurupdev: Fix OnIdle test in DmaReadFifo commit | commitdiff | tree
2017-07-10 Sascha Bischoffdev: Fix address type promotion issues in VirtIO devices commit | commitdiff | tree
2017-07-10 Jose Marinhosim: Fix clashing stat names in TickedObject and Ticked commit | commitdiff | tree
2017-07-07 Curtis Dunhamkvm, arm: don't create interrupt events while saving... commit | commitdiff | tree
2017-07-07 Andreas Sandbergkvm, arm: Don't forward IRQ/FIQ when using the kernel... commit | commitdiff | tree
2017-07-05 Rekai Gonzalez... arch: ISA parser additions of vector registers commit | commitdiff | tree
2017-07-05 Rekai Gonzalez... cpu: Added interface for vector reg file commit | commitdiff | tree
2017-07-05 Rekai Gonzalez... arch: added generic vector register commit | commitdiff | tree
2017-07-05 Rekai Gonzalez... cpu: Result refactoring commit | commitdiff | tree
2017-07-05 Rekai Gonzalez... cpu: Simplify the rename interface and use RegId commit | commitdiff | tree
2017-07-05 Nathanael Premillieucpu: Physical register structural + flat indexing commit | commitdiff | tree
2017-07-05 Nathanael Premillieuarch, cpu: Architectural Register structural indexing commit | commitdiff | tree
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