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gem5.git
2013-03-01
Andreas Hansson
mem: Add check if SimpleDRAM nextReqEvent is scheduled
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2013-03-01
Andreas Hansson
mem: Add a method to build multi-channel DRAM configura...
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2013-03-01
Andreas Hansson
stats: Update stats to reflect SimpleDRAM changes
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2013-03-01
Andreas Hansson
mem: SimpleDRAM variable naming and whitespace fixes
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2013-03-01
Andreas Hansson
mem: Add support for multi-channel DRAM configurations
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2013-03-01
Andreas Hansson
mem: Merge interleaved ranges when creating backing...
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2013-03-01
Andreas Hansson
mem: Merge ranges in bus before passing them on
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2013-02-28
Dibakar Gope...
ruby: mesi coherence protocol: invalidate lock
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2013-02-20
Ali Saidi
config: Fix --prog-interval command line option
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2013-02-20
Nilay Vaish
slicc: remove unused variable message_buffer_names
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2013-02-20
Nilay Vaish
ruby: remove unused variable m_print_config in class...
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2013-02-19
Andreas Hansson
mem: Fix sender state bug and delay popping
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2013-02-19
Ali Saidi
stats: more zizzer stats fun
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2013-02-19
Andreas Hansson
scons: Fix warnings issued by clang 3.2svn (XCode 4.6)
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2013-02-19
Andreas Hansson
scons: Unify the flags shared by gcc and clang
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2013-02-19
Andreas Hansson
scons: Add warning delete with non-virtual destructor
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2013-02-19
Andreas Hansson
scons: Add warning for missing declarations
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2013-02-19
Andreas Hansson
scons: Add warning for overloaded virtual functions
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2013-02-19
Andreas Hansson
scons: Add warning for overloaded virtual functions
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2013-02-19
Andreas Hansson
scons: Add warning for missing field initializers
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2013-02-19
Andreas Hansson
scons: Fix up numerous warnings about name shadowing
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2013-02-19
Andreas Hansson
mem: Enforce strict use of busFirst- and busLastWordTime
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2013-02-19
Andreas Hansson
mem: Change accessor function names to match the port...
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2013-02-19
Andreas Hansson
mem: Make packet bus-related time accounting relative
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2013-02-19
Andreas Hansson
mem: Add deferred packet class to prefetcher
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2013-02-19
Andreas Hansson
sim: Make clock private and access using clockPeriod()
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2013-02-19
Andreas Hansson
x86: Move APIC clock divider to Python
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2013-02-19
Sascha Bischoff
mem: Fix SenderState related cache deadlock
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2013-02-19
Andreas Hansson
mem: Add predecessor to SenderState base class
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2013-02-19
Andreas Hansson
base: Fix a bug in the address interleaving
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2013-02-19
Andreas Hansson
mem: Ensure trace captures packet fields before forwarding
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2013-02-15
Anthony Gutierrez
options: add command line option for dtb file
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2013-02-15
Anthony Gutierrez
loader: add a flattened device tree blob (dtb) object
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2013-02-15
Anthony Gutierrez
ext lib: add libfdt to enable flattened device tree...
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2013-02-15
Ali Saidi
stats: update regressions for o3 changes in renaming...
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2013-02-15
Mrinmoy Ghosh
arm: fix a page table walker issue where a page could...
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2013-02-15
Andreas Sandberg
cpu: Document exec trace flags
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2013-02-15
Andreas Sandberg
dev: Use the correct return type for disk offsets
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2013-02-15
Geoffrey Blake
cpu: Avoid duplicate entries in tracking structures...
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2013-02-15
Geoffrey Blake
cpu: Fix rename mis-handling serializing instructions...
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2013-02-15
Chris Emmons
ARM: Postpones creation of framebuffer output file...
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2013-02-15
Andreas Hansson
mem: Tighten up cache constness and scoping
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2013-02-15
Sascha Bischoff
base: Add warn() and inform() to m5.utils for use from...
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2013-02-15
Matt Horsnell
o3: fix tick used for renaming and issue with range...
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2012-10-25
Andreas Sandberg
arm: Don't export private GIC methods
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2012-10-25
Andreas Sandberg
arm: Create a GIC base class and make the PL390 derive...
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2013-02-15
Andreas Sandberg
sim: Add a system-global option to bypass caches
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2013-02-15
Andreas Sandberg
cpu: Refactor memory system checks
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2013-02-15
Andreas Sandberg
config: Remove O3 dependencies
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2013-02-15
Andreas Sandberg
config: Move CPU handover logic to m5.switchCpus()
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2013-02-15
Andreas Sandberg
config: Cleanup CPU configuration
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2013-02-15
Andreas Sandberg
cpu: Make checker CPUs inherit from CheckerCPU in the...
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2013-02-15
Andreas Sandberg
cpu: Add CPU metadata om the Python classes
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2013-02-15
Ali Saidi
arm: fix some fp comparisons that worked by accident.
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2013-02-15
Ali Saidi
cpu: include set in o3/commit_impl.
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2013-02-15
Ali Saidi
ARM: Fix an issue with clang generating wrong code.
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2013-02-15
Ali Saidi
cpu: fix case with o3 cpu blocking and unblocking decod...
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2013-02-15
Ali Saidi
cpu: Fix a livelock in the o3 cpu.
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2013-02-10
Andreas Sandberg
base: Add support for newer versions of IPython
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2013-02-14
Andreas Hansson
Ruby: Fix compilation errors on gcc 4.7 and clang 3.2
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2013-02-11
Nilay Vaish
regressions: update stats due to changes to ruby
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2013-02-11
Nilay Vaish
ruby: MI protocol: add a missing transition
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2013-02-11
Nilay Vaish
ruby: enable multiple clock domains
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2013-02-11
Nilay Vaish
ruby: replace Time with Cycles (final patch in the...
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2013-02-11
Nilay Vaish
ruby: replace Time with Cycles in garnet fixed and...
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2013-02-11
Nilay Vaish
ruby: replace Time with Tick in replacement policy...
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2013-02-11
Nilay Vaish
ruby: convert block size, memory size to unsigned
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2013-02-11
Nilay Vaish
ruby: replace Time with Cycles in MessageBuffer
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2013-02-11
Nilay Vaish
ruby: replace Time with Cycles in Memory Controller
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2013-02-11
Nilay Vaish
ruby: Replace Time with Cycles in SequencerMessage
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2013-02-11
Nilay Vaish
ruby: replace Time with Cycles in Message class
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2013-02-11
Nilay Vaish
ruby: replaces Time with Cycles in many places
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2013-02-11
Nilay Vaish
base: add some mathematical operators to Cycles class
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2013-02-11
Nilay Vaish
ruby: modifies histogram add() function
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2013-02-11
Nilay Vaish
ruby: record fully busy cycle with in the controller
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2013-02-10
Andreas Sandberg
base: Fix broken IPython argument handling
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2013-02-10
Andreas Sandberg
config: Don't call sys.exit in interactive mode in...
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2013-02-01
Nilay Vaish
sim: remove unused struct priority_compare
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2013-01-31
Nilay Vaish
ruby: correct computation of number of bits required...
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2013-01-31
Andreas Hansson
mem: Add comments for the DRAM address decoding
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2013-01-31
Andreas Hansson
stats: Update stats for regressions using SimpleDDR3
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2013-01-31
Andreas Hansson
mem: Add DDR3 and LPDDR2 DRAM controller configurations
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2013-01-31
Ani Udipi
mem: Add tTAW and tFAW to the SimpleDRAM model
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2013-01-31
Andreas Hansson
mem: Separate out the different cases for DRAM bus...
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2013-01-29
Anthony Gutierrez
cache: remove drainManager because it's not used
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2013-01-28
Nilay Vaish
merged 798c2cec8e37 and e96ff45795bc
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2013-01-28
Andreas Hansson
stats: Fix naming (BPredUnit to branchPred) for 20...
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2013-01-28
Nilay Vaish
ruby: remove get_time()
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2013-01-28
Nilay Vaish
ruby: remove call to curCycle in panic()
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2013-01-24
Nilay Vaish
regressions: update stats due to branch predictor changes
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2013-01-24
Nilay Vaish...
branch predictor: move out of o3 and inorder cpus
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2013-01-22
Andrea Pellegrini
o3 cpu: fix zero reg problem
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2013-01-22
Nilay Vaish
x86, cpu: corrects 270c9a75e91f, take over decoder...
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2013-01-21
Andreas Hansson
scons: Disable protobuf if pkg-config and CheckLib...
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2013-01-19
Joel Hestness
O3 IEW: Make incrWb and decrWb clearer
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2013-01-17
Nilay Vaish
ruby: remove calls to g_system_ptr->getTime()
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2013-01-15
Nilay Vaish
x86 regressions: updates due to new instructions and...
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2013-01-15
Nilay Vaish
x86 cpuid: enable clflush
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2013-01-15
Nilay Vaish
x86: implements fsin, fcos instructions
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2013-01-15
Nilay Vaish
x86: implements emms instruction
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