riscv-isa-sim.git
2013-10-19 Yunsup Leeclean up SR_EA, the enable accelerator bit in status reg
2013-10-19 Yunsup Leemore hwacha supervisor stuff
2013-10-19 Yunsup Leerefactor disassembler, and add hwacha disassembler
2013-10-18 Yunsup Leecan't execute frsr/fssr on ut
2013-10-18 Yunsup Leeor into control thread's fp exceptions
2013-10-18 Yunsup Leecatch trap_illegal_instruction in hwacha
2013-10-18 Yunsup Leeadd hwacha exception support
2013-10-18 Yunsup Leefix custom-1 rocc encoding
2013-10-16 Yunsup Leefix maxvl calc logic
2013-10-16 Yunsup Leeuse reset virtual method
2013-10-16 Yunsup Leeuse uint32_t for vl
2013-10-16 Yunsup Leefix missing null check when there's no extension
2013-10-16 Yunsup Leerevamp hwacha; now runs in physical mode
2013-10-15 Stephen TwiggPropogate the reset call to the extensions as well...
2013-10-15 Stephen TwiggFix bug where xs2 was not being properly respected.
2013-10-10 Yunsup Leecommit configure script; new configure option --enable...
2013-09-27 Christopher... Added commit logging (--enable-commitlog). Also fixed...
2013-09-27 Andrew WatermanUse WRITE_RD/WRITE_FRD macros to write registers
2013-09-27 Andrew WatermanBye, CB
2013-09-23 Scott Beamerfixes compile bug for not being able to find std::logic...
2013-09-23 Andrew WatermanFix Scott's deadlock
2013-09-22 Stephen TwiggAdjust rocc_inst_t to properly extract fields due to...
2013-09-21 Andrew WatermanUpdate ISA encoding and AUIPC semantics
2013-09-15 Andrew WatermanAdd helper disassembly program
2013-09-15 Andrew WatermanISA changes
2013-09-11 Andrew WatermanAdd AMOXOR
2013-09-11 Andrew WatermanImplement zany immediates
2013-09-10 Andrew WatermanDon't tick HTIF as often
2013-09-10 Andrew WatermanAdd rd field to JAL; drop J
2013-08-18 Andrew WatermanRenumber PCRs
2013-08-13 Andrew WatermanAdd test program for dummy rocc
2013-08-13 Andrew WatermanImplement RoCC and add a dummy RoCC
2013-08-12 Andrew WatermanInstructions are no longer member functions
2013-08-08 Andrew WatermanIgnore JALR's effective address LSB
2013-08-08 Andrew WatermanDisentangle some header files
2013-08-08 Andrew WatermanRename MTFSR/MFFSR to FSSR/FRSR
2013-08-08 Andrew WatermanSwap J and JALR encoding
2013-08-01 Quan NguyenFix eret (again)
2013-07-31 Andrew WatermanFix dumb ERET bug
2013-07-29 Andrew WatermanDon't flush TLB on PTBR writes (only FATC)
2013-07-27 Andrew WatermanNew supervisor mode
2013-07-27 Andrew WatermanRemove more vector stuff
2013-07-27 Andrew WatermanRename MFTX/MXTF to FMV
2013-07-26 Andrew WatermanRip out Hwacha for now
2013-07-26 Andrew WatermanRip out RVC for now
2013-07-26 Andrew WatermanGenerate instruction decoder dynamically
2013-07-25 Andrew WatermanRemove JALR static hints
2013-07-23 Andrew WatermanKill spike when xspike is SIGINTed
2013-07-22 Andrew WatermanDon't use stdout for debugging
2013-07-22 Andrew WatermanAdd xspike program
2013-07-20 Andrew WatermanUse calloc to allocate target memory
2013-07-13 Andrew WatermanEliminate infinite loop in debug mode
2013-07-13 Andrew WatermanExit cleanly from debug console
2013-07-13 Andrew WatermanFavor procs.size() over num_cores()
2013-07-13 Andrew WatermanFix SR_U64 bit being ignored
2013-06-03 Andrew Watermanmake spike.o correctly depend on dispatch.h
2013-06-03 Andrew Watermanuse coreutils `seq' instead of hacky `range'
2013-05-15 Yunsup Leechange riscv-isa-run to spike in documentation
2013-05-15 Yunsup Leefix make issue
2013-05-14 Yunsup Leechange riscv-isa-run to spike
2013-05-06 Andrew Watermanmake Makefile sh-friendly
2013-04-25 Andrew Watermanuse inttypes macros to print uint64_t
2013-04-25 Andrew Watermanfix(?) circular dependence on generated headers
2013-04-25 Andrew Watermanadd range(start, end) method to Makefile
2013-04-24 Yunsup Leefixes to correctly simulate the vector unit
2013-04-23 Andrew Watermanmake interactive mode cope with canonical terminal
2013-04-23 Andrew Watermandestroy htif on simulator termination
2013-04-22 Andrew Watermancorrectly depend on dispatch.h
2013-04-20 Andrew Watermanremove circular dependence in Makefile
2013-04-20 Andrew Watermanupdate abi register names
2013-04-17 Andrew Watermanadd AUIPC insn; remove RDNPC insn
2013-03-30 Andrew Watermanadd load-reserved/store-conditional instructions
2013-03-30 Andrew Watermanignore writes to SR IP field
2013-03-27 Andrew Watermanopcodes.h must only contain DECLARE_INSN() lines
2013-03-26 Andrew Watermanadd BSD license
2013-03-26 Andrew Watermanupdate ancient README
2013-03-26 Andrew Watermantruncate effective addresses in rv32
2013-03-26 Andrew Watermanexpose pending interrupts in status register
2013-03-26 Andrew Watermanadd missing #include
2013-03-26 Andrew Watermanignore host writes to fromhost if old value not 0
2013-03-26 Andrew Watermansupport compilation with gcc 4.7
2013-02-15 Andrew Watermanfix D$ model not acknowledging stores
2013-02-15 Andrew Watermanspecialize fully-associative caches
2013-02-15 Andrew Watermandon't store host pointers in soft TLB
2013-02-13 Andrew Watermanclean up fetch-execute loop a bit
2013-02-13 Andrew Watermanadd I$/D$/L2$ simulators
2013-02-13 Andrew Watermanmigrate to c++11
2013-02-13 Andrew Watermanmake HTIF interactions deterministic; fix race
2013-01-26 Andrew Watermanremove unnecessary #include
2013-01-26 Andrew Watermanchange htif to link against libfesvr
2012-11-13 Yunsup Leefix vector code simulation problem, turn on SR_U64
2012-08-31 Andrew Watermannew tohost/fromhost semantics
2012-08-02 Andrew Watermannew tohost/fromhost semantics
2012-07-23 Andrew Watermancorrect HTIF reset behavior
2012-05-16 Andrew Watermanfix htif interaction with interactive mode
2012-05-09 Andrew Watermanper-core tohost/fromhost registers
2012-03-24 Andrew Watermannew supervisor mode
2012-03-24 Yunsup Leeadd disasm functions for vector
2012-03-20 Andrew Watermanmake NaN behavior consistent with hardfloat
2012-03-20 Andrew Watermanfix double-precision NaNs
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