yosys.git
2020-01-10 Eddie HungCopy-pasta
2020-01-10 Eddie Hungsynth_xilinx: synth_xilinx.abc9.xc7.W to replace XC7_WI...
2020-01-10 Eddie Hungabc9: add abc9.verify and abc9.debug options
2020-01-10 Eddie Hungabc9: fix typos
2020-01-10 Eddie HungAdd abc9 sanity test
2020-01-10 Eddie HungTune abc9.script.flow
2020-01-10 Eddie HungAdd '-v' to &if for abc9.script.default.fast
2020-01-10 Eddie Hungabc9: start post-fix with semicolon
2020-01-10 Eddie Hungabc9.script.* constpad entries to start with '+'
2020-01-10 Eddie HungRevert "abc9: if -script value is a file, then source...
2020-01-10 Eddie HungMove abc9.* constpad entries to Abc9Pass::on_register()
2020-01-10 Eddie HungMerge remote-tracking branch 'origin/clifford/onpassreg...
2020-01-09 Clifford WolfAdd Pass::on_register() and Pass::on_shutdown()
2020-01-08 Eddie HungAdd abc9.if.script.flow{,2} to constpad
2020-01-08 Eddie Hungscratchpad entry abc9.if.R to &if -R
2020-01-08 Eddie Hungabc9: if -script value is a file, then source it, other...
2020-01-08 Eddie Hungabc9: add time as last script command
2020-01-08 Eddie HungFix {C} substitution
2020-01-08 Eddie HungAdd RTLIL::constpad, init by yosys_setup(); use for...
2020-01-08 Eddie HungFix abc9_xc7.box comments
2020-01-07 Eddie Hungscc to use design->selected_modules() which avoids...
2020-01-07 Eddie HungBump ABCREV for upstream fix
2020-01-07 Eddie HungMerge pull request #1618 from YosysHQ/eddie/aiger_fixes
2020-01-07 Eddie Hungread_aiger: consistency between ascii and binary; also...
2020-01-07 Eddie HungAdd testcases
2020-01-07 Eddie Hungtests/aiger: write Yosys output
2020-01-07 Eddie Hungread_aiger: connect identical signals together
2020-01-07 Eddie Hungread_aiger: cope with latches and POs with same name
2020-01-07 Eddie Hungread_aiger: default -clk_name to be empty
2020-01-07 Eddie HungMerge branch 'master' of github.com:YosysHQ/yosys
2020-01-07 Eddie HungMerge pull request #1181 from YosysHQ/xaig_dff
2020-01-07 Eddie HungFix DSP48E1 sim
2020-01-06 Eddie HungMerge remote-tracking branch 'origin/master' into xaig_dff
2020-01-06 Eddie HungMerge pull request #1617 from YosysHQ/eddie/abc9_dsp_re...
2020-01-06 Eddie Hungabc9: uncomment nothing to map message
2020-01-06 Eddie HungWrap arrival functions inside `YOSYS too
2020-01-06 Eddie HungFixes
2020-01-06 Eddie HungFixes
2020-01-06 Eddie HungMerge pull request #1616 from nakengelhardt/abc_scratch...
2020-01-06 Eddie HungFix return value of arrival time functions, fix word
2020-01-06 Eddie HungBump ABCREV for upstream fix
2020-01-06 Eddie Hungabc9: remove -markgroups option, since operates on...
2020-01-06 Eddie Hungabc9: cleanup
2020-01-06 Eddie Hungwrite_xaiger: make more robust, update doc
2020-01-06 Eddie Hungwrite_aiger: make more robust
2020-01-06 N. Engelhardterror if multiple -g options are given for abc
2020-01-06 Eddie HungAdd abc9.dff scratchpad option
2020-01-06 Eddie HungMerge remote-tracking branch 'origin/master' into xaig_dff
2020-01-06 Eddie HungMerge pull request #1582 from nakengelhardt/abc_scratch...
2020-01-06 Eddie HungMerge remote-tracking branch 'origin/master' into xaig_dff
2020-01-06 Eddie HungReword (* abc9_flop *) description
2020-01-06 N. Engelhardtcheck scratchpad for arguments in abc pass too
2020-01-06 N. Engelhardtinherit default values when checking scratchpad for...
2020-01-05 Miodrag MilanovićMerge pull request #1611 from YosysHQ/mmicko/wrapcarry_fix
2020-01-04 Miodrag MilanovicValid to have attribute starting with SB_CARRY.
2020-01-03 Eddie HungRestore write_xaiger's holes_mode since port_id order...
2020-01-03 N. Engelhardtshare codepath for scratchpad argument handling with...
2020-01-03 N. EngelhardtMerge branch 'master' of https://github.com/YosysHQ...
2020-01-03 Eddie HungCleanup
2020-01-03 Eddie HungFix spacing
2020-01-02 Eddie Hungwrite_xaiger: get rid of external_bits dict
2020-01-02 Eddie HungCombine tests to check multiple clock domains
2020-01-02 Eddie HungDrive $[ABCD] explicitly
2020-01-02 whitequarkMerge pull request #1604 from whitequark/unify-ram...
2020-01-02 Eddie Hungsynth_xilinx -dff to work with abc too
2020-01-02 Eddie HungMerge remote-tracking branch 'origin/master' into eddie...
2020-01-02 Eddie HungMerge remote-tracking branch 'origin/master' into xaig_dff
2020-01-02 Eddie HungAdd 'abc9 -dff' to CHANGELOG
2020-01-02 Eddie HungUpdate doc
2020-01-02 Eddie HungUpdate comments
2020-01-02 Eddie Hungabc9 -keepff -> -dff; refactor dff operations
2020-01-02 Clifford WolfMerge pull request #1609 from YosysHQ/clifford/fix1596
2020-01-02 Clifford WolfAlways create $shl, $shr, $sshl, $sshr cells with unsig...
2020-01-02 Eddie HungMerge pull request #1601 from YosysHQ/eddie/synth_retime
2020-01-02 Eddie HungMerge pull request #1608 from YosysHQ/eddie/ifndef_YOSYS
2020-01-02 Eddie Hungifndef __ICARUS__ -> ifdef YOSYS
2020-01-02 Eddie Hungifdef __ICARUS__ -> ifndef YOSYS
2020-01-02 Eddie HungRework abc9's DSP48E1 model
2020-01-01 Eddie HungMerge pull request #1606 from YosysHQ/eddie/improve_tests
2020-01-01 Eddie HungRevert insertion of 'reg', leave note behind
2020-01-01 Miodrag MilanovićMerge pull request #1605 from YosysHQ/iopad_fix
2020-01-01 Eddie HungFix anlogic async flop mapping
2020-01-01 Eddie HungClamp -46ps for FDPE* too
2020-01-01 Eddie HungGet rid of (* abc9_keep *) in write_xaiger too
2020-01-01 Eddie HungCleanup abc9, update doc for -keepff option
2020-01-01 Eddie HungRestore abc9 -keepff
2020-01-01 Eddie Hungattributes.count() -> get_bool_attribute()
2020-01-01 Miodrag MilanovicAdded a test case
2020-01-01 Miodrag Milanovictake skip wire bits into account
2020-01-01 whitequarkHarmonize BRAM/LUTRAM descriptions across all of Yosys.
2020-01-01 Eddie HungRe-arrange FD order
2020-01-01 Eddie HungMissing character
2020-01-01 Eddie HungDo not do call equiv_opt when no sim model exists
2020-01-01 Eddie HungFix warnings
2020-01-01 Eddie HungCall equiv_opt with -multiclock and -assert
2020-01-01 Eddie HungCleanup xilinx boxes
2020-01-01 Eddie HungCleanup ice40 boxes
2020-01-01 Eddie HungCleanup ecp5 boxes
2020-01-01 Eddie Hungparse_xaiger to not take box_lookup
2020-01-01 Eddie Hungparse_xaiger to reorder ports too
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