gem5.git
2012-01-29 Nilay VaishX86 Regressions: Update stats due to introduction of TSO
2012-01-29 Nilay VaishO3 CPU LSQ: Implement TSO
2012-01-27 Andreas Hanssonns_gige: Fix a missing curly brace in if-statement
2012-01-26 Ronald Dreslinskiconfigs: actually add ARMv7a-like cpu/cache file
2012-01-26 Ronald Dreslinskiconfigs: A more realistic configuration of an ARM-like...
2012-01-25 Andreas HanssonMEM: Fix fs.py by specifying the range size rather...
2012-01-12 Mitchell HayengaFix memory corruption issue with CopyStringOut()
2012-01-25 Ali Saidistats: Update stats for final tick and memory bandwidth...
2012-01-25 Ali Saidisim: display final value of curTick in stats
2012-01-25 Ali SaidiMem: Add simple bandwidth stats to PhysicalMemory
2012-01-23 Nilay VaishConfig: Enable using O3 CPU and Ruby in SE mode
2012-01-23 Nilay VaishO3, Ruby: Forward invalidations from Ruby to O3 CPU
2012-01-23 Nilay VaishMemCmd: Add a command for invalidation requests to LSQ
2012-01-17 Andreas HanssonMEM: Make the bus default port yet another port
2012-01-17 Andreas HanssonMEM: Removing the default port peer from Python ports
2012-01-17 Andreas HanssonMEM: Make the bus bridge unidirectional and fixed addre...
2012-01-17 William WangMEM: Remove the functional ports from the memory system
2012-01-17 Andreas HanssonMEM: Separate queries for snooping and address ranges
2012-01-17 Andreas HanssonMEM: Remove Port removeConn and MemObject deletePortRefs
2012-01-17 Andreas HanssonMEM: Remove the notion of the default port
2012-01-17 Andreas HanssonMEM: Simplify ports by removing EventManager
2012-01-17 Andreas HanssonCPU: Moving towards a more general port across CPU...
2012-01-17 Andreas HanssonMEM: Add port proxies instead of non-structural ports
2012-01-17 Andreas HanssonRuby: Change the access permissions for MOESI hammer
2012-01-17 Andreas HanssonRuby: Change the access permissions for MOESI hammer
2012-01-17 Andreas HanssonMEM: Add the system port as a central access point
2012-01-17 Andreas HanssonMEM: Differentiate functional cache accesses from CPU...
2012-01-17 Ali Saidistats: undo parser change from initparam change
2012-01-17 Steve ReinhardtAlpha: warn_once about broken PAL breakpoints.
2012-01-17 Steve Reinhardtdebug: fix AllFlags::disable()
2012-01-12 Maximilien... inorder: MDU deadlock fix
2012-01-12 Deyuan Guomips: compatibility between MIPS_SE and cross compiler...
2012-01-12 Deyuan Guomips: Fix bugs in faults.cc/hh and tlb.cc for MIPS_FS
2012-01-12 Deyuan Guomips: Fix decoder of two float-convert instructions
2012-01-12 Deyuan Guomips: definition of MIPS64_QNAN in registers.hh
2012-01-12 Nilay VaishPerfectCacheMemory: Remove references to CacheMsg
2012-01-12 Ali SaidiPacket: Put back part of the assert
2012-01-12 Ali SaidiPacket: Remove meaningless assert statement
2012-01-11 Nilay VaishRuby: Use map option for selecting b/w sparse and memor...
2012-01-11 Nilay VaishConfig: Add support for restoring using a timing CPU
2012-01-11 Nilay VaishRuby: Resurrect Cache Warmup Capability
2012-01-11 Nilay VaishRuby Debug Flags: Remove one, add another
2012-01-11 Nilay VaishRuby Port: Add a list of cpu ports attached to this...
2012-01-11 Nilay VaishRuby EventQueue: Remove unused functions
2012-01-11 Nilay VaishRuby Sparse Memory: Add function for collating blocks
2012-01-11 Nilay VaishRuby: Add infrastructure for recording cache contents
2012-01-11 Nilay VaishRuby Memory Vector: Functions for collating and populat...
2012-01-11 Nilay VaishRuby: remove the files related to the tracer
2012-01-11 Nathan Binkerthgfilesize: skip files that have been removed
2012-01-10 Nilay VaishMOESI Hammer: Update regression test output
2012-01-10 Nilay VaishMOESI Hammer: Remove a couple of bugs
2012-01-10 Nilay VaishSparse Memory: Simplify the structure for an entry
2012-01-10 Ali SaidiAutomated merge with ssh://repo.gem5.org/gem5
2012-01-10 Ali Saidiconfig: Fix json output for Python lt 2.6.
2012-01-10 Nilay VaishDPRINTF: Improve some dprintf messages.
2012-01-10 Nilay VaishX86 Regressions: Update stats due to fence instruction
2012-01-10 Nilay VaishX86: Add memory fence to I/O instructions
2012-01-10 Nilay VaishConfig: Remove short option string for cpu type
2012-01-10 Anders HandlerCPU: Remove Alpha-specific PC alignment check.
2012-01-10 Ali SaidiConfig: Fix issue with JSON output
2012-01-10 Geoffrey BlakePacket: Add derived class FunctionalPacket to enable...
2012-01-10 Dam Sunwoostats: fix Vector2d to display stats correctly when...
2012-01-10 Prakash Ramrakhyanisim: Enable sampling of run-time for code-sections...
2012-01-10 Ali SaidiO3: Remove some asserts that no longer seem to be valid.
2012-01-10 Ali Saidiconfig: support outputing a pickle of the configuration...
2012-01-10 Min Kyu Jeongmem: Change DPRINTF prints more useful destination...
2012-01-10 Ali SaidiO3: Add support of function tracing with O3 CPU.
2012-01-10 Ali SaidiARM: Add support for running multiple systems
2012-01-10 Ali Saidistats: Update stats for ARM init param changes.
2012-01-10 Ali SaidiARM: Add support for initparam m5 op
2012-01-10 Dam SunwooBase: Fixed shift amount in genrand() to work with...
2012-01-10 Ali Saidicpu2000: Add missing art benchmark to all
2012-01-10 Andreas HanssonSWIG: Make gem5 compile and link with swig 2.0.4
2012-01-10 Andreas HanssonMAC: Make gem5 compile and run on MacOSX 10.7.2
2012-01-07 Nilay VaishMerged with Nate's commit
2012-01-07 Nilay VaishRuby Cache: Add param for marking caches as instruction...
2012-01-06 Nathan Binkerthooks: Add a hook to limit the size of any individual...
2012-01-06 Nilay VaishAbstractController: Remove some of the unused functions
2012-01-06 Nilay VaishRuby Set: Move NUMBER_WORDS_PER_SET to Set.hh
2012-01-05 Nilay VaishConfig: Add an option of type 'choice' for cpu type
2012-01-05 Nilay Vaisheventq: add a function for replacing head of the queue
2012-01-05 Nilay VaishMESI Coherence Protocol: Fix L2 miss statistics
2012-01-05 Nilay VaishX86 TLB: Move a DPRINTF to its correct place
2012-01-01 Nilay VaishRuby: Shuffle some of the included files
2011-12-31 Nilay VaishSLICC: Use pointers for directory entries
2011-12-15 Anthony GutierrezARM: Update config files for Android/BBench images...
2011-12-15 Ali SaidiIO: Fix bug in DMA Device where receiving a snoop on... stable_2012_02_02
2011-12-13 Nathan Binkertgcc: fix unused variable warnings from GCC 4.6.1
2011-12-02 Ali SaidiTrace: FIx issue with creation of trace file with outpu...
2011-12-01 Brad Beckmannregress: updated hammer memtest and rubytest outputs
2011-12-01 glohconfig: command line option to specify ruby output...
2011-12-01 Brad BeckmannMOESI_hammer: fixed L2 to L1 infinite stalls and deadlock
2011-12-01 Brad Beckmannphysmem: Improved fatal message for size mismatch
2011-12-01 Chris EmmonsVNC: Add support for capturing frame buffer to file...
2011-12-01 Chris EmmonsOutput: Add hierarchical output support and cleanup...
2011-12-01 Ali SaidiSE: Don't warn when not extending stack as it's too...
2011-12-01 Ali Saidiimported patch ext/stats_updates.patch
2011-12-01 Chander SudanthiO3: Remove hardcoded tgts_per_mshr in O3CPU.py.
2011-12-01 Mitchell HayengaDevice: Make changes necessary to support a coherent...
2011-12-01 Ali SaidiARM: Add support for having a TLB cache.
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