2019-12-07 |
Eddie Hung | write_xaiger to inst each cell type once, do not call... |
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2019-12-07 |
Eddie Hung | techmap/aigmap of whiteboxes to occur before abc9 inste... |
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2019-12-05 |
Clifford Wolf | Merge pull request #1551 from whitequark/manual-cell... |
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2019-12-04 |
whitequark | kernel: require \B_SIGNED=0 on $shl, $sshl, $shr, ... |
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2019-12-04 |
whitequark | manual: document behavior of many comb cells more preci... |
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2019-12-04 |
Marcin Kościelnicki | xilinx: Add tristate buffer mapping. (#1528) |
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2019-12-04 |
Marcin Kościelnicki | iopadmap: Refactor and fix tristate buffer mapping... |
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2019-12-04 |
Marcin Kościelnicki | xilinx: Add models for LUTRAM cells. (#1537) |
commit | commitdiff | tree |
2019-12-03 |
Clifford Wolf | Merge pull request #1524 from pepijndevos/gowindffinit |
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2019-12-03 |
Pepijn de Vos | update test |
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2019-12-03 |
Pepijn de Vos | Use -match-init to not synth contradicting init values |
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2019-12-02 |
David Shah | Merge pull request #1542 from YosysHQ/dave/abc9-loop-fix |
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2019-12-02 |
Clifford Wolf | Merge pull request #1539 from YosysHQ/mwk/ilang-bounds... |
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2019-12-01 |
David Shah | abc9: Fix breaking of SCCs |
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2019-11-29 |
Miodrag Milanović | Merge pull request #1540 from YosysHQ/mwk/xilinx-bufpll |
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2019-11-29 |
Marcin Kościelnicki | xilinx: Add missing blackbox cell for BUFPLL. |
commit | commitdiff | tree |
2019-11-28 |
Eddie Hung | Revert "Fold loop" |
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2019-11-27 |
Marcin Kościelnicki | read_ilang: do bounds checking on bit indices |
commit | commitdiff | tree |
2019-11-27 |
Eddie Hung | Merge pull request #1536 from YosysHQ/eddie/xilinx_dsp_... |
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2019-11-27 |
Clifford Wolf | Merge pull request #1501 from YosysHQ/dave/mem_copy_attr |
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2019-11-27 |
Clifford Wolf | Merge pull request #1534 from YosysHQ/mwk/opt_share-fix |
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2019-11-27 |
Eddie Hung | Merge pull request #1535 from YosysHQ/eddie/write_xaige... |
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2019-11-27 |
Eddie Hung | No need for -abc9 |
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2019-11-27 |
Marcin Kościelnicki | opt_share: Fix handling of fine cells. |
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2019-11-27 |
Eddie Hung | latch -> box |
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2019-11-27 |
Eddie Hung | Add citation |
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2019-11-27 |
Eddie Hung | Check for either sign or zero extension for postAdd... |
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2019-11-27 |
Eddie Hung | Remove notes |
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2019-11-27 |
Eddie Hung | Fold loop |
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2019-11-27 |
Eddie Hung | Do not sigmap keep bits inside write_xaiger |
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2019-11-27 |
Eddie Hung | xaiger: do not promote output wires |
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2019-11-27 |
Eddie Hung | Add testcase derived from fastfir_dynamictaps benchmark |
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2019-11-26 |
Marcin Kościelnicki | xilinx: Add simulation models for IOBUF and OBUFT. |
commit | commitdiff | tree |
2019-11-25 |
Marcin Kościelnicki | clkbufmap: Add support for inverters in clock path. |
commit | commitdiff | tree |
2019-11-25 |
Marcin Kościelnicki | xilinx: Use INV instead of LUT1 when applicable |
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2019-11-25 |
Pepijn de Vos | attempt to fix formatting |
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2019-11-25 |
Pepijn de Vos | gowin: add and test dff init values |
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2019-11-23 |
Eddie Hung | Merge pull request #1520 from pietrmar/fix-1463 |
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2019-11-23 |
Martin Pietryka | coolrunner2: remove spurious log_pop() call, fixes... |
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2019-11-22 |
Clifford Wolf | Merge pull request #1517 from YosysHQ/clifford/optmem |
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2019-11-22 |
Clifford Wolf | Merge pull request #1515 from YosysHQ/clifford/svastuff |
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2019-11-22 |
Clifford Wolf | Add "opt_mem" pass |
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2019-11-22 |
Clifford Wolf | Add Verific support for SVA nexttime properties |
commit | commitdiff | tree |
2019-11-22 |
Clifford Wolf | Improve handling of verific primitives in "verific... |
commit | commitdiff | tree |
2019-11-22 |
Clifford Wolf | Add Verific SVA support for "always" properties |
commit | commitdiff | tree |
2019-11-22 |
Clifford Wolf | Merge pull request #1511 from YosysHQ/dave/always |
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2019-11-22 |
Marcin Kościelnicki | gowin: Remove show command from tests. |
commit | commitdiff | tree |
2019-11-22 |
Marcin Kościelnicki | gowin: Add missing .gitignore entries |
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2019-11-22 |
David Shah | Update CHANGELOG and README |
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2019-11-21 |
David Shah | sv: Add tests for SV always types |
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2019-11-21 |
David Shah | proc_dlatch: Add error handling for incorrect always_... |
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2019-11-21 |
David Shah | sv: Correct parsing of always_comb, always_ff and alway... |
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2019-11-20 |
Clifford Wolf | Merge pull request #1507 from YosysHQ/clifford/verificfixes |
commit | commitdiff | tree |
2019-11-20 |
Clifford Wolf | Correctly treat empty modules as blackboxes in Verific |
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2019-11-20 |
Clifford Wolf | Do not rename VHDL entities to "entity(impl)" when... |
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2019-11-19 |
Clifford Wolf | Merge pull request #1449 from pepijndevos/gowin |
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2019-11-19 |
Pepijn de Vos | Remove dff init altogether |
commit | commitdiff | tree |
2019-11-19 |
Marcin Kościelnicki | Fix #1462, #1480. |
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2019-11-19 |
Marcin Kościelnicki | xilinx: Add simulation models for MULT18X18* and DSP48A*. |
commit | commitdiff | tree |
2019-11-18 |
David Shah | memory_collect: Copy attr from RTLIL::Memory to cell |
commit | commitdiff | tree |
2019-11-18 |
Pepijn de Vos | add help for nowidelut and abc9 options |
commit | commitdiff | tree |
2019-11-18 |
Clifford Wolf | Merge pull request #1497 from YosysHQ/mwk/extract-fa-fix |
commit | commitdiff | tree |
2019-11-18 |
whitequark | Merge pull request #1494 from whitequark/write_verilog... |
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2019-11-18 |
Marcin Kościelnicki | Fix #1496. |
commit | commitdiff | tree |
2019-11-18 |
whitequark | write_verilog: add -extmem option, to write split memor... |
commit | commitdiff | tree |
2019-11-17 |
Clifford Wolf | Merge pull request #1492 from YosysHQ/dave/wreduce... |
commit | commitdiff | tree |
2019-11-16 |
Pepijn de Vos | Merge branch 'master' of https://github.com/YosysHQ... |
commit | commitdiff | tree |
2019-11-15 |
David Shah | ecp5: Use new autoname pass for better cell/net names |
commit | commitdiff | tree |
2019-11-14 |
David Shah | wreduce: Don't trim zeros or sext when not matching... |
commit | commitdiff | tree |
2019-11-14 |
Clifford Wolf | Merge pull request #1490 from YosysHQ/clifford/autoname |
commit | commitdiff | tree |
2019-11-14 |
Clifford Wolf | Merge pull request #1444 from btut/feature/python_wrapp... |
commit | commitdiff | tree |
2019-11-14 |
Clifford Wolf | Merge pull request #1465 from YosysHQ/dave/ice40_timing_sim |
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2019-11-14 |
Clifford Wolf | Merge branch 'makaimann-label-bads-btor' |
commit | commitdiff | tree |
2019-11-14 |
Clifford Wolf | Use cell name for btor bad state props when it is a... |
commit | commitdiff | tree |
2019-11-14 |
Clifford Wolf | Merge branch 'label-bads-btor' of https://github.com... |
commit | commitdiff | tree |
2019-11-13 |
Clifford Wolf | Add "autoname" pass and use it in "synth_ice40" |
commit | commitdiff | tree |
2019-11-13 |
whitequark | Merge pull request #1488 from whitequark/flowmap-fixes |
commit | commitdiff | tree |
2019-11-13 |
Clifford Wolf | Merge pull request #1486 from YosysHQ/clifford/fsmdetectfix |
commit | commitdiff | tree |
2019-11-12 |
Clifford Wolf | Update fsm_detect bugfix |
commit | commitdiff | tree |
2019-11-12 |
Clifford Wolf | Bugfix in fsm_detect |
commit | commitdiff | tree |
2019-11-12 |
Clifford Wolf | Merge pull request #1484 from YosysHQ/clifford/cmp2luteqne |
commit | commitdiff | tree |
2019-11-12 |
Makai Mann | Add an info string symbol for bad states in btor backend |
commit | commitdiff | tree |
2019-11-12 |
whitequark | flowmap: when doing mincut, ensure source is always... |
commit | commitdiff | tree |
2019-11-11 |
whitequark | flowmap: don't break if that creates a k+2 (and larger... |
commit | commitdiff | tree |
2019-11-11 |
Pepijn de Vos | fix fsm test with proper clock enable polarity |
commit | commitdiff | tree |
2019-11-11 |
Pepijn de Vos | Merge branch 'master' of https://github.com/YosysHQ... |
commit | commitdiff | tree |
2019-11-11 |
Miodrag Milanovic | Fixed tests |
commit | commitdiff | tree |
2019-11-11 |
Clifford Wolf | Do not map $eq and $ne in cmp2lut, only proper arithmet... |
commit | commitdiff | tree |
2019-11-10 |
Clifford Wolf | Merge pull request #1470 from YosysHQ/clifford/subpassdoc |
commit | commitdiff | tree |
2019-11-07 |
Clifford Wolf | Add check for valid macro names in macro definitions |
commit | commitdiff | tree |
2019-11-06 |
Pepijn de Vos | fix wide luts |
commit | commitdiff | tree |
2019-11-06 |
Marcin Kościelnicki | synth_xilinx: Merge blackbox primitive libraries. |
commit | commitdiff | tree |
2019-11-04 |
Clifford Wolf | Fix write_aiger bug added in 524af21 |
commit | commitdiff | tree |
2019-10-31 |
Clifford Wolf | Add CodingReadme section on script passes |
commit | commitdiff | tree |
2019-10-30 |
Pepijn de Vos | don't cound exact luts in big muxes; futile and fragile |
commit | commitdiff | tree |
2019-10-28 |
Pepijn de Vos | add IOBUF |
commit | commitdiff | tree |
2019-10-28 |
Pepijn de Vos | add tristate buffer and test |
commit | commitdiff | tree |
2019-10-28 |
Pepijn de Vos | do not use wide luts in testcase |
commit | commitdiff | tree |
2019-10-28 |
Pepijn de Vos | actually run the gowin tests |
commit | commitdiff | tree |
2019-10-28 |
Pepijn de Vos | More formatting |
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next |