openpower-isa.git
2021-11-30 Dmitry Selyutinsv_analysis: decouple declarations and definitions
2021-11-30 Dmitry Selyutinsv_analysis: use is instead of eq for enums
2021-11-30 Dmitry Selyutinsv_analysis: fix single-line binutils comments
2021-11-30 Luke Kenneth... add randomised hazard test
2021-11-30 Luke Kenneth... add two more hazard tests
2021-11-30 Luke Kenneth... attempting to use PowerDecode2 in non-svp64 mode
2021-11-27 Dmitry Selyutinsv_analysis: decouple common disclaimer
2021-11-27 Dmitry Selyutinsv_analysis: introduce stub binutils format
2021-11-27 Dmitry Selyutinsv_analysis: support format argument
2021-11-27 Luke Kenneth... add extra overlap hazard test
2021-11-26 R Veera KumarShorten expected state code for case_extsb using exts...
2021-11-26 R Veera KumarShorten expected state code for case_extsb in alu_cases...
2021-11-26 R Veera KumarShorten expected state code for case_rand in alu_cases...
2021-11-26 R Veera KumarShorten case_rand_imm alu test case code
2021-11-26 R Veera KumarMake carry_out32 variable boolean and expected state...
2021-11-25 R Veera KumarShortened code in case_addis_nonzero_r0 alu test case
2021-11-25 R Veera KumarCorrect add-equal operator in case_rand_imm
2021-11-25 R Veera KumarShort the code of case_rand_imm
2021-11-24 R Veera KumarFix line so that 80 characters per line is kept and...
2021-11-24 R Veera KumarAdd expected state to case_rand_imm in alu_cases unit...
2021-11-24 Luke Kenneth... corrections to hazard overlap test
2021-11-24 Luke Kenneth... add extra hazard unit tests
2021-11-24 Luke Kenneth... tidyup on case_0_adde
2021-11-24 Luke Kenneth... correct write-after-write hazard test (expected values)
2021-11-23 R Veera KumarAdd expected state to case_0_adde in alu_cases unit...
2021-11-23 Luke Kenneth... add write-after-write hazard test for inorder core
2021-11-23 R Veera KumarAdd expected state to case_rand in alu_cases unit test
2021-11-23 R Veera KumarAdd expected state to case_addis_nonzero_r0 in alu_case...
2021-11-23 R Veera KumarAdd expected state to case_extsb in alu_cases unit...
2021-11-23 R Veera KumarAdd computed CR0 to expected version of case_adde_0
2021-11-22 Luke Kenneth... add expected version of case_adde_0
2021-11-22 Luke Kenneth... adding a couple more hazard avoidance cases
2021-11-22 R Veera KumarAdd expected state to case_cmpeqb in alu_cases unit...
2021-11-22 R Veera KumarAdd expected state to case_cmplw_microwatt_1 in alu_cas...
2021-11-22 R Veera KumarAdd expected state to case_cmpli_microwatt in alu_cases...
2021-11-22 R Veera KumarAdd expected state to case_cmpl_microwatt_0_disasm...
2021-11-22 R Veera KumarAdd expected state to case_cmpl_microwatt_0 in alu_case...
2021-11-22 R Veera KumarAdd expected state to case_addme_ca_so_4 in alu_cases...
2021-11-22 R Veera KumarAdd expected state to case_addme_ca_so_3 in alu_cases...
2021-11-22 R Veera KumarAdd expected state to case_addme_ca_1 in alu_cases...
2021-11-21 Luke Kenneth... sigh, for overlap mode there is no safe way to get...
2021-11-21 Luke Kenneth... move dump state to base class State in test API
2021-11-21 R Veera KumarAdd expected state to case_cmp3 in alu_cases unit test
2021-11-21 R Veera KumarAdd expected state to case_cmp2 in alu_cases unit test
2021-11-21 R Veera KumarAdd expected state to case_cmp in alu_cases unit test
2021-11-21 R Veera KumarAdd expected state to all of case_addze in alu_cases...
2021-11-17 Jacob Lifshayadd bitmanip_cases.py
2021-11-17 Jacob Lifshayrename ternary->ternlog and associated form/field TI...
2021-11-17 Luke Kenneth... add allow_overlap argument to TestRunnerBase
2021-11-17 Luke Kenneth... code-comments
2021-11-17 Luke Kenneth... XER regspec_decode_write was not sophisticated enough.
2021-11-17 Luke Kenneth... split up regression cases so that a single Rc=1 add...
2021-11-16 Luke Kenneth... truncate CR regspec_decode_write reg mask to 8 bit
2021-11-16 Luke Kenneth... argh, regspec_decode_write is supposed to return single...
2021-11-16 Luke Kenneth... name of cr reg3 was numbered 2
2021-11-13 Jacob Lifshayremove excess I from ternary-related names
2021-11-12 Jacob Lifshaychange ternaryi to correct register fields
2021-11-12 Jacob Lifshayformat code
2021-11-12 Jacob Lifshayformat code
2021-11-11 Luke Kenneth... add case-based expected results in addme alu_cases
2021-11-11 Luke Kenneth... invert speedup (commenting-out) of tests
2021-11-11 Luke Kenneth... sort out numbering on CRs in SimState
2021-11-11 Luke Kenneth... whitespace
2021-11-11 Luke Kenneth... fix test API State.compare which was overwriting intreg...
2021-11-11 Luke Kenneth... https://bugs.libre-soc.org/show_bug.cgi?id=730#c27
2021-11-11 Luke Kenneth... add unexpected result to see what happens
2021-11-11 Luke Kenneth... use append on expected state dump, not ideal but
2021-11-11 Luke Kenneth... add core state to gtkw
2021-11-11 R Veera KumarAdd expected state to case_addze for addze in alu_cases...
2021-11-11 R Veera KumarAdd expected state to case_1_regression for 'add' in...
2021-11-11 R Veera KumarAdd expected state to case_1_regression for extsb in...
2021-11-11 R Veera KumarAdd expected state to case_1_regression for subf (2...
2021-11-10 Luke Kenneth... attempt to get gtkw simulator signals updated on WB MMU
2021-11-10 R Veera KumarAdd expected state to case_1_regression for subf in...
2021-11-10 Luke Kenneth... add LDST msr_pr to gtkw debug
2021-11-10 Luke Kenneth... display 64 bits of msr
2021-11-10 Luke Kenneth... add MSR to ldst operand debug gtkw
2021-11-10 Luke Kenneth... add MSR to gtkw file for simulation output
2021-11-10 Luke Kenneth... add RT as an option for ternary instruction as 3rd...
2021-11-10 Luke Kenneth... add creation of 8 and 16 DCT butterfly diagrams
2021-11-09 Tobias Platenforward mmu sprs
2021-11-09 R Veera KumarAdd expected state to case_1_regression for extsw for...
2021-11-05 Jacob Lifshayadd ternaryi
2021-11-05 Jacob Lifshayformat code
2021-11-05 Jacob Lifshayformat code
2021-11-05 Jacob Lifshayadd comment2 and unofficial fields to existing instructions
2021-11-04 Tobias Platendcbz needs to go through ldst function unit
2021-11-04 klehmancaller.py: Fix ISACaller modifying test state
2021-10-28 klehmanstate.py: Fix expected dump for cr regs
2021-10-25 klehmanspacing fix
2021-10-25 klehmantests now dump into caller dirs
2021-10-25 klehmanget file name from stack, add in TestCase
2021-10-25 klehmantmp creation/string formatting
2021-10-25 klehmanadded dump_state_tofile for code creation
2021-10-23 R Veera KumarAdd a new test caller for ALU based on shift_rot test...
2021-10-13 Dmitry Selyutinfixedlogical: simplify extsw
2021-10-13 Dmitry Selyutinfixedlogical: simplify extsh
2021-10-13 Dmitry Selyutinfixedlogical: simplify extsb
2021-10-13 Dmitry Selyutindecoder/helpers: introduce EXTSXL helper
2021-10-13 Dmitry Selyutindecoder/helpers: simplify XLCASTU
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