git.libre-soc.org Git - yosys.git/shortlog

2019-04-08	Eddie Hung	Update CHANGELOG	commit \| commitdiff \| tree
2019-04-08	Eddie Hung	Merge branch 'undo_pr895' into xc7srl	commit \| commitdiff \| tree
2019-04-08	Eddie Hung	Undo #895 by instead setting an attribute	commit \| commitdiff \| tree
2019-04-08	Eddie Hung	Cope with undoing #895	commit \| commitdiff \| tree
2019-04-08	Eddie Hung	Revert "Remove handling for $pmux, since #895"	commit \| commitdiff \| tree
2019-04-06	Eddie Hung	Call shregmap twice -- once for variable, another for...	commit \| commitdiff \| tree
2019-04-05	Eddie Hung	Merge branch 'eddie/fix_retime' into xc7srl	commit \| commitdiff \| tree
2019-04-05	Eddie Hung	Add retime test	commit \| commitdiff \| tree
2019-04-05	Eddie Hung	Fix S0 -> S1	commit \| commitdiff \| tree
2019-04-05	Eddie Hung	Move dffinit til after abc	commit \| commitdiff \| tree
2019-04-05	Eddie Hung	Merge branch 'eddie/fix_retime' into xc7srl	commit \| commitdiff \| tree
2019-04-05	Eddie Hung	Move techamp t:$_DFF_?N? to before abc call	commit \| commitdiff \| tree
2019-04-05	Eddie Hung	Retry	commit \| commitdiff \| tree
2019-04-05	Eddie Hung	"&nf -D 0" fails => use "-D 1" instead	commit \| commitdiff \| tree
2019-04-05	Eddie Hung	Resolve @daveshah1 comment, update synth_xilinx help	commit \| commitdiff \| tree
2019-04-05	Eddie Hung	synth_xilinx to techmap FFs after abc call, otherwise...	commit \| commitdiff \| tree
2019-04-05	Eddie Hung	abc -dff now implies "-D 0" otherwise retiming doesn...	commit \| commitdiff \| tree
2019-04-05	Eddie Hung	techmap inside map_cells stage	commit \| commitdiff \| tree
2019-04-05	Clifford Wolf	Add "read_ilang -lib"	commit \| commitdiff \| tree
2019-04-04	Clifford Wolf	Added missing argument checking to "mutate" command	commit \| commitdiff \| tree
2019-04-04	Eddie Hung	Merge branch 'map_cells_before_map_luts' into xc7srl	commit \| commitdiff \| tree
2019-04-04	Eddie Hung	Missing techmap entry in help	commit \| commitdiff \| tree
2019-04-04	Eddie Hung	Use soft-logic, not LUT3 instantiation	commit \| commitdiff \| tree
2019-04-04	Eddie Hung	Merge branch 'map_cells_before_map_luts' into xc7srl	commit \| commitdiff \| tree
2019-04-04	Eddie Hung	synth_xilinx to map_cells before map_luts	commit \| commitdiff \| tree
2019-04-04	Eddie Hung	Cleanup comments	commit \| commitdiff \| tree
2019-04-04	Eddie Hung	t:$dff* -> t:$dff t:$dffe	commit \| commitdiff \| tree
2019-04-03	Eddie Hung	Remove handling for $pmux, since #895	commit \| commitdiff \| tree
2019-04-03	Eddie Hung	-nosrl meant when -nobram	commit \| commitdiff \| tree
2019-04-03	Eddie Hung	Remove duplicate STARTUPE2	commit \| commitdiff \| tree
2019-04-03	Eddie Hung	Disable shregmap in synth_xilinx if -retime	commit \| commitdiff \| tree
2019-04-03	Eddie Hung	Add changelog entry	commit \| commitdiff \| tree
2019-04-03	Eddie Hung	Merge pull request #913 from smunaut/fix_proc_mux	commit \| commitdiff \| tree
2019-04-03	Sylvain Munaut	proc_mux: Fix crash when trying to optimize non-existan...	commit \| commitdiff \| tree
2019-04-03	Eddie Hung	Merge remote-tracking branch 'origin/master' into xc7srl	commit \| commitdiff \| tree
2019-04-03	Clifford Wolf	Merge pull request #912 from YosysHQ/bram_addr_en	commit \| commitdiff \| tree
2019-04-03	Clifford Wolf	Merge pull request #910 from ucb-bar/memupdates	commit \| commitdiff \| tree
2019-04-02	David Shah	memory_bram: Consider read enable for address expansion...	commit \| commitdiff \| tree
2019-04-02	Eddie Hung	Merge pull request #895 from YosysHQ/pmux2shiftx	commit \| commitdiff \| tree
2019-04-01	Jim Lawson	Refine memory support to deal with general Verilog...	commit \| commitdiff \| tree
2019-03-29	Clifford Wolf	Merge pull request #907 from YosysHQ/clifford/fix906	commit \| commitdiff \| tree
2019-03-29	Clifford Wolf	Build Verilog parser with -DYYMAXDEPTH=100000, fixes...	commit \| commitdiff \| tree
2019-03-28	Clifford Wolf	Merge pull request #901 from trcwm/libertyfixes	commit \| commitdiff \| tree
2019-03-28	Clifford Wolf	Merge pull request #903 from YosysHQ/bram_reset_transp	commit \| commitdiff \| tree
2019-03-27	David Shah	memory_bram: Reset make_transp when growing read ports	commit \| commitdiff \| tree
2019-03-27	Niels Moseley	Liberty file parser now accepts superfluous ;	commit \| commitdiff \| tree
2019-03-27	Niels Moseley	Liberty file parser now accepts superfluous ;	commit \| commitdiff \| tree
2019-03-27	Niels Moseley	Liberty file parser now accepts superfluous ;	commit \| commitdiff \| tree
2019-03-27	Clifford Wolf	Add "read -verific" and "read -noverific"	commit \| commitdiff \| tree
2019-03-27	Clifford Wolf	Add "rename -output"	commit \| commitdiff \| tree
2019-03-27	Clifford Wolf	Improve "rename" help message	commit \| commitdiff \| tree
2019-03-26	Clifford Wolf	Add "cutpoint -undef"	commit \| commitdiff \| tree
2019-03-26	Clifford Wolf	Add "hdlname" attribute	commit \| commitdiff \| tree
2019-03-26	Clifford Wolf	Fix "verific -extnets" for more complex situations	commit \| commitdiff \| tree
2019-03-25	Eddie Hung	synth_xilinx to use shregmap with -minlen 3	commit \| commitdiff \| tree
2019-03-25	Eddie Hung	Merge remote-tracking branch 'origin/master' into xc7srl	commit \| commitdiff \| tree
2019-03-25	Clifford Wolf	Add "cutpoint" pass	commit \| commitdiff \| tree
2019-03-25	Eddie Hung	Create one $shiftx per bit in width	commit \| commitdiff \| tree
2019-03-25	Clifford Wolf	Merge pull request #896 from YosysHQ/transp_fixes	commit \| commitdiff \| tree
2019-03-25	Clifford Wolf	Merge pull request #897 from trcwm/libertyfixes	commit \| commitdiff \| tree
2019-03-25	Niels Moseley	spaces -> tabs	commit \| commitdiff \| tree
2019-03-25	Niels Moseley	EOL is now accepted as ';' replacement on lines that...	commit \| commitdiff \| tree
2019-03-24	Niels Moseley	Updated the liberty parser to accept [A:B] ranges ...	commit \| commitdiff \| tree
2019-03-24	David Shah	memory_bram: Fix multiclock make_transp	commit \| commitdiff \| tree
2019-03-23	Eddie Hung	Add a pmux-to-shiftx optimisation to proc_mux	commit \| commitdiff \| tree
2019-03-23	Eddie Hung	Cope with SHREG not having E port; Revert $pmux fine...	commit \| commitdiff \| tree
2019-03-23	Clifford Wolf	Add "mutate -none -mode", "mutate -mode none"	commit \| commitdiff \| tree
2019-03-23	Clifford Wolf	Add "mutate -s <filename>"	commit \| commitdiff \| tree
2019-03-23	Clifford Wolf	Merge pull request #893 from YosysHQ/clifford/btormeminit	commit \| commitdiff \| tree
2019-03-23	Clifford Wolf	Add support for memory initialization to write_btor	commit \| commitdiff \| tree
2019-03-23	Clifford Wolf	Fix BTOR output tags syntax in writye_btor	commit \| commitdiff \| tree
2019-03-23	Clifford Wolf	Add RTLIL::Const::ext[su](), fix RTLIL::SigSpec::extend...	commit \| commitdiff \| tree
2019-03-23	Eddie Hung	Add support for SHREGMAP+$mux, also fine tune $pmux	commit \| commitdiff \| tree
2019-03-23	Eddie Hung	Leftover printf	commit \| commitdiff \| tree
2019-03-23	Eddie Hung	Fixes for multibit	commit \| commitdiff \| tree
2019-03-23	Eddie Hung	Working for 1 bit	commit \| commitdiff \| tree
2019-03-22	Eddie Hung	Merge remote-tracking branch 'origin/master' into xc7srl	commit \| commitdiff \| tree
2019-03-22	Clifford Wolf	Merge pull request #889 from YosysHQ/clifford/fix888	commit \| commitdiff \| tree
2019-03-22	Clifford Wolf	Merge pull request #890 from YosysHQ/clifford/fix887	commit \| commitdiff \| tree
2019-03-22	David Shah	Merge pull request #891 from YosysHQ/xilinx_keep	commit \| commitdiff \| tree
2019-03-22	David Shah	xilinx: Add keep attribute where appropriate	commit \| commitdiff \| tree
2019-03-22	Clifford Wolf	Trim init attributes when resizing FFs in "wreduce...	commit \| commitdiff \| tree
2019-03-21	Eddie Hung	Add '-nosrl' option to synth_xilinx	commit \| commitdiff \| tree
2019-03-21	Clifford Wolf	Fix mem2reg handling of memories with upto data ports...	commit \| commitdiff \| tree
2019-03-21	Clifford Wolf	Improve "read_verilog -dump_vlog[12]" handling of upto...	commit \| commitdiff \| tree
2019-03-21	Clifford Wolf	Improve read_verilog debug output capabilities	commit \| commitdiff \| tree
2019-03-21	Eddie Hung	Opt	commit \| commitdiff \| tree
2019-03-20	Eddie Hung	Fix spacing	commit \| commitdiff \| tree
2019-03-20	Eddie Hung	Fine tune cells_map.v	commit \| commitdiff \| tree
2019-03-20	Eddie Hung	Revert $__SHREG_ to orig; use $__XILINX_SHREG for varia...	commit \| commitdiff \| tree
2019-03-20	Eddie Hung	Add support for variable length Xilinx SRL > 128	commit \| commitdiff \| tree
2019-03-19	Eddie Hung	Restore original synth_xilinx commands	commit \| commitdiff \| tree
2019-03-19	Eddie Hung	Fix spacing	commit \| commitdiff \| tree
2019-03-19	Eddie Hung	shregmap -tech xilinx to delete $shiftx for var length SRL	commit \| commitdiff \| tree
2019-03-19	Eddie Hung	Fix INIT for variable length SRs that have been bumped...	commit \| commitdiff \| tree
2019-03-19	Eddie Hung	Merge remote-tracking branch 'origin/master' into xc7srl	commit \| commitdiff \| tree
2019-03-19	Eddie Hung	Make output port a non chain user	commit \| commitdiff \| tree
2019-03-19	Clifford Wolf	Merge pull request #885 from YosysHQ/clifford/fix873	commit \| commitdiff \| tree
2019-03-19	Clifford Wolf	Add Xilinx negedge FFs to synth_xilinx dffinit call...	commit \| commitdiff \| tree
2019-03-19	Eddie Hung	Merge pull request #808 from eddiehung/read_aiger	commit \| commitdiff \| tree
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