litex.git
2015-11-13 Florent Kermarrecfor now use our fork of migen (to be able to simulate...
2015-11-13 Florent Kermarreclitex/gen: reintegrate migen with modifications to...
2015-11-12 Florent Kermarrecsoc/interconnect/stream: add BufferizeEndpoints
2015-11-12 Florent Kermarrecsoc/interconnect/stream: add Pipeline
2015-11-12 Florent Kermarrecsoc/interconnect/stream: reintroduce params
2015-11-11 Florent Kermarrecsoc/interconnect: add packet
2015-11-11 Florent Kermarrecsoc/interconnect: add wishbonebridge and uart bridge
2015-11-11 Florent Kermarrecsoc/interconnect/stream: reintroduce PipelinedActor...
2015-11-11 Florent Kermarrecsoc/integration/soc_core: add support for SoCs without CPU
2015-11-11 Florent KermarrecREADME: update
2015-11-11 Florent Kermarrecboards/targets: remove papilio_pro/pipistrello
2015-11-11 Florent Kermarrecsoc/integration/builder: add use_symlinks parameter...
2015-11-11 Florent Kermarrecboards/targets/sim: add ethernet support
2015-11-11 Florent Kermarrecsoc/cores/liteeth_mini: add phy model for verilator...
2015-11-11 Florent Kermarrecsoc/cores: reintroduce liteeth_mini (until we switch...
2015-11-11 Florent Kermarrecdoc: add logo
2015-11-11 Florent Kermarrecadd LICENSE, update copyrights, add Migen install instr...
2015-11-11 Florent Kermarrecsoc/software/bios/sdram: split memtest and allow extern...
2015-11-11 Florent Kermarrecavoid forking migen, we will add custom modules in...
2015-11-10 Florent Kermarrecsoc: merge with misoc 3fcc4f116c3292020cb811d179e45ae45...
2015-11-10 Florent Kermarrecboards/targets/sim: get SDRAM working in simulation...
2015-11-10 Florent Kermarrecsoc/software: remove memtest (should be re-written)
2015-11-10 Florent Kermarrecsoc/sofware: remove libdyld
2015-11-10 Florent Kermarrecsoc/software: remove libunwind
2015-11-10 Florent Kermarreclitex/build/xilinx/programmer: remove UrJTAG and Adept
2015-11-10 Florent KermarrecREADME: update
2015-11-07 Florent Kermarreclitex: get verilator simulation working and add sim...
2015-11-07 Florent Kermarreclitex: reorganize things, first work working version
2015-11-07 Florent Kermarrecimport migen in litex/gen
2015-11-07 Florent KermarrecMerge remote-tracking branch 'migen/master'
2015-11-07 Florent Kermarrecimport misoc in litex/soc
2015-11-07 whitequarkUpdate .gitignore.
2015-11-05 Sebastien Bourdeauducqfhdl/verilog: create clock domains in deterministic...
2015-11-04 Sebastien Bourdeauducqlibcompiler_rt: add fixunsdfdi
2015-11-04 Sebastien Bourdeauducqsetup.py: consistent version number
2015-11-04 Sebastien Bourdeauducqsetup.py: fix version number
2015-11-04 Sebastien Bourdeauducqsetup.py: consistent version number
2015-11-04 Sebastien Bourdeauducqconda: use correct branch
2015-11-04 Sebastien BourdeauducqMerge 'new' branch
2015-11-04 Sebastien Bourdeauducqconda: use correct branch
2015-11-04 Sebastien BourdeauducqMerge 'new' branch
2015-11-04 Sebastien Bourdeauducqintegration/builder: add gateware toolchain path comman...
2015-11-04 Sebastien Bourdeauducqbuild: standardize toolchain path setting
2015-11-04 Sebastien Bourdeauducqbuild/ise: make method default args consistent across...
2015-11-03 Sebastien Bourdeauducqsoftware/makefiles: remove dependency system, make...
2015-11-03 Sebastien Bourdeauducqtargets/pipistrello: add argparse functions consistent...
2015-11-03 Sebastien Bourdeauducqtargets/kc705: export generic argparse code
2015-11-03 Sebastien Bourdeauducqtargets/kc705: make SDRAM controller type configurable
2015-11-03 Sebastien Bourdeauducqinterconnect/wishbone: fix CSRBank init
2015-11-03 Sebastien Bourdeauducqwishbone: add read/write simulation methods
2015-11-02 Sebastien BourdeauducqRevert "conda: try to hack conda into checking out...
2015-11-02 Sebastien Bourdeauducqconda: try to hack conda into checking out new branch...
2015-11-02 Sebastien Bourdeauducqtravis: add dummy script
2015-11-02 Sebastien Bourdeauducqconda: consistent version numbering
2015-11-02 Sebastien Bourdeauducqadd travis.yml
2015-11-01 Sebastien Bourdeauducqadd conda build scripts
2015-11-01 Sebastien Bourdeauducqcores/dvi_sampler: fix imports
2015-11-01 Sebastien Bourdeauducqinterconnect/stream: add Converter (needs cleanup)
2015-10-24 Sebastien Bourdeauducqcompiler_rt: add comparesf2
2015-10-23 Florent Kermarreccores/liteeth_mini: adapt all phys to new migen
2015-10-23 Florent Kermarreccom/liteethmini/phy: remove use of FlipFlop in MII
2015-10-23 Florent Kermarreccores: fix liteeth
2015-10-22 whitequarkconda: restrict python to 3.5.* explicitly.
2015-10-22 whitequarkconda: put git hash back build string.
2015-10-22 whitequarkconda: also add build number, not just string.
2015-10-22 whitequarkconda: fix build on old conda-build.
2015-10-22 whitequarkconda: restrict python to 3.5.* explicitly.
2015-10-22 whitequarkconda: put git hash back build string.
2015-10-22 Sebastien Bourdeauducqfhdl/namer: fix object aliasing bug
2015-10-22 Sebastien BourdeauducqMerge branch 'new' of github.com:m-labs/migen into new
2015-10-22 Sebastien Bourdeauducqfhdl/namer: fix object aliasing bug
2015-10-21 whitequarkconda: also add build number, not just string.
2015-10-21 whitequarktravis: upload noarch conda package correctly.
2015-10-21 whitequarktravis: install the package that was just built.
2015-10-21 whitequarkconda: build migen as noarch.
2015-10-21 whitequarkconda: include hash in commit.
2015-10-21 whitequarktravis: upload noarch conda package correctly.
2015-10-21 whitequarktravis: install the package that was just built.
2015-10-21 Sebastien Bourdeauducqtravis: workaround for conda noarch bug
2015-10-21 whitequarkconda: build migen as noarch.
2015-10-21 whitequarkconda: include hash in commit.
2015-10-20 Sebastien Bourdeauducqsim: fix case break
2015-10-20 Sebastien Bourdeauducqsim: do not use py35 collections.Generator
2015-10-19 Sebastien Bourdeauducqtravis: workaround for conda noarch bug
2015-10-19 Sebastien Bourdeauducqconda: noarch
2015-10-19 Sebastien Bourdeauducqsim: truncate case test value
2015-10-19 Sebastien Bourdeauducqtest: fix divider testbench
2015-10-19 Sebastien Bourdeauducqsim: generators are also iterables...
2015-10-19 Sebastien Bourdeauducqsim: accept iterables as generator list
2015-10-19 Sebastien Bourdeauducqverilog, sim: accept iterables in FHDL statements
2015-10-19 Sebastien Bourdeauducqgenlib/fsm: fix return value of _get_register_control
2015-10-19 Sebastien BourdeauducqMANIFEST.in: fix lm32 data directory
2015-10-19 Sebastien BourdeauducqRevert "sim/core: fix Cat bitshift"
2015-10-19 Sebastien Bourdeauducqsim/core: fix Cat bitshift
2015-10-19 Sebastien Bourdeauducqsim/core: truncate evaluated values before test in If
2015-10-19 Sebastien Bourdeauducqsoftware: do not build libdyld and libunwind for lm32...
2015-10-19 Sebastien Bourdeauducqbuild/vivado: quote paths in Tcl (prevents problems...
2015-10-15 Sebastien Bourdeauducqsim: support execution of nested statement lists (typo)
2015-10-15 Sebastien Bourdeauducqsim: support execution of nested statement lists
2015-10-14 Sebastien Bourdeauducqintegration/builder: escape backslash in makefile defines
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