litex.git
2015-01-27 Florent Kermarrecadd optional subsampler
2015-01-27 Florent Kermarreccore/storage: split LiteScopeRecorder in LiteScopeRecor...
2015-01-25 Florent Kermarrecchange CSR class names (do not expose XXYYCSR to user)
2015-01-25 Florent Kermarrechost/driver: simplify
2015-01-25 Florent Kermarrecsimplify code and use Sink/Source instead of records
2015-01-23 Florent Kermarrechost: remove cpuif (we use the one from MiSoC) and...
2015-01-23 Florent Kermarrecsimplify LiteScopeLA export (use vns from platform...
2015-01-23 Florent Kermarrecadd hack to generate verilog with AsyncResetSynchronize...
2015-01-23 Florent Kermarrecadd missings __init__.py
2015-01-23 Florent Kermarrecfix README
2015-01-22 Florent Kermarrecadd LiteScopeLA example
2015-01-22 Florent Kermarrecadd LiteScopeIO example
2015-01-22 Florent Kermarrecstart refactoring and change name to LiteScope
2015-01-22 Florent Kermarrecrevert submodules/specials/clock_domains syntax
2015-01-16 Florent Kermarrecdrivers: fix mask generation when using cond
2015-01-14 Florent Kermarrecsimplify UART2Wishbone and add timeout
2015-01-14 Florent Kermarrecuse new submodules/specials/clock_domains automatic...
2014-12-23 Florent Kermarrechost/drivers: add possibility to pass cond dict to...
2014-10-28 Florent Kermarrecadd input pipe stage option
2014-10-16 Florent Kermarrecuse new direct access on endpoints
2014-10-16 Florent Kermarrecuart2wishbone: fix missing payload.d
2014-10-15 Florent Kermarrecuart2wishbone: always use payload.d and not .d
2014-10-10 Florent Kermarrecfill __init__.py to simplify imports
2014-10-10 Florent Kermarrecmila: simplify usage
2014-10-10 Florent Kermarrecuart2wishbone: share UARTRX and UARTTX with MiSoC
2014-10-06 Florent Kermarrecmila: fixes when used without RLE
2014-10-06 Florent Kermarrecmila: add clk_domain support
2014-10-01 Florent Kermarrecmila: simplify export
2014-09-24 Florent Kermarrecdo some clean up
2014-09-24 Florent Kermarrecuse new MiSoC UART with phase accumulators
2014-08-03 Florent Kermarrecuse verilog namespace to export mila configuration
2014-08-03 Florent Kermarrecuart2wishbone: disconnect rx line from shared pads...
2014-08-03 Florent Kermarrecclean up
2014-08-02 Florent Kermarrecstorage: use SyncFIFOBuffered to implement fifo in...
2014-08-01 Florent Kermarrecuse new MiSoC fifo (no flush signal)
2014-06-26 Florent Kermarrechost: add support for various csr_data width (8 & 32...
2014-06-21 Florent Kermarrecfix bit inversion on CSV/PY exports
2014-06-19 Florent Kermarreccreate dump class and specific export functions, add...
2014-06-17 Florent Kermarrechost: split read/export and add csv export
2014-06-05 Florent Kermarrecuart2wishbone: add default baudrate
2014-05-24 Florent Kermarrecmila: add input pipe to ease timing
2014-05-22 Florent Kermarrecdrivers: clean up / fixes
2014-05-22 Florent Kermarrecstorage: simplify run length encoder...
2014-05-22 Florent Kermarrecfix uart selection when opening wishbone
2014-05-20 Florent Kermarrecchange export format and simplify usage
2014-05-20 Florent Kermarrecmove some functions in drivers and export layout in csv
2014-05-20 Florent Kermarrecsimplify and clean up
2014-05-13 Florent Kermarrecstorage: simplify recorder...
2014-05-13 Florent Kermarrecsim: fix tb_trigger_csr
2014-04-20 Florent KermarrecREADME: update and point to misoc-de0nano examples
2014-04-20 Florent Kermarrecdrivers: add genericity & prog_range_detector, prog_edg...
2014-04-20 Florent Kermarrecrefactor code
2013-09-25 Florent Kermarrecuart2csr: add pads parameter
2013-09-22 Florent Kermarrecmila: test rle
2013-09-22 Florent Kermarrecmila: symplify usage
2013-09-22 Florent Kermarrecuse custom Records instead of Sink/Source (semms easier...
2013-09-22 Florent Kermarrecstorage: add run length encoder
2013-09-22 Florent Kermarrectrigger: add range_detector / edge_detector
2013-09-22 Florent Kermarrecmove trigger/recorder
2013-09-22 Florent Kermarreccom: add lm32 uart2wb bridge
2013-09-22 Florent Kermarrecclean up/ simplify
2013-09-22 Florent Kermarrecrefactoring
2013-06-16 Florent Kermarrecuse new migen API
2013-06-02 Florent Kermarrecsimplify signals connexion
2013-04-15 Florent Kermarrecupdate README
2013-04-14 Florent Kermarrecadapt to new CSR API
2013-04-02 Florent Kermarrecadd stb signal
2013-03-26 Florent Kermarrecadapt to mibuild & migen changes
2013-03-23 Florent Kermarrecadd Run Length Encoding
2013-03-23 Florent Kermarrecremove doc (to be re-written)
2013-03-23 Florent Kermarrecsimplify recorder
2013-03-22 Florent Kermarrecclean up
2013-03-22 Florent Kermarrecupdate driver api
2013-03-22 Florent Kermarrecclean up/fixes
2013-03-21 Florent Kermarrecfix uart2Csr and update miio example
2013-03-18 Florent Kermarrecupdate de0nano example/ remove de1 (wip)
2013-03-18 Florent KermarrecAdd uart2csr
2013-03-11 Florent Kermarrecget_registers --> get_registers_glue since it's conflic...
2013-03-01 Florent Kermarrecadapt to migen changes
2013-02-28 Florent Kermarrecuse mibuild for de1 example
2013-02-28 Florent Kermarrecuse mibuild for de0_nano example
2013-02-27 Florent Kermarreccompiles but untested
2013-02-26 Florent Kermarrecdoc: update
2013-02-26 Florent Kermarrecsim: update
2013-02-26 Florent Kermarrecexamples: use miscope.bridges
2013-02-26 Florent Kermarrecmove spi2csr to briges/spi2csr
2013-02-26 Florent Kermarrecexamples: update & simplify
2013-02-26 Florent Kermarrecexamples/../top: update
2013-02-22 Florent Kermarrec- reworking WIP
2013-01-27 Florent Kermarrec- fix timings.py
2013-01-21 Florent Kermarrec- update README...
2013-01-21 Florent Kermarrec- update README
2013-01-21 Florent Kermarrec- Update README
2013-01-21 Florent Kermarrec- Update README
2013-01-03 Florent Kermarrecadapt migScope to Migen changes
2012-09-26 Florent Kermarrecstart MigLa Doc
2012-09-18 Florent Kermarrecupdate schematics
2012-09-18 Florent Kermarrecupdate doc
2012-09-17 Florent Kermarrecadd Setup.py / .gitignore
2012-09-17 Florent Kermarrecadd test_MigLa_1 example : csr access analyzing
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