yosys.git
2019-09-18 Eddie HungMerge remote-tracking branch 'origin/master' into xc7dsp
2019-09-18 Eddie HungFix copy-paste
2019-09-18 Eddie HungCheck overflow condition is power of 2 without using...
2019-09-18 Eddie HungAdd .gitignore
2019-09-18 Eddie HungRefine macc testcase
2019-09-18 Eddie HungMis-spell
2019-09-18 Eddie HungAdd pattern detection support for DSP48E1 model, check...
2019-09-18 Eddie HungMerge pull request #1379 from mmicko/sim_models
2019-09-18 Eddie HungAdd support for overflow using pattern detector
2019-09-18 Eddie HungSeparate dffrstmux from dffcemux, fix typos
2019-09-18 Miodrag Milanovicmake note that it is for latch mode
2019-09-18 Miodrag Milanovicbetter lut handling
2019-09-18 Miodrag Milanovicbetter handling of lut and begin/end add
2019-09-18 Clifford WolfAdd "write_aiger -L"
2019-09-18 Clifford WolfFix stupid bug in btor back-end
2019-09-16 Clifford WolfBump version
2019-09-16 Clifford WolfMerge pull request #1380 from YosysHQ/clifford/fix1372
2019-09-16 Clifford WolfFix handling of range selects on loop variables, fixes...
2019-09-15 Eddie HungMerge pull request #1374 from YosysHQ/eddie/fix1371
2019-09-15 Marcin Kościelnickixilinx: Make blackbox library family-dependent.
2019-09-15 Clifford WolfMerge pull request #1377 from YosysHQ/clifford/fixzdigit
2019-09-15 Miodrag MilanovicAdded simulation models for Efinix and Anlogic
2019-09-14 Eddie HungAdd `undef DSP48E1_INST
2019-09-13 Eddie HungSpacing
2019-09-13 Eddie HungExplicitly order function arguments
2019-09-13 Eddie HungFix D -> P{,COUT} delay
2019-09-13 Eddie HungAdd no MULT no DPORT config
2019-09-13 Eddie HungAdd support for MULT and DPORT
2019-09-13 Eddie HungUse template specialisation
2019-09-13 Eddie HungRevert "SigSet<Cell*> to use stable compare class"
2019-09-13 Eddie HungRefine diagram
2019-09-13 Clifford WolfFix handling of z_digit "?" and fix optimization of...
2019-09-13 Clifford WolfMerge pull request #1373 from YosysHQ/clifford/fix1364
2019-09-13 Clifford WolfFix lexing of integer literals without radix
2019-09-13 Eddie HungAdd an ASCII drawing
2019-09-13 Eddie HungFinish explanation
2019-09-13 Eddie HungRename to techmap_guard
2019-09-13 Eddie HungInitial DSP48E1 box support
2019-09-13 Eddie HungSet more ports explicitly
2019-09-12 Eddie HungMerge remote-tracking branch 'origin/master' into xc7dsp
2019-09-12 Eddie HungGrammar
2019-09-12 Eddie Hungstatic_assert to enforce this going forward
2019-09-12 Eddie HungSigSet<Cell*> to use stable compare class
2019-09-12 David ShahMerge pull request #1370 from YosysHQ/dave/equiv_opt_mu...
2019-09-12 Clifford WolfFix lexing of integer literals, fixes #1364
2019-09-12 Eddie HungAdd support for A1 and B1 registers
2019-09-12 Eddie HungRaise a RuntimeError instead of AssertionError
2019-09-12 Eddie HungAdd AREG=2 BREG=2 test
2019-09-11 Eddie HungRename {A,B} -> {A2,B2}
2019-09-11 Eddie HungFix UB
2019-09-11 Eddie HungAdd PCOUT -> PCIN non-shifted cascading
2019-09-11 Eddie HungMerge remote-tracking branch 'origin/eddie/peepopt_dffm...
2019-09-11 Eddie HungCope with presence of reset muxes too
2019-09-11 Eddie HungCleanup
2019-09-11 Eddie HungAdd more tests
2019-09-11 Eddie HungMissing space
2019-09-11 Eddie HungMake unextend a udata
2019-09-11 Eddie HungOnly display log message if did_something
2019-09-11 Eddie HungInput registers to add DSP as new siguser to block...
2019-09-11 Eddie HungMore cleanup
2019-09-11 Marcin KościelnickiAdd -match-init option to dff2dffs.
2019-09-11 Eddie HungAdd support for A/B/C/D/AD reset
2019-09-11 Eddie HungUpdate test with a/b reset
2019-09-11 Eddie HungExtend test for RSTP and RSTM
2019-09-11 Eddie HungAdd support for RSTM
2019-09-11 David ShahAdd equiv_opt -multiclock
2019-09-11 David ShahMerge pull request #1362 from xobs/smtbmc-msvc2-build...
2019-09-11 Eddie HungMerge remote-tracking branch 'origin/eddie/peepopt_dffm...
2019-09-11 Eddie HungRename dffmuxext -> dffmux, also remove constants in...
2019-09-11 Eddie Hungproc instead of prep
2019-09-11 Eddie HungMerge remote-tracking branch 'origin/eddie/peepopt_dffm...
2019-09-11 Eddie HungAdd unsigned case
2019-09-11 Eddie HungMerge remote-tracking branch 'origin/master' into xc7dsp
2019-09-11 Eddie HungOnly pack out registers if \init is zero or x; then...
2019-09-11 Eddie HungFix RSTP
2019-09-11 Eddie HungAdd support for RSTP
2019-09-11 Eddie Hungenpol -> cepol
2019-09-11 Eddie Hungd?ffmux -> d?ffcemux
2019-09-11 Eddie HungRefactor MREG and PREG to out_dffe subpattern
2019-09-10 Eddie HungUpdate help text
2019-09-10 Eddie HungUpdate xilinx_dsp help text
2019-09-10 Eddie HungUpdate CHANGELOG
2019-09-10 Eddie HungMove "(skip if -nodsp)" message to label
2019-09-10 Eddie HungBe sensitive to signedness
2019-09-10 Eddie HungReally get rid of 'opt_expr -fine' by being explicit
2019-09-10 Eddie HungRemove wreduce call
2019-09-10 Eddie HungAdd comment for why opt_expr is necessary
2019-09-10 Eddie HungRevert "Remove "opt_expr -fine" call"
2019-09-10 Eddie HungRename label to map_dsp
2019-09-10 Eddie HungRemove "opt_expr -fine" call
2019-09-10 Clifford WolfBump version
2019-09-10 Eddie HungOops
2019-09-10 Eddie HungAdd SIMD test
2019-09-10 Eddie HungSupport subtraction as well
2019-09-10 Eddie HungSupport TWO24
2019-09-10 Eddie HungRefactor
2019-09-10 Eddie HungAdd initial USE_SIMD=FOUR12 support
2019-09-10 Eddie HungOnly trim sigM if USE_MULT; only look for ffM then too
2019-09-10 Eddie HungSet USE_MULT and USE_SIMD
2019-09-10 Sean Crosstests: ice40: fix div_mod SB_LUT4 count
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