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litex.git
2013-06-10
Sebastien Bourdeauducq
lasmi: fix minor problems
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2013-06-10
Sebastien Bourdeauducq
genlib/fsm: fix handling of zero delayed_enter
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2013-06-10
Sebastien Bourdeauducq
actorlib: LASMI DMA (untested)
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2013-06-10
Sebastien Bourdeauducq
bus: Wishbone -> LASMI bridge (untested)
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2013-06-09
Sebastien Bourdeauducq
examples/sim: add LASMI demo
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2013-06-09
Sebastien Bourdeauducq
bus/lasmibus: bugfixes
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2013-06-09
Sebastien Bourdeauducq
bus/lasmibus: add target and initiator
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2013-06-09
Sebastien Bourdeauducq
examples/sim: rename abstract_transactions to abstract_...
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2013-06-08
Sebastien Bourdeauducq
bus/lasmi: interface definition and crossbar (untested)
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2013-06-03
Kenneth Ryerson
csr/sram: fix reads on high addresses when word_bits...
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2013-06-03
Kenneth Ryerson
csr/sram: fix page_bits computation
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2013-05-30
Sebastien Bourdeauducq
genlib/misc: fix import
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2013-05-30
Sebastien Bourdeauducq
bus/csr/SRAM: better handling of writes to memories...
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2013-05-30
Sebastien Bourdeauducq
bitreverse: fhdl/tools -> genlib/misc
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2013-05-28
Sebastien Bourdeauducq
Make memory ports part of specials
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2013-05-22
Sebastien Bourdeauducq
New migen.fhdl.std to simplify imports + len->flen
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2013-05-19
Sebastien Bourdeauducq
bus/wishbone/SRAM: support init and read_only
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2013-05-19
Sebastien Bourdeauducq
bus/csr/SRAM: support init
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2013-05-16
Sebastien Bourdeauducq
setup.py: update required Python version
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2013-05-12
Sebastien Bourdeauducq
bus/asmi: port sharing support
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2013-05-11
Sebastien Bourdeauducq
fhdl/tools/_TargetLister: do not include array keys...
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2013-05-11
Sebastien Bourdeauducq
genlib/record: match_by_position -> connect_flat
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2013-05-10
Sebastien Bourdeauducq
Revert "genlib/record/connect: add match_by_position"
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2013-05-08
Sebastien Bourdeauducq
bank/description/AutoCSR: add autocsr_exclude
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2013-05-08
Sebastien Bourdeauducq
dma_asmi: cleanup
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2013-05-08
Sebastien Bourdeauducq
bank/eventmanager: refactor, rename EventSourceLevel...
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2013-05-04
Sebastien Bourdeauducq
actorlib/spi: add DMAWriteController
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2013-05-04
Sebastien Bourdeauducq
actorlib/dma_asmi/OOOWriter: fix tag offset
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2013-05-02
Sebastien Bourdeauducq
flow/network/DataFlowGraph: add_buffered_connection
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2013-05-02
Sebastien Bourdeauducq
bank/description/CSRStorage: set reset property of...
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2013-05-01
Sebastien Bourdeauducq
flow/network: better determination of plumbing layout
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2013-05-01
Sebastien Bourdeauducq
actorlib/dma_asmi: drive dat_wm
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2013-04-30
Sebastien Bourdeauducq
actorlib/spi: add DMA read controller
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2013-04-30
Sebastien Bourdeauducq
actorlib/spi/SingleGenerator: use CSR alignment bits
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2013-04-30
Sebastien Bourdeauducq
bank/description/CSRStorage: support alignment bits
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2013-04-30
Sebastien Bourdeauducq
flow/network/CompositeActor: expose unconnected endpoints
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2013-04-30
Sebastien Bourdeauducq
flow/network/DataFlowGraph: add add_pipeline
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2013-04-28
Sebastien Bourdeauducq
actorlib/spi/Collector: cleanup, new APIs
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2013-04-28
Sebastien Bourdeauducq
actorlib/dma_asmi: support for writes
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2013-04-25
Sebastien Bourdeauducq
genlib/fifo: disable retiming on Gray counter outputs
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2013-04-25
Sebastien Bourdeauducq
genlib/cdc: add NoRetiming
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2013-04-25
Sebastien Bourdeauducq
fhdl/verilog: recursive Special lowering
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2013-04-25
Sebastien Bourdeauducq
genlib/fifo: add asynchronous FIFO
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2013-04-25
Sebastien Bourdeauducq
fhdl/specials/memory: do not write address register...
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2013-04-25
Sebastien Bourdeauducq
graycounter: expose binary output
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2013-04-24
Sebastien Bourdeauducq
genlib: add Gray counter
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2013-04-23
Florent Kermarrec
Support for resetless clock domains
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2013-04-15
Sebastien Bourdeauducq
Change license to 2-clause BSD
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2013-04-14
Sebastien Bourdeauducq
bus/csr/SRAM: fix Module conversion errors
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2013-04-14
Sebastien Bourdeauducq
fhdl: support len() on all values
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2013-04-11
Sebastien Bourdeauducq
fhdl/verilog/_printinit: initialize undriven Special...
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2013-04-10
Sebastien Bourdeauducq
ioo+pytholite: use new Module API
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2013-04-10
Sebastien Bourdeauducq
fhdl/visit: add TransformModule
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2013-04-10
Sebastien Bourdeauducq
ioo: move to genlib
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2013-04-10
Sebastien Bourdeauducq
uio: remove Trampoline (Python 3.3 provides generator...
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2013-04-10
Sebastien Bourdeauducq
flow: match record fields by position
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2013-04-10
Sebastien Bourdeauducq
genlib/record/connect: add match_by_position
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2013-04-10
Sebastien Bourdeauducq
flow: use Module and new Record APIs
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2013-04-01
Sebastien Bourdeauducq
flow: adapt to new Record API
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2013-04-01
Sebastien Bourdeauducq
bus: replace simple bus module with new bidirectional...
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2013-04-01
Sebastien Bourdeauducq
New bidirectional-capable Record API
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2013-03-30
Sebastien Bourdeauducq
New CSR API
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2013-03-30
Sebastien Bourdeauducq
fhdl/module/finalize: pass additional args to do_finalize
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2013-03-26
Sebastien Bourdeauducq
fhdl/specials: clean up clock domain handling
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2013-03-25
Sebastien Bourdeauducq
actorlib/structuring/Cast: support inversion
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2013-03-25
Sebastien Bourdeauducq
bank/csrgen/BankArray: retain name information
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2013-03-25
Sebastien Bourdeauducq
bank/description/Register: add get_size
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2013-03-23
Sebastien Bourdeauducq
genlib/record: use getattr instead of __dict__
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2013-03-23
Sebastien Bourdeauducq
genlib/record: add eq
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2013-03-22
Sebastien Bourdeauducq
genlib/fifo: simple synchronous FIFO
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2013-03-22
Sebastien Bourdeauducq
fhdl/module: support clock domain remapping of submodules
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2013-03-21
Sebastien Bourdeauducq
genlib/cdc/MultiReg: output clock domain defaults to sys
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2013-03-19
Sebastien Bourdeauducq
examples/sim/fir: convert to new API
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2013-03-18
Sebastien Bourdeauducq
fhdl/verilog: optionally disable clock domain creation
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2013-03-18
Sebastien Bourdeauducq
examples/basic/arrays: demonstrate lowering of Array...
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2013-03-18
Sebastien Bourdeauducq
Lowering of Special expressions + support ClockSignal...
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2013-03-18
Sebastien Bourdeauducq
fhdl/tools/_ArrayLowerer: complete support for arrays...
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2013-03-18
Sebastien Bourdeauducq
fhdl/tools/value_bits_sign: support not
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2013-03-17
Sebastien Bourdeauducq
fhdl/structure: style fix
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2013-03-17
Sébastien Bourdeauducq
Merge pull request #6 from larsclausen/master
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2013-03-15
Sebastien Bourdeauducq
genlib/cdc/MultiReg: implement rename_clock_domain...
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2013-03-15
Sebastien Bourdeauducq
genlib/cdc/MultiReg: remove idomain
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2013-03-15
Sebastien Bourdeauducq
fhdl/specials: fix rename_clock_domain declarations
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2013-03-15
Sebastien Bourdeauducq
sim: remove PureSimulable (superseded by Module)
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2013-03-15
Sebastien Bourdeauducq
structure: remove Fragment.call_sim
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2013-03-15
Sebastien Bourdeauducq
sim: compatibility with new ClockDomain API
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2013-03-15
Sebastien Bourdeauducq
Local clock domain example
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2013-03-15
Sebastien Bourdeauducq
Make ClockDomains part of fragments
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2013-03-14
Sebastien Bourdeauducq
flow/actor/filter_endpoints: deterministic order
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2013-03-13
Sebastien Bourdeauducq
bank/csrgen/BankArray: create banks in sorted order
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2013-03-13
Sebastien Bourdeauducq
bank/description: modify reg/mem in-place
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2013-03-12
Lars-Peter...
Allow SimActors to produce/consume a constant stream...
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2013-03-12
Lars-Peter...
Add support for negative slice indices
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2013-03-12
Sebastien Bourdeauducq
examples/pytholite: use new APIs
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2013-03-12
Sebastien Bourdeauducq
sim/generic: support implicit get_fragment
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2013-03-12
Sebastien Bourdeauducq
vpi: make it work by default on Arch
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2013-03-12
Sebastien Bourdeauducq
examples/basic: use new APIs
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2013-03-12
Sebastien Bourdeauducq
fhdl/verilog: implicit get_fragment
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2013-03-12
Sebastien Bourdeauducq
fhdl/specials/Memory: automatic name#
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2013-03-12
Sebastien Bourdeauducq
bank: automatic register naming
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