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last changeTue, 16 Aug 2022 05:43:31 +0000 (22:43 -0700)
shortlog
2022-08-16 Jacob Lifshaychange to use plain_data.fields master
2022-08-12 Jacob Lifshayswitch dataclass to plain_data
2022-05-12 Jacob Lifshaypin some dependency versions
2022-05-06 Jacob Lifshaysplit step counter into clock and substep
2022-05-05 Jacob Lifshayremove now-unused EqualLeadingZeroCount
2022-05-05 Jacob Lifshayswitch to better CLDivRem algorithm
2022-05-05 Jacob Lifshayshrink signal widths
2022-05-05 Jacob Lifshayadd cldivrem_shifting as a more efficient algorithm
2022-05-05 Jacob Lifshaychange test_cldivrem to check all input values for...
2022-05-04 Jacob Lifshayimplement CLDivRemFSMStage
2022-04-08 Jacob Lifshayclean up EqualLeadingZeroCount.elaborate
2022-04-08 Jacob Lifshayclean up CLMulAdd.elaborate
2022-04-08 Luke Kenneth... move NOT into carrysum so that variable name
2022-04-07 Luke Kenneth... remove addend1 and addend2 just add bothones and different.
2022-04-07 Luke Kenneth... sigh
2022-04-07 Luke Kenneth... add TODO comment-notes and rename part_prods to just...
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heads
6 months ago bug_785_gfb_insns
2 years ago master