git.libre-soc.org Git - rv32.git/summary

2018-11-29	Luke Kenneth...	add Makefile for verilog compilation master	commit \| commitdiff \| tree
2018-11-28	Luke Kenneth...	add to .gitignore	commit \| commitdiff \| tree
2018-11-28	Jacob Lifshay	Merge branch 'master' of ssh://git.libre-riscv.org...	commit \| commitdiff \| tree
2018-11-28	Jacob Lifshay	add instructions for using iverilog	commit \| commitdiff \| tree
2018-11-28	Luke Kenneth...	handle_trap returns values that get manually transferre...	commit \| commitdiff \| tree
2018-11-27	Luke Kenneth...	remove trap_handled, remove w_en	commit \| commitdiff \| tree
2018-11-27	Luke Kenneth...	experiment with separate cpu handle csr module	commit \| commitdiff \| tree
2018-11-27	Luke Kenneth...	move handle trap out to separate module, bit messy	commit \| commitdiff \| tree
2018-11-27	Luke Kenneth...	split out cpu handle_trap	commit \| commitdiff \| tree
2018-11-27	Luke Kenneth...	split out cpu_mip to separate module	commit \| commitdiff \| tree
2018-11-27	Luke Kenneth...	split out cpu_mie into separate module	commit \| commitdiff \| tree
2018-11-27	Luke Kenneth...	split out MStatus to separate module	commit \| commitdiff \| tree
2018-11-27	Luke Kenneth...	split cpu loadstore calc out	commit \| commitdiff \| tree
2018-11-26	Luke Kenneth...	break out cpu load/store calculation into separate...	commit \| commitdiff \| tree
2018-11-26	Luke Kenneth...	move get_fetch_action to separate verilog file	commit \| commitdiff \| tree
2018-11-26	Luke Kenneth...	prepare get_fetch_action for move to separate module	commit \| commitdiff \| tree
...

5 years ago