machxo2: Fix naming of TRELLIS_IO ports to match PIO pins in routing graph.
[yosys.git] / backends / rtlil /
drwxr-xr-x   ..
-rw-r--r-- 41 Makefile.inc
-rw-r--r-- 16169 rtlil_backend.cc
-rw-r--r-- 2405 rtlil_backend.h