mibuild/lattice/diamond: add verilog include path (thanks Lattice's FAE since it...
[litex.git] / mibuild /
drwxr-xr-x   ..
-rw-r--r-- 0 __init__.py
drwxr-xr-x - altera
-rw-r--r-- 9048 generic_platform.py
-rw-r--r-- 932 generic_programmer.py
drwxr-xr-x - lattice
drwxr-xr-x - platforms
drwxr-xr-x - sim
-rw-r--r-- 737 tools.py
drwxr-xr-x - xilinx