ice40: Adapt the relut process passes to the new $lut <=> SB_LUT4 port map
[yosys.git] / passes /
drwxr-xr-x   ..
drwxr-xr-x - cmds
drwxr-xr-x - equiv
drwxr-xr-x - fsm
drwxr-xr-x - hierarchy
drwxr-xr-x - memory
drwxr-xr-x - opt
drwxr-xr-x - pmgen
drwxr-xr-x - proc
drwxr-xr-x - sat
drwxr-xr-x - techmap
drwxr-xr-x - tests