CPU: Create a microcode ROM object in the CPU which is defined by the ISA.
[gem5.git] / src / arch / sparc / solaris /
drwxr-xr-x   ..
-rw-r--r-- 17655 process.cc
-rw-r--r-- 2346 process.hh
-rw-r--r-- 3218 solaris.cc
-rw-r--r-- 3016 solaris.hh