Fix a bug to handle the fact that a CPU can send Functional accesses while a sendTimi...
[gem5.git] / src / mem / cache / prefetch /
drwxr-xr-x   ..
-rw-r--r-- 8114 base_prefetcher.cc
-rw-r--r-- 3615 base_prefetcher.hh
-rw-r--r-- 2205 ghb_prefetcher.cc
-rw-r--r-- 4209 ghb_prefetcher.hh
-rw-r--r-- 2217 stride_prefetcher.cc
-rw-r--r-- 5023 stride_prefetcher.hh
-rw-r--r-- 2775 tagged_prefetcher.hh
-rw-r--r-- 2923 tagged_prefetcher_impl.hh