bit of a big update, remove all bit-reversed LD operations, replace with
[openpower-isa.git] / src / openpower / sv /
drwxr-xr-x   ..
-rw-r--r-- 27225 sv_analysis.py
-rw-r--r-- 5049 svp64.py
-rw-r--r-- 1667 svstate.py
drwxr-xr-x - trans