add SRR0 and SRR1 to list of special_regs in parser
[openpower-isa.git] / src / test /
drwxr-xr-x   ..
drwxr-xr-x - basic_pypowersim
drwxr-xr-x - basic_pypowersim_fp
drwxr-xr-x - basic_svp64_trans