projects / yosys.git / tree
| drwxr-xr-x | .. | ||
| -rw-r--r-- | 54 | .gitignore | blob | history | raw |
| -rw-r--r-- | 921 | Makefile.inc | blob | history | raw |
| -rw-r--r-- | 2360 | arith_map.v | blob | history | raw |
| -rw-r--r-- | 443 | bram.txt | blob | history | raw |
| -rwxr-xr-x | 1015 | brams_init.py | blob | history | raw |
| -rw-r--r-- | 12163 | cells_map.v | blob | history | raw |
| -rw-r--r-- | 18022 | cells_sim.v | blob | history | raw |
| -rw-r--r-- | 214 | dram.txt | blob | history | raw |
| -rw-r--r-- | 491 | drams_map.v | blob | history | raw |
| -rw-r--r-- | 8714 | synth_ecp5.cc | blob | history | raw |