Added $alu support to test_cell
[yosys.git] / techlibs / xilinx /
drwxr-xr-x   ..
-rw-r--r-- 209 Makefile.inc
-rw-r--r-- 1154 cells.v
drwxr-xr-x - example_mojo_counter
drwxr-xr-x - example_sim_counter
drwxr-xr-x - example_zed_counter
-rw-r--r-- 6657 synth_xilinx.cc