Use "verilog -noattr" in tests/techmap/mem_simple_4x1 test (for old iverilog)
[yosys.git] / tests / tools /
drwxr-xr-x   ..
-rw-r--r-- 11 .gitignore
-rwxr-xr-x 3524 autotest.sh
-rw-r--r-- 1211 cmp_tbdata.c
-rwxr-xr-x 1428 profiler.pl
-rwxr-xr-x 3210 txt2tikztiming.py
-rwxr-xr-x 1475 vcd2txt.pl
-rwxr-xr-x 7484 vcdcd.pl