1 /* tc-ppc.c -- Assemble for the PowerPC or POWER (RS/6000)
2 Copyright (C) 1994-2021 Free Software Foundation, Inc.
3 Written by Ian Lance Taylor, Cygnus Support.
5 This file is part of GAS, the GNU Assembler.
7 GAS is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3, or (at your option)
12 GAS is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GAS; see the file COPYING. If not, write to the Free
19 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
23 #include "safe-ctype.h"
25 #include "dw2gencfi.h"
26 #include "opcode/ppc.h"
30 #include "elf/ppc64.h"
31 #include "dwarf2dbg.h"
35 #include "coff/xcoff.h"
39 /* This is the assembler for the PowerPC or POWER (RS/6000) chips. */
41 /* Tell the main code what the endianness is. */
42 extern int target_big_endian
;
44 /* Whether or not, we've set target_big_endian. */
45 static int set_target_endian
= 0;
47 /* Whether to use user friendly register names. */
48 #ifndef TARGET_REG_NAMES_P
49 #define TARGET_REG_NAMES_P FALSE
52 /* Macros for calculating LO, HI, HA, HIGHER, HIGHERA, HIGHEST,
55 /* #lo(value) denotes the least significant 16 bits of the indicated. */
56 #define PPC_LO(v) ((v) & 0xffff)
58 /* #hi(value) denotes bits 16 through 31 of the indicated value. */
59 #define PPC_HI(v) (((v) >> 16) & 0xffff)
61 /* #ha(value) denotes the high adjusted value: bits 16 through 31 of
62 the indicated value, compensating for #lo() being treated as a
64 #define PPC_HA(v) PPC_HI ((v) + 0x8000)
66 /* #higher(value) denotes bits 32 through 47 of the indicated value. */
67 #define PPC_HIGHER(v) (((v) >> 16 >> 16) & 0xffff)
69 /* #highera(value) denotes bits 32 through 47 of the indicated value,
70 compensating for #lo() being treated as a signed number. */
71 #define PPC_HIGHERA(v) PPC_HIGHER ((v) + 0x8000)
73 /* #highest(value) denotes bits 48 through 63 of the indicated value. */
74 #define PPC_HIGHEST(v) (((v) >> 24 >> 24) & 0xffff)
76 /* #highesta(value) denotes bits 48 through 63 of the indicated value,
77 compensating for #lo being treated as a signed number. */
78 #define PPC_HIGHESTA(v) PPC_HIGHEST ((v) + 0x8000)
80 #define SEX16(val) (((val) ^ 0x8000) - 0x8000)
82 /* For the time being on ppc64, don't report overflow on @h and @ha
83 applied to constants. */
84 #define REPORT_OVERFLOW_HI 0
86 static bfd_boolean reg_names_p
= TARGET_REG_NAMES_P
;
88 static void ppc_macro (char *, const struct powerpc_macro
*);
89 static void ppc_byte (int);
91 #if defined (OBJ_XCOFF) || defined (OBJ_ELF)
92 static void ppc_tc (int);
93 static void ppc_machine (int);
97 static void ppc_comm (int);
98 static void ppc_bb (int);
99 static void ppc_bc (int);
100 static void ppc_bf (int);
101 static void ppc_biei (int);
102 static void ppc_bs (int);
103 static void ppc_eb (int);
104 static void ppc_ec (int);
105 static void ppc_ef (int);
106 static void ppc_es (int);
107 static void ppc_csect (int);
108 static void ppc_dwsect (int);
109 static void ppc_change_csect (symbolS
*, offsetT
);
110 static void ppc_function (int);
111 static void ppc_extern (int);
112 static void ppc_lglobl (int);
113 static void ppc_ref (int);
114 static void ppc_section (int);
115 static void ppc_named_section (int);
116 static void ppc_stabx (int);
117 static void ppc_rename (int);
118 static void ppc_toc (int);
119 static void ppc_xcoff_cons (int);
120 static void ppc_vbyte (int);
124 static void ppc_elf_rdata (int);
125 static void ppc_elf_lcomm (int);
126 static void ppc_elf_localentry (int);
127 static void ppc_elf_abiversion (int);
128 static void ppc_elf_gnu_attribute (int);
131 /* Generic assembler global variables which must be defined by all
135 /* This string holds the chars that always start a comment. If the
136 pre-processor is disabled, these aren't very useful. The macro
137 tc_comment_chars points to this. We use this, rather than the
138 usual comment_chars, so that we can switch for Solaris conventions. */
139 static const char ppc_solaris_comment_chars
[] = "#!";
140 static const char ppc_eabi_comment_chars
[] = "#";
142 #ifdef TARGET_SOLARIS_COMMENT
143 const char *ppc_comment_chars
= ppc_solaris_comment_chars
;
145 const char *ppc_comment_chars
= ppc_eabi_comment_chars
;
148 const char comment_chars
[] = "#";
151 /* Characters which start a comment at the beginning of a line. */
152 const char line_comment_chars
[] = "#";
154 /* Characters which may be used to separate multiple commands on a
156 const char line_separator_chars
[] = ";";
158 /* Characters which are used to indicate an exponent in a floating
160 const char EXP_CHARS
[] = "eE";
162 /* Characters which mean that a number is a floating point constant,
164 const char FLT_CHARS
[] = "dD";
166 /* Anything that can start an operand needs to be mentioned here,
167 to stop the input scrubber eating whitespace. */
168 const char ppc_symbol_chars
[] = "%[";
170 /* The dwarf2 data alignment, adjusted for 32 or 64 bit. */
171 int ppc_cie_data_alignment
;
173 /* The dwarf2 minimum instruction length. */
174 int ppc_dwarf2_line_min_insn_length
;
176 /* More than this number of nops in an alignment op gets a branch
178 unsigned long nop_limit
= 4;
180 /* The type of processor we are assembling for. This is one or more
181 of the PPC_OPCODE flags defined in opcode/ppc.h. */
182 ppc_cpu_t ppc_cpu
= 0;
183 ppc_cpu_t sticky
= 0;
185 /* Value for ELF e_flags EF_PPC64_ABI. */
186 unsigned int ppc_abiversion
= 0;
189 /* Flags set on encountering toc relocs. */
191 has_large_toc_reloc
= 1,
192 has_small_toc_reloc
= 2
196 /* Warn on emitting data to code sections. */
202 /* The target specific pseudo-ops which we support. */
204 const pseudo_typeS md_pseudo_table
[] =
206 /* Pseudo-ops which must be overridden. */
207 { "byte", ppc_byte
, 0 },
210 /* Pseudo-ops specific to the RS/6000 XCOFF format. Some of these
211 legitimately belong in the obj-*.c file. However, XCOFF is based
212 on COFF, and is only implemented for the RS/6000. We just use
213 obj-coff.c, and add what we need here. */
214 { "comm", ppc_comm
, 0 },
215 { "lcomm", ppc_comm
, 1 },
219 { "bi", ppc_biei
, 0 },
221 { "csect", ppc_csect
, 0 },
222 { "dwsect", ppc_dwsect
, 0 },
223 { "data", ppc_section
, 'd' },
227 { "ei", ppc_biei
, 1 },
229 { "extern", ppc_extern
, 0 },
230 { "function", ppc_function
, 0 },
231 { "lglobl", ppc_lglobl
, 0 },
232 { "ref", ppc_ref
, 0 },
233 { "rename", ppc_rename
, 0 },
234 { "section", ppc_named_section
, 0 },
235 { "stabx", ppc_stabx
, 0 },
236 { "text", ppc_section
, 't' },
237 { "toc", ppc_toc
, 0 },
238 { "long", ppc_xcoff_cons
, 2 },
239 { "llong", ppc_xcoff_cons
, 3 },
240 { "word", ppc_xcoff_cons
, 1 },
241 { "short", ppc_xcoff_cons
, 1 },
242 { "vbyte", ppc_vbyte
, 0 },
246 { "llong", cons
, 8 },
247 { "rdata", ppc_elf_rdata
, 0 },
248 { "rodata", ppc_elf_rdata
, 0 },
249 { "lcomm", ppc_elf_lcomm
, 0 },
250 { "localentry", ppc_elf_localentry
, 0 },
251 { "abiversion", ppc_elf_abiversion
, 0 },
252 { "gnu_attribute", ppc_elf_gnu_attribute
, 0},
255 #if defined (OBJ_XCOFF) || defined (OBJ_ELF)
257 { "machine", ppc_machine
, 0 },
264 /* Predefined register names if -mregnames (or default for Windows NT).
265 In general, there are lots of them, in an attempt to be compatible
266 with a number of other Windows NT assemblers. */
268 /* Structure to hold information about predefined registers. */
272 unsigned short value
;
273 unsigned short flags
;
276 /* List of registers that are pre-defined:
278 Each general register has predefined names of the form:
279 1. r<reg_num> which has the value <reg_num>.
280 2. r.<reg_num> which has the value <reg_num>.
282 Each floating point register has predefined names of the form:
283 1. f<reg_num> which has the value <reg_num>.
284 2. f.<reg_num> which has the value <reg_num>.
286 Each vector unit register has predefined names of the form:
287 1. v<reg_num> which has the value <reg_num>.
288 2. v.<reg_num> which has the value <reg_num>.
290 Each condition register has predefined names of the form:
291 1. cr<reg_num> which has the value <reg_num>.
292 2. cr.<reg_num> which has the value <reg_num>.
294 There are individual registers as well:
295 sp or r.sp has the value 1
296 rtoc or r.toc has the value 2
301 dsisr has the value 18
303 sdr1 has the value 25
304 srr0 has the value 26
305 srr1 has the value 27
307 The table is sorted. Suitable for searching by a binary search. */
309 static const struct pd_reg pre_defined_registers
[] =
311 /* VSX accumulators. */
312 { "a0", 0, PPC_OPERAND_ACC
},
313 { "a1", 1, PPC_OPERAND_ACC
},
314 { "a2", 2, PPC_OPERAND_ACC
},
315 { "a3", 3, PPC_OPERAND_ACC
},
316 { "a4", 4, PPC_OPERAND_ACC
},
317 { "a5", 5, PPC_OPERAND_ACC
},
318 { "a6", 6, PPC_OPERAND_ACC
},
319 { "a7", 7, PPC_OPERAND_ACC
},
321 /* Condition Registers */
322 { "cr.0", 0, PPC_OPERAND_CR_REG
},
323 { "cr.1", 1, PPC_OPERAND_CR_REG
},
324 { "cr.2", 2, PPC_OPERAND_CR_REG
},
325 { "cr.3", 3, PPC_OPERAND_CR_REG
},
326 { "cr.4", 4, PPC_OPERAND_CR_REG
},
327 { "cr.5", 5, PPC_OPERAND_CR_REG
},
328 { "cr.6", 6, PPC_OPERAND_CR_REG
},
329 { "cr.7", 7, PPC_OPERAND_CR_REG
},
331 { "cr0", 0, PPC_OPERAND_CR_REG
},
332 { "cr1", 1, PPC_OPERAND_CR_REG
},
333 { "cr2", 2, PPC_OPERAND_CR_REG
},
334 { "cr3", 3, PPC_OPERAND_CR_REG
},
335 { "cr4", 4, PPC_OPERAND_CR_REG
},
336 { "cr5", 5, PPC_OPERAND_CR_REG
},
337 { "cr6", 6, PPC_OPERAND_CR_REG
},
338 { "cr7", 7, PPC_OPERAND_CR_REG
},
340 { "ctr", 9, PPC_OPERAND_SPR
},
341 { "dar", 19, PPC_OPERAND_SPR
},
342 { "dec", 22, PPC_OPERAND_SPR
},
343 { "dsisr", 18, PPC_OPERAND_SPR
},
345 /* Floating point registers */
346 { "f.0", 0, PPC_OPERAND_FPR
},
347 { "f.1", 1, PPC_OPERAND_FPR
},
348 { "f.10", 10, PPC_OPERAND_FPR
},
349 { "f.11", 11, PPC_OPERAND_FPR
},
350 { "f.12", 12, PPC_OPERAND_FPR
},
351 { "f.13", 13, PPC_OPERAND_FPR
},
352 { "f.14", 14, PPC_OPERAND_FPR
},
353 { "f.15", 15, PPC_OPERAND_FPR
},
354 { "f.16", 16, PPC_OPERAND_FPR
},
355 { "f.17", 17, PPC_OPERAND_FPR
},
356 { "f.18", 18, PPC_OPERAND_FPR
},
357 { "f.19", 19, PPC_OPERAND_FPR
},
358 { "f.2", 2, PPC_OPERAND_FPR
},
359 { "f.20", 20, PPC_OPERAND_FPR
},
360 { "f.21", 21, PPC_OPERAND_FPR
},
361 { "f.22", 22, PPC_OPERAND_FPR
},
362 { "f.23", 23, PPC_OPERAND_FPR
},
363 { "f.24", 24, PPC_OPERAND_FPR
},
364 { "f.25", 25, PPC_OPERAND_FPR
},
365 { "f.26", 26, PPC_OPERAND_FPR
},
366 { "f.27", 27, PPC_OPERAND_FPR
},
367 { "f.28", 28, PPC_OPERAND_FPR
},
368 { "f.29", 29, PPC_OPERAND_FPR
},
369 { "f.3", 3, PPC_OPERAND_FPR
},
370 { "f.30", 30, PPC_OPERAND_FPR
},
371 { "f.31", 31, PPC_OPERAND_FPR
},
372 { "f.32", 32, PPC_OPERAND_VSR
},
373 { "f.33", 33, PPC_OPERAND_VSR
},
374 { "f.34", 34, PPC_OPERAND_VSR
},
375 { "f.35", 35, PPC_OPERAND_VSR
},
376 { "f.36", 36, PPC_OPERAND_VSR
},
377 { "f.37", 37, PPC_OPERAND_VSR
},
378 { "f.38", 38, PPC_OPERAND_VSR
},
379 { "f.39", 39, PPC_OPERAND_VSR
},
380 { "f.4", 4, PPC_OPERAND_FPR
},
381 { "f.40", 40, PPC_OPERAND_VSR
},
382 { "f.41", 41, PPC_OPERAND_VSR
},
383 { "f.42", 42, PPC_OPERAND_VSR
},
384 { "f.43", 43, PPC_OPERAND_VSR
},
385 { "f.44", 44, PPC_OPERAND_VSR
},
386 { "f.45", 45, PPC_OPERAND_VSR
},
387 { "f.46", 46, PPC_OPERAND_VSR
},
388 { "f.47", 47, PPC_OPERAND_VSR
},
389 { "f.48", 48, PPC_OPERAND_VSR
},
390 { "f.49", 49, PPC_OPERAND_VSR
},
391 { "f.5", 5, PPC_OPERAND_FPR
},
392 { "f.50", 50, PPC_OPERAND_VSR
},
393 { "f.51", 51, PPC_OPERAND_VSR
},
394 { "f.52", 52, PPC_OPERAND_VSR
},
395 { "f.53", 53, PPC_OPERAND_VSR
},
396 { "f.54", 54, PPC_OPERAND_VSR
},
397 { "f.55", 55, PPC_OPERAND_VSR
},
398 { "f.56", 56, PPC_OPERAND_VSR
},
399 { "f.57", 57, PPC_OPERAND_VSR
},
400 { "f.58", 58, PPC_OPERAND_VSR
},
401 { "f.59", 59, PPC_OPERAND_VSR
},
402 { "f.6", 6, PPC_OPERAND_FPR
},
403 { "f.60", 60, PPC_OPERAND_VSR
},
404 { "f.61", 61, PPC_OPERAND_VSR
},
405 { "f.62", 62, PPC_OPERAND_VSR
},
406 { "f.63", 63, PPC_OPERAND_VSR
},
407 { "f.7", 7, PPC_OPERAND_FPR
},
408 { "f.8", 8, PPC_OPERAND_FPR
},
409 { "f.9", 9, PPC_OPERAND_FPR
},
411 { "f0", 0, PPC_OPERAND_FPR
},
412 { "f1", 1, PPC_OPERAND_FPR
},
413 { "f10", 10, PPC_OPERAND_FPR
},
414 { "f11", 11, PPC_OPERAND_FPR
},
415 { "f12", 12, PPC_OPERAND_FPR
},
416 { "f13", 13, PPC_OPERAND_FPR
},
417 { "f14", 14, PPC_OPERAND_FPR
},
418 { "f15", 15, PPC_OPERAND_FPR
},
419 { "f16", 16, PPC_OPERAND_FPR
},
420 { "f17", 17, PPC_OPERAND_FPR
},
421 { "f18", 18, PPC_OPERAND_FPR
},
422 { "f19", 19, PPC_OPERAND_FPR
},
423 { "f2", 2, PPC_OPERAND_FPR
},
424 { "f20", 20, PPC_OPERAND_FPR
},
425 { "f21", 21, PPC_OPERAND_FPR
},
426 { "f22", 22, PPC_OPERAND_FPR
},
427 { "f23", 23, PPC_OPERAND_FPR
},
428 { "f24", 24, PPC_OPERAND_FPR
},
429 { "f25", 25, PPC_OPERAND_FPR
},
430 { "f26", 26, PPC_OPERAND_FPR
},
431 { "f27", 27, PPC_OPERAND_FPR
},
432 { "f28", 28, PPC_OPERAND_FPR
},
433 { "f29", 29, PPC_OPERAND_FPR
},
434 { "f3", 3, PPC_OPERAND_FPR
},
435 { "f30", 30, PPC_OPERAND_FPR
},
436 { "f31", 31, PPC_OPERAND_FPR
},
437 { "f32", 32, PPC_OPERAND_VSR
},
438 { "f33", 33, PPC_OPERAND_VSR
},
439 { "f34", 34, PPC_OPERAND_VSR
},
440 { "f35", 35, PPC_OPERAND_VSR
},
441 { "f36", 36, PPC_OPERAND_VSR
},
442 { "f37", 37, PPC_OPERAND_VSR
},
443 { "f38", 38, PPC_OPERAND_VSR
},
444 { "f39", 39, PPC_OPERAND_VSR
},
445 { "f4", 4, PPC_OPERAND_FPR
},
446 { "f40", 40, PPC_OPERAND_VSR
},
447 { "f41", 41, PPC_OPERAND_VSR
},
448 { "f42", 42, PPC_OPERAND_VSR
},
449 { "f43", 43, PPC_OPERAND_VSR
},
450 { "f44", 44, PPC_OPERAND_VSR
},
451 { "f45", 45, PPC_OPERAND_VSR
},
452 { "f46", 46, PPC_OPERAND_VSR
},
453 { "f47", 47, PPC_OPERAND_VSR
},
454 { "f48", 48, PPC_OPERAND_VSR
},
455 { "f49", 49, PPC_OPERAND_VSR
},
456 { "f5", 5, PPC_OPERAND_FPR
},
457 { "f50", 50, PPC_OPERAND_VSR
},
458 { "f51", 51, PPC_OPERAND_VSR
},
459 { "f52", 52, PPC_OPERAND_VSR
},
460 { "f53", 53, PPC_OPERAND_VSR
},
461 { "f54", 54, PPC_OPERAND_VSR
},
462 { "f55", 55, PPC_OPERAND_VSR
},
463 { "f56", 56, PPC_OPERAND_VSR
},
464 { "f57", 57, PPC_OPERAND_VSR
},
465 { "f58", 58, PPC_OPERAND_VSR
},
466 { "f59", 59, PPC_OPERAND_VSR
},
467 { "f6", 6, PPC_OPERAND_FPR
},
468 { "f60", 60, PPC_OPERAND_VSR
},
469 { "f61", 61, PPC_OPERAND_VSR
},
470 { "f62", 62, PPC_OPERAND_VSR
},
471 { "f63", 63, PPC_OPERAND_VSR
},
472 { "f7", 7, PPC_OPERAND_FPR
},
473 { "f8", 8, PPC_OPERAND_FPR
},
474 { "f9", 9, PPC_OPERAND_FPR
},
476 /* Quantization registers used with pair single instructions. */
477 { "gqr.0", 0, PPC_OPERAND_GQR
},
478 { "gqr.1", 1, PPC_OPERAND_GQR
},
479 { "gqr.2", 2, PPC_OPERAND_GQR
},
480 { "gqr.3", 3, PPC_OPERAND_GQR
},
481 { "gqr.4", 4, PPC_OPERAND_GQR
},
482 { "gqr.5", 5, PPC_OPERAND_GQR
},
483 { "gqr.6", 6, PPC_OPERAND_GQR
},
484 { "gqr.7", 7, PPC_OPERAND_GQR
},
485 { "gqr0", 0, PPC_OPERAND_GQR
},
486 { "gqr1", 1, PPC_OPERAND_GQR
},
487 { "gqr2", 2, PPC_OPERAND_GQR
},
488 { "gqr3", 3, PPC_OPERAND_GQR
},
489 { "gqr4", 4, PPC_OPERAND_GQR
},
490 { "gqr5", 5, PPC_OPERAND_GQR
},
491 { "gqr6", 6, PPC_OPERAND_GQR
},
492 { "gqr7", 7, PPC_OPERAND_GQR
},
494 { "lr", 8, PPC_OPERAND_SPR
},
496 /* General Purpose Registers */
497 { "r.0", 0, PPC_OPERAND_GPR
},
498 { "r.1", 1, PPC_OPERAND_GPR
},
499 { "r.10", 10, PPC_OPERAND_GPR
},
500 { "r.11", 11, PPC_OPERAND_GPR
},
501 { "r.12", 12, PPC_OPERAND_GPR
},
502 { "r.13", 13, PPC_OPERAND_GPR
},
503 { "r.14", 14, PPC_OPERAND_GPR
},
504 { "r.15", 15, PPC_OPERAND_GPR
},
505 { "r.16", 16, PPC_OPERAND_GPR
},
506 { "r.17", 17, PPC_OPERAND_GPR
},
507 { "r.18", 18, PPC_OPERAND_GPR
},
508 { "r.19", 19, PPC_OPERAND_GPR
},
509 { "r.2", 2, PPC_OPERAND_GPR
},
510 { "r.20", 20, PPC_OPERAND_GPR
},
511 { "r.21", 21, PPC_OPERAND_GPR
},
512 { "r.22", 22, PPC_OPERAND_GPR
},
513 { "r.23", 23, PPC_OPERAND_GPR
},
514 { "r.24", 24, PPC_OPERAND_GPR
},
515 { "r.25", 25, PPC_OPERAND_GPR
},
516 { "r.26", 26, PPC_OPERAND_GPR
},
517 { "r.27", 27, PPC_OPERAND_GPR
},
518 { "r.28", 28, PPC_OPERAND_GPR
},
519 { "r.29", 29, PPC_OPERAND_GPR
},
520 { "r.3", 3, PPC_OPERAND_GPR
},
521 { "r.30", 30, PPC_OPERAND_GPR
},
522 { "r.31", 31, PPC_OPERAND_GPR
},
523 { "r.4", 4, PPC_OPERAND_GPR
},
524 { "r.5", 5, PPC_OPERAND_GPR
},
525 { "r.6", 6, PPC_OPERAND_GPR
},
526 { "r.7", 7, PPC_OPERAND_GPR
},
527 { "r.8", 8, PPC_OPERAND_GPR
},
528 { "r.9", 9, PPC_OPERAND_GPR
},
530 { "r.sp", 1, PPC_OPERAND_GPR
},
532 { "r.toc", 2, PPC_OPERAND_GPR
},
534 { "r0", 0, PPC_OPERAND_GPR
},
535 { "r1", 1, PPC_OPERAND_GPR
},
536 { "r10", 10, PPC_OPERAND_GPR
},
537 { "r11", 11, PPC_OPERAND_GPR
},
538 { "r12", 12, PPC_OPERAND_GPR
},
539 { "r13", 13, PPC_OPERAND_GPR
},
540 { "r14", 14, PPC_OPERAND_GPR
},
541 { "r15", 15, PPC_OPERAND_GPR
},
542 { "r16", 16, PPC_OPERAND_GPR
},
543 { "r17", 17, PPC_OPERAND_GPR
},
544 { "r18", 18, PPC_OPERAND_GPR
},
545 { "r19", 19, PPC_OPERAND_GPR
},
546 { "r2", 2, PPC_OPERAND_GPR
},
547 { "r20", 20, PPC_OPERAND_GPR
},
548 { "r21", 21, PPC_OPERAND_GPR
},
549 { "r22", 22, PPC_OPERAND_GPR
},
550 { "r23", 23, PPC_OPERAND_GPR
},
551 { "r24", 24, PPC_OPERAND_GPR
},
552 { "r25", 25, PPC_OPERAND_GPR
},
553 { "r26", 26, PPC_OPERAND_GPR
},
554 { "r27", 27, PPC_OPERAND_GPR
},
555 { "r28", 28, PPC_OPERAND_GPR
},
556 { "r29", 29, PPC_OPERAND_GPR
},
557 { "r3", 3, PPC_OPERAND_GPR
},
558 { "r30", 30, PPC_OPERAND_GPR
},
559 { "r31", 31, PPC_OPERAND_GPR
},
560 { "r4", 4, PPC_OPERAND_GPR
},
561 { "r5", 5, PPC_OPERAND_GPR
},
562 { "r6", 6, PPC_OPERAND_GPR
},
563 { "r7", 7, PPC_OPERAND_GPR
},
564 { "r8", 8, PPC_OPERAND_GPR
},
565 { "r9", 9, PPC_OPERAND_GPR
},
567 { "rtoc", 2, PPC_OPERAND_GPR
},
569 { "sdr1", 25, PPC_OPERAND_SPR
},
571 { "sp", 1, PPC_OPERAND_GPR
},
573 { "srr0", 26, PPC_OPERAND_SPR
},
574 { "srr1", 27, PPC_OPERAND_SPR
},
576 /* Vector (Altivec/VMX) registers */
577 { "v.0", 0, PPC_OPERAND_VR
},
578 { "v.1", 1, PPC_OPERAND_VR
},
579 { "v.10", 10, PPC_OPERAND_VR
},
580 { "v.11", 11, PPC_OPERAND_VR
},
581 { "v.12", 12, PPC_OPERAND_VR
},
582 { "v.13", 13, PPC_OPERAND_VR
},
583 { "v.14", 14, PPC_OPERAND_VR
},
584 { "v.15", 15, PPC_OPERAND_VR
},
585 { "v.16", 16, PPC_OPERAND_VR
},
586 { "v.17", 17, PPC_OPERAND_VR
},
587 { "v.18", 18, PPC_OPERAND_VR
},
588 { "v.19", 19, PPC_OPERAND_VR
},
589 { "v.2", 2, PPC_OPERAND_VR
},
590 { "v.20", 20, PPC_OPERAND_VR
},
591 { "v.21", 21, PPC_OPERAND_VR
},
592 { "v.22", 22, PPC_OPERAND_VR
},
593 { "v.23", 23, PPC_OPERAND_VR
},
594 { "v.24", 24, PPC_OPERAND_VR
},
595 { "v.25", 25, PPC_OPERAND_VR
},
596 { "v.26", 26, PPC_OPERAND_VR
},
597 { "v.27", 27, PPC_OPERAND_VR
},
598 { "v.28", 28, PPC_OPERAND_VR
},
599 { "v.29", 29, PPC_OPERAND_VR
},
600 { "v.3", 3, PPC_OPERAND_VR
},
601 { "v.30", 30, PPC_OPERAND_VR
},
602 { "v.31", 31, PPC_OPERAND_VR
},
603 { "v.4", 4, PPC_OPERAND_VR
},
604 { "v.5", 5, PPC_OPERAND_VR
},
605 { "v.6", 6, PPC_OPERAND_VR
},
606 { "v.7", 7, PPC_OPERAND_VR
},
607 { "v.8", 8, PPC_OPERAND_VR
},
608 { "v.9", 9, PPC_OPERAND_VR
},
610 { "v0", 0, PPC_OPERAND_VR
},
611 { "v1", 1, PPC_OPERAND_VR
},
612 { "v10", 10, PPC_OPERAND_VR
},
613 { "v11", 11, PPC_OPERAND_VR
},
614 { "v12", 12, PPC_OPERAND_VR
},
615 { "v13", 13, PPC_OPERAND_VR
},
616 { "v14", 14, PPC_OPERAND_VR
},
617 { "v15", 15, PPC_OPERAND_VR
},
618 { "v16", 16, PPC_OPERAND_VR
},
619 { "v17", 17, PPC_OPERAND_VR
},
620 { "v18", 18, PPC_OPERAND_VR
},
621 { "v19", 19, PPC_OPERAND_VR
},
622 { "v2", 2, PPC_OPERAND_VR
},
623 { "v20", 20, PPC_OPERAND_VR
},
624 { "v21", 21, PPC_OPERAND_VR
},
625 { "v22", 22, PPC_OPERAND_VR
},
626 { "v23", 23, PPC_OPERAND_VR
},
627 { "v24", 24, PPC_OPERAND_VR
},
628 { "v25", 25, PPC_OPERAND_VR
},
629 { "v26", 26, PPC_OPERAND_VR
},
630 { "v27", 27, PPC_OPERAND_VR
},
631 { "v28", 28, PPC_OPERAND_VR
},
632 { "v29", 29, PPC_OPERAND_VR
},
633 { "v3", 3, PPC_OPERAND_VR
},
634 { "v30", 30, PPC_OPERAND_VR
},
635 { "v31", 31, PPC_OPERAND_VR
},
636 { "v4", 4, PPC_OPERAND_VR
},
637 { "v5", 5, PPC_OPERAND_VR
},
638 { "v6", 6, PPC_OPERAND_VR
},
639 { "v7", 7, PPC_OPERAND_VR
},
640 { "v8", 8, PPC_OPERAND_VR
},
641 { "v9", 9, PPC_OPERAND_VR
},
643 /* Vector Scalar (VSX) registers (ISA 2.06). */
644 { "vs.0", 0, PPC_OPERAND_VSR
},
645 { "vs.1", 1, PPC_OPERAND_VSR
},
646 { "vs.10", 10, PPC_OPERAND_VSR
},
647 { "vs.11", 11, PPC_OPERAND_VSR
},
648 { "vs.12", 12, PPC_OPERAND_VSR
},
649 { "vs.13", 13, PPC_OPERAND_VSR
},
650 { "vs.14", 14, PPC_OPERAND_VSR
},
651 { "vs.15", 15, PPC_OPERAND_VSR
},
652 { "vs.16", 16, PPC_OPERAND_VSR
},
653 { "vs.17", 17, PPC_OPERAND_VSR
},
654 { "vs.18", 18, PPC_OPERAND_VSR
},
655 { "vs.19", 19, PPC_OPERAND_VSR
},
656 { "vs.2", 2, PPC_OPERAND_VSR
},
657 { "vs.20", 20, PPC_OPERAND_VSR
},
658 { "vs.21", 21, PPC_OPERAND_VSR
},
659 { "vs.22", 22, PPC_OPERAND_VSR
},
660 { "vs.23", 23, PPC_OPERAND_VSR
},
661 { "vs.24", 24, PPC_OPERAND_VSR
},
662 { "vs.25", 25, PPC_OPERAND_VSR
},
663 { "vs.26", 26, PPC_OPERAND_VSR
},
664 { "vs.27", 27, PPC_OPERAND_VSR
},
665 { "vs.28", 28, PPC_OPERAND_VSR
},
666 { "vs.29", 29, PPC_OPERAND_VSR
},
667 { "vs.3", 3, PPC_OPERAND_VSR
},
668 { "vs.30", 30, PPC_OPERAND_VSR
},
669 { "vs.31", 31, PPC_OPERAND_VSR
},
670 { "vs.32", 32, PPC_OPERAND_VSR
},
671 { "vs.33", 33, PPC_OPERAND_VSR
},
672 { "vs.34", 34, PPC_OPERAND_VSR
},
673 { "vs.35", 35, PPC_OPERAND_VSR
},
674 { "vs.36", 36, PPC_OPERAND_VSR
},
675 { "vs.37", 37, PPC_OPERAND_VSR
},
676 { "vs.38", 38, PPC_OPERAND_VSR
},
677 { "vs.39", 39, PPC_OPERAND_VSR
},
678 { "vs.4", 4, PPC_OPERAND_VSR
},
679 { "vs.40", 40, PPC_OPERAND_VSR
},
680 { "vs.41", 41, PPC_OPERAND_VSR
},
681 { "vs.42", 42, PPC_OPERAND_VSR
},
682 { "vs.43", 43, PPC_OPERAND_VSR
},
683 { "vs.44", 44, PPC_OPERAND_VSR
},
684 { "vs.45", 45, PPC_OPERAND_VSR
},
685 { "vs.46", 46, PPC_OPERAND_VSR
},
686 { "vs.47", 47, PPC_OPERAND_VSR
},
687 { "vs.48", 48, PPC_OPERAND_VSR
},
688 { "vs.49", 49, PPC_OPERAND_VSR
},
689 { "vs.5", 5, PPC_OPERAND_VSR
},
690 { "vs.50", 50, PPC_OPERAND_VSR
},
691 { "vs.51", 51, PPC_OPERAND_VSR
},
692 { "vs.52", 52, PPC_OPERAND_VSR
},
693 { "vs.53", 53, PPC_OPERAND_VSR
},
694 { "vs.54", 54, PPC_OPERAND_VSR
},
695 { "vs.55", 55, PPC_OPERAND_VSR
},
696 { "vs.56", 56, PPC_OPERAND_VSR
},
697 { "vs.57", 57, PPC_OPERAND_VSR
},
698 { "vs.58", 58, PPC_OPERAND_VSR
},
699 { "vs.59", 59, PPC_OPERAND_VSR
},
700 { "vs.6", 6, PPC_OPERAND_VSR
},
701 { "vs.60", 60, PPC_OPERAND_VSR
},
702 { "vs.61", 61, PPC_OPERAND_VSR
},
703 { "vs.62", 62, PPC_OPERAND_VSR
},
704 { "vs.63", 63, PPC_OPERAND_VSR
},
705 { "vs.7", 7, PPC_OPERAND_VSR
},
706 { "vs.8", 8, PPC_OPERAND_VSR
},
707 { "vs.9", 9, PPC_OPERAND_VSR
},
709 { "vs0", 0, PPC_OPERAND_VSR
},
710 { "vs1", 1, PPC_OPERAND_VSR
},
711 { "vs10", 10, PPC_OPERAND_VSR
},
712 { "vs11", 11, PPC_OPERAND_VSR
},
713 { "vs12", 12, PPC_OPERAND_VSR
},
714 { "vs13", 13, PPC_OPERAND_VSR
},
715 { "vs14", 14, PPC_OPERAND_VSR
},
716 { "vs15", 15, PPC_OPERAND_VSR
},
717 { "vs16", 16, PPC_OPERAND_VSR
},
718 { "vs17", 17, PPC_OPERAND_VSR
},
719 { "vs18", 18, PPC_OPERAND_VSR
},
720 { "vs19", 19, PPC_OPERAND_VSR
},
721 { "vs2", 2, PPC_OPERAND_VSR
},
722 { "vs20", 20, PPC_OPERAND_VSR
},
723 { "vs21", 21, PPC_OPERAND_VSR
},
724 { "vs22", 22, PPC_OPERAND_VSR
},
725 { "vs23", 23, PPC_OPERAND_VSR
},
726 { "vs24", 24, PPC_OPERAND_VSR
},
727 { "vs25", 25, PPC_OPERAND_VSR
},
728 { "vs26", 26, PPC_OPERAND_VSR
},
729 { "vs27", 27, PPC_OPERAND_VSR
},
730 { "vs28", 28, PPC_OPERAND_VSR
},
731 { "vs29", 29, PPC_OPERAND_VSR
},
732 { "vs3", 3, PPC_OPERAND_VSR
},
733 { "vs30", 30, PPC_OPERAND_VSR
},
734 { "vs31", 31, PPC_OPERAND_VSR
},
735 { "vs32", 32, PPC_OPERAND_VSR
},
736 { "vs33", 33, PPC_OPERAND_VSR
},
737 { "vs34", 34, PPC_OPERAND_VSR
},
738 { "vs35", 35, PPC_OPERAND_VSR
},
739 { "vs36", 36, PPC_OPERAND_VSR
},
740 { "vs37", 37, PPC_OPERAND_VSR
},
741 { "vs38", 38, PPC_OPERAND_VSR
},
742 { "vs39", 39, PPC_OPERAND_VSR
},
743 { "vs4", 4, PPC_OPERAND_VSR
},
744 { "vs40", 40, PPC_OPERAND_VSR
},
745 { "vs41", 41, PPC_OPERAND_VSR
},
746 { "vs42", 42, PPC_OPERAND_VSR
},
747 { "vs43", 43, PPC_OPERAND_VSR
},
748 { "vs44", 44, PPC_OPERAND_VSR
},
749 { "vs45", 45, PPC_OPERAND_VSR
},
750 { "vs46", 46, PPC_OPERAND_VSR
},
751 { "vs47", 47, PPC_OPERAND_VSR
},
752 { "vs48", 48, PPC_OPERAND_VSR
},
753 { "vs49", 49, PPC_OPERAND_VSR
},
754 { "vs5", 5, PPC_OPERAND_VSR
},
755 { "vs50", 50, PPC_OPERAND_VSR
},
756 { "vs51", 51, PPC_OPERAND_VSR
},
757 { "vs52", 52, PPC_OPERAND_VSR
},
758 { "vs53", 53, PPC_OPERAND_VSR
},
759 { "vs54", 54, PPC_OPERAND_VSR
},
760 { "vs55", 55, PPC_OPERAND_VSR
},
761 { "vs56", 56, PPC_OPERAND_VSR
},
762 { "vs57", 57, PPC_OPERAND_VSR
},
763 { "vs58", 58, PPC_OPERAND_VSR
},
764 { "vs59", 59, PPC_OPERAND_VSR
},
765 { "vs6", 6, PPC_OPERAND_VSR
},
766 { "vs60", 60, PPC_OPERAND_VSR
},
767 { "vs61", 61, PPC_OPERAND_VSR
},
768 { "vs62", 62, PPC_OPERAND_VSR
},
769 { "vs63", 63, PPC_OPERAND_VSR
},
770 { "vs7", 7, PPC_OPERAND_VSR
},
771 { "vs8", 8, PPC_OPERAND_VSR
},
772 { "vs9", 9, PPC_OPERAND_VSR
},
774 { "xer", 1, PPC_OPERAND_SPR
}
777 #define REG_NAME_CNT (sizeof (pre_defined_registers) / sizeof (struct pd_reg))
779 /* Given NAME, find the register number associated with that name, return
780 the integer value associated with the given name or -1 on failure. */
782 static const struct pd_reg
*
783 reg_name_search (const struct pd_reg
*regs
, int regcount
, const char *name
)
785 int middle
, low
, high
;
793 middle
= (low
+ high
) / 2;
794 cmp
= strcasecmp (name
, regs
[middle
].name
);
800 return ®s
[middle
];
808 * Summary of register_name.
810 * in: Input_line_pointer points to 1st char of operand.
812 * out: A expressionS.
813 * The operand may have been a register: in this case, X_op == O_register,
814 * X_add_number is set to the register number, and truth is returned.
815 * Input_line_pointer->(next non-blank) char after operand, or is in its
820 register_name (expressionS
*expressionP
)
822 const struct pd_reg
*reg
;
827 /* Find the spelling of the operand. */
828 start
= name
= input_line_pointer
;
829 if (name
[0] == '%' && ISALPHA (name
[1]))
830 name
= ++input_line_pointer
;
832 else if (!reg_names_p
|| !ISALPHA (name
[0]))
835 c
= get_symbol_name (&name
);
836 reg
= reg_name_search (pre_defined_registers
, REG_NAME_CNT
, name
);
838 /* Put back the delimiting char. */
839 *input_line_pointer
= c
;
841 /* Look to see if it's in the register table. */
844 expressionP
->X_op
= O_register
;
845 expressionP
->X_add_number
= reg
->value
;
846 expressionP
->X_md
= reg
->flags
;
848 /* Make the rest nice. */
849 expressionP
->X_add_symbol
= NULL
;
850 expressionP
->X_op_symbol
= NULL
;
854 /* Reset the line as if we had not done anything. */
855 input_line_pointer
= start
;
859 /* This function is called for each symbol seen in an expression. It
860 handles the special parsing which PowerPC assemblers are supposed
861 to use for condition codes. */
863 /* Whether to do the special parsing. */
864 static bfd_boolean cr_operand
;
866 /* Names to recognize in a condition code. This table is sorted. */
867 static const struct pd_reg cr_names
[] =
869 { "cr0", 0, PPC_OPERAND_CR_REG
},
870 { "cr1", 1, PPC_OPERAND_CR_REG
},
871 { "cr2", 2, PPC_OPERAND_CR_REG
},
872 { "cr3", 3, PPC_OPERAND_CR_REG
},
873 { "cr4", 4, PPC_OPERAND_CR_REG
},
874 { "cr5", 5, PPC_OPERAND_CR_REG
},
875 { "cr6", 6, PPC_OPERAND_CR_REG
},
876 { "cr7", 7, PPC_OPERAND_CR_REG
},
877 { "eq", 2, PPC_OPERAND_CR_BIT
},
878 { "gt", 1, PPC_OPERAND_CR_BIT
},
879 { "lt", 0, PPC_OPERAND_CR_BIT
},
880 { "so", 3, PPC_OPERAND_CR_BIT
},
881 { "un", 3, PPC_OPERAND_CR_BIT
}
884 /* Parsing function. This returns non-zero if it recognized an
888 ppc_parse_name (const char *name
, expressionS
*exp
)
890 const struct pd_reg
*reg
;
897 reg
= reg_name_search (cr_names
, sizeof cr_names
/ sizeof cr_names
[0],
902 exp
->X_op
= O_register
;
903 exp
->X_add_number
= reg
->value
;
904 exp
->X_md
= reg
->flags
;
909 /* Propagate X_md and check register expressions. This is to support
910 condition codes like 4*cr5+eq. */
913 ppc_optimize_expr (expressionS
*left
, operatorT op
, expressionS
*right
)
915 /* Accept 4*cr<n> and cr<n>*4. */
917 && ((right
->X_op
== O_register
918 && right
->X_md
== PPC_OPERAND_CR_REG
919 && left
->X_op
== O_constant
920 && left
->X_add_number
== 4)
921 || (left
->X_op
== O_register
922 && left
->X_md
== PPC_OPERAND_CR_REG
923 && right
->X_op
== O_constant
924 && right
->X_add_number
== 4)))
926 left
->X_op
= O_register
;
927 left
->X_md
= PPC_OPERAND_CR_REG
| PPC_OPERAND_CR_BIT
;
928 left
->X_add_number
*= right
->X_add_number
;
932 /* Accept the above plus <cr bit>, and <cr bit> plus the above. */
933 if (right
->X_op
== O_register
934 && left
->X_op
== O_register
936 && ((right
->X_md
== PPC_OPERAND_CR_BIT
937 && left
->X_md
== (PPC_OPERAND_CR_REG
| PPC_OPERAND_CR_BIT
))
938 || (right
->X_md
== (PPC_OPERAND_CR_REG
| PPC_OPERAND_CR_BIT
)
939 && left
->X_md
== PPC_OPERAND_CR_BIT
)))
941 left
->X_md
= PPC_OPERAND_CR_BIT
;
942 right
->X_op
= O_constant
;
946 /* Accept reg +/- constant. */
947 if (left
->X_op
== O_register
948 && !((op
== O_add
|| op
== O_subtract
) && right
->X_op
== O_constant
))
949 as_warn (_("invalid register expression"));
951 /* Accept constant + reg. */
952 if (right
->X_op
== O_register
)
954 if (op
== O_add
&& left
->X_op
== O_constant
)
955 left
->X_md
= right
->X_md
;
957 as_warn (_("invalid register expression"));
963 /* Local variables. */
965 /* Whether to target xcoff64/elf64. */
966 static unsigned int ppc_obj64
= BFD_DEFAULT_TARGET_SIZE
== 64;
968 /* Opcode hash table. */
969 static htab_t ppc_hash
;
971 /* Macro hash table. */
972 static htab_t ppc_macro_hash
;
975 /* What type of shared library support to use. */
976 static enum { SHLIB_NONE
, SHLIB_PIC
, SHLIB_MRELOCATABLE
} shlib
= SHLIB_NONE
;
978 /* Flags to set in the elf header. */
979 static flagword ppc_flags
= 0;
981 /* Whether this is Solaris or not. */
982 #ifdef TARGET_SOLARIS_COMMENT
983 #define SOLARIS_P TRUE
985 #define SOLARIS_P FALSE
988 static bfd_boolean msolaris
= SOLARIS_P
;
993 /* The RS/6000 assembler uses the .csect pseudo-op to generate code
994 using a bunch of different sections. These assembler sections,
995 however, are all encompassed within the .text or .data sections of
996 the final output file. We handle this by using different
997 subsegments within these main segments. */
999 /* Next subsegment to allocate within the .text segment. */
1000 static subsegT ppc_text_subsegment
= 2;
1002 /* Linked list of csects in the text section. */
1003 static symbolS
*ppc_text_csects
;
1005 /* Next subsegment to allocate within the .data segment. */
1006 static subsegT ppc_data_subsegment
= 2;
1008 /* Linked list of csects in the data section. */
1009 static symbolS
*ppc_data_csects
;
1011 /* The current csect. */
1012 static symbolS
*ppc_current_csect
;
1014 /* The RS/6000 assembler uses a TOC which holds addresses of functions
1015 and variables. Symbols are put in the TOC with the .tc pseudo-op.
1016 A special relocation is used when accessing TOC entries. We handle
1017 the TOC as a subsegment within the .data segment. We set it up if
1018 we see a .toc pseudo-op, and save the csect symbol here. */
1019 static symbolS
*ppc_toc_csect
;
1021 /* The first frag in the TOC subsegment. */
1022 static fragS
*ppc_toc_frag
;
1024 /* The first frag in the first subsegment after the TOC in the .data
1025 segment. NULL if there are no subsegments after the TOC. */
1026 static fragS
*ppc_after_toc_frag
;
1028 /* The current static block. */
1029 static symbolS
*ppc_current_block
;
1031 /* The COFF debugging section; set by md_begin. This is not the
1032 .debug section, but is instead the secret BFD section which will
1033 cause BFD to set the section number of a symbol to N_DEBUG. */
1034 static asection
*ppc_coff_debug_section
;
1036 /* Structure to set the length field of the dwarf sections. */
1037 struct dw_subsection
{
1038 /* Subsections are simply linked. */
1039 struct dw_subsection
*link
;
1041 /* The subsection number. */
1044 /* Expression to compute the length of the section. */
1045 expressionS end_exp
;
1048 static struct dw_section
{
1049 /* Corresponding section. */
1052 /* Simply linked list of subsections with a label. */
1053 struct dw_subsection
*list_subseg
;
1055 /* The anonymous subsection. */
1056 struct dw_subsection
*anon_subseg
;
1057 } dw_sections
[XCOFF_DWSECT_NBR_NAMES
];
1058 #endif /* OBJ_XCOFF */
1061 symbolS
*GOT_symbol
; /* Pre-defined "_GLOBAL_OFFSET_TABLE" */
1062 unsigned long *ppc_apuinfo_list
;
1063 unsigned int ppc_apuinfo_num
;
1064 unsigned int ppc_apuinfo_num_alloc
;
1065 #endif /* OBJ_ELF */
1068 const char *const md_shortopts
= "b:l:usm:K:VQ:";
1070 const char *const md_shortopts
= "um:";
1072 #define OPTION_NOPS (OPTION_MD_BASE + 0)
1073 const struct option md_longopts
[] = {
1074 {"nops", required_argument
, NULL
, OPTION_NOPS
},
1075 {"ppc476-workaround", no_argument
, &warn_476
, 1},
1076 {"no-ppc476-workaround", no_argument
, &warn_476
, 0},
1077 {NULL
, no_argument
, NULL
, 0}
1079 const size_t md_longopts_size
= sizeof (md_longopts
);
1082 md_parse_option (int c
, const char *arg
)
1089 /* -u means that any undefined symbols should be treated as
1090 external, which is the default for gas anyhow. */
1095 /* Solaris as takes -le (presumably for little endian). For completeness
1096 sake, recognize -be also. */
1097 if (strcmp (arg
, "e") == 0)
1099 target_big_endian
= 0;
1100 set_target_endian
= 1;
1101 if (ppc_cpu
& PPC_OPCODE_VLE
)
1102 as_bad (_("the use of -mvle requires big endian."));
1110 if (strcmp (arg
, "e") == 0)
1112 target_big_endian
= 1;
1113 set_target_endian
= 1;
1121 /* Recognize -K PIC. */
1122 if (strcmp (arg
, "PIC") == 0 || strcmp (arg
, "pic") == 0)
1125 ppc_flags
|= EF_PPC_RELOCATABLE_LIB
;
1133 /* a64 and a32 determine whether to use XCOFF64 or XCOFF32. */
1135 if (strcmp (arg
, "64") == 0)
1139 if (ppc_cpu
& PPC_OPCODE_VLE
)
1140 as_bad (_("the use of -mvle requires -a32."));
1142 as_fatal (_("%s unsupported"), "-a64");
1145 else if (strcmp (arg
, "32") == 0)
1152 new_cpu
= ppc_parse_cpu (ppc_cpu
, &sticky
, arg
);
1153 /* "raw" is only valid for the disassembler. */
1154 if (new_cpu
!= 0 && (new_cpu
& PPC_OPCODE_RAW
) == 0)
1157 if (strcmp (arg
, "vle") == 0)
1159 if (set_target_endian
&& target_big_endian
== 0)
1160 as_bad (_("the use of -mvle requires big endian."));
1162 as_bad (_("the use of -mvle requires -a32."));
1166 else if (strcmp (arg
, "no-vle") == 0)
1168 sticky
&= ~PPC_OPCODE_VLE
;
1170 new_cpu
= ppc_parse_cpu (ppc_cpu
, &sticky
, "booke");
1171 new_cpu
&= ~PPC_OPCODE_VLE
;
1176 else if (strcmp (arg
, "regnames") == 0)
1179 else if (strcmp (arg
, "no-regnames") == 0)
1180 reg_names_p
= FALSE
;
1183 /* -mrelocatable/-mrelocatable-lib -- warn about initializations
1184 that require relocation. */
1185 else if (strcmp (arg
, "relocatable") == 0)
1187 shlib
= SHLIB_MRELOCATABLE
;
1188 ppc_flags
|= EF_PPC_RELOCATABLE
;
1191 else if (strcmp (arg
, "relocatable-lib") == 0)
1193 shlib
= SHLIB_MRELOCATABLE
;
1194 ppc_flags
|= EF_PPC_RELOCATABLE_LIB
;
1197 /* -memb, set embedded bit. */
1198 else if (strcmp (arg
, "emb") == 0)
1199 ppc_flags
|= EF_PPC_EMB
;
1201 /* -mlittle/-mbig set the endianness. */
1202 else if (strcmp (arg
, "little") == 0
1203 || strcmp (arg
, "little-endian") == 0)
1205 target_big_endian
= 0;
1206 set_target_endian
= 1;
1207 if (ppc_cpu
& PPC_OPCODE_VLE
)
1208 as_bad (_("the use of -mvle requires big endian."));
1211 else if (strcmp (arg
, "big") == 0 || strcmp (arg
, "big-endian") == 0)
1213 target_big_endian
= 1;
1214 set_target_endian
= 1;
1217 else if (strcmp (arg
, "solaris") == 0)
1220 ppc_comment_chars
= ppc_solaris_comment_chars
;
1223 else if (strcmp (arg
, "no-solaris") == 0)
1226 ppc_comment_chars
= ppc_eabi_comment_chars
;
1228 else if (strcmp (arg
, "spe2") == 0)
1230 ppc_cpu
|= PPC_OPCODE_SPE2
;
1235 as_bad (_("invalid switch -m%s"), arg
);
1241 /* -V: SVR4 argument to print version ID. */
1243 print_version_id ();
1246 /* -Qy, -Qn: SVR4 arguments controlling whether a .comment section
1247 should be emitted or not. FIXME: Not implemented. */
1251 /* Solaris takes -s to specify that .stabs go in a .stabs section,
1252 rather than .stabs.excl, which is ignored by the linker.
1253 FIXME: Not implemented. */
1264 nop_limit
= strtoul (optarg
, &end
, 0);
1266 as_bad (_("--nops needs a numeric argument"));
1281 is_ppc64_target (const bfd_target
*targ
, void *data ATTRIBUTE_UNUSED
)
1283 switch (targ
->flavour
)
1286 case bfd_target_elf_flavour
:
1287 return strncmp (targ
->name
, "elf64-powerpc", 13) == 0;
1290 case bfd_target_xcoff_flavour
:
1291 return (strcmp (targ
->name
, "aixcoff64-rs6000") == 0
1292 || strcmp (targ
->name
, "aix5coff64-rs6000") == 0);
1300 md_show_usage (FILE *stream
)
1302 fprintf (stream
, _("\
1303 PowerPC options:\n"));
1304 fprintf (stream
, _("\
1305 -a32 generate ELF32/XCOFF32\n"));
1306 if (bfd_iterate_over_targets (is_ppc64_target
, NULL
))
1307 fprintf (stream
, _("\
1308 -a64 generate ELF64/XCOFF64\n"));
1309 fprintf (stream
, _("\
1311 fprintf (stream
, _("\
1312 -mpwrx, -mpwr2 generate code for POWER/2 (RIOS2)\n"));
1313 fprintf (stream
, _("\
1314 -mpwr generate code for POWER (RIOS1)\n"));
1315 fprintf (stream
, _("\
1316 -m601 generate code for PowerPC 601\n"));
1317 fprintf (stream
, _("\
1318 -mppc, -mppc32, -m603, -m604\n\
1319 generate code for PowerPC 603/604\n"));
1320 fprintf (stream
, _("\
1321 -m403 generate code for PowerPC 403\n"));
1322 fprintf (stream
, _("\
1323 -m405 generate code for PowerPC 405\n"));
1324 fprintf (stream
, _("\
1325 -m440 generate code for PowerPC 440\n"));
1326 fprintf (stream
, _("\
1327 -m464 generate code for PowerPC 464\n"));
1328 fprintf (stream
, _("\
1329 -m476 generate code for PowerPC 476\n"));
1330 fprintf (stream
, _("\
1331 -m7400, -m7410, -m7450, -m7455\n\
1332 generate code for PowerPC 7400/7410/7450/7455\n"));
1333 fprintf (stream
, _("\
1334 -m750cl, -mgekko, -mbroadway\n\
1335 generate code for PowerPC 750cl/Gekko/Broadway\n"));
1336 fprintf (stream
, _("\
1337 -m821, -m850, -m860 generate code for PowerPC 821/850/860\n"));
1338 fprintf (stream
, _("\
1339 -mppc64, -m620 generate code for PowerPC 620/625/630\n"));
1340 fprintf (stream
, _("\
1341 -mppc64bridge generate code for PowerPC 64, including bridge insns\n"));
1342 fprintf (stream
, _("\
1343 -mbooke generate code for 32-bit PowerPC BookE\n"));
1344 fprintf (stream
, _("\
1345 -ma2 generate code for A2 architecture\n"));
1346 fprintf (stream
, _("\
1347 -mpower4, -mpwr4 generate code for Power4 architecture\n"));
1348 fprintf (stream
, _("\
1349 -mpower5, -mpwr5, -mpwr5x\n\
1350 generate code for Power5 architecture\n"));
1351 fprintf (stream
, _("\
1352 -mpower6, -mpwr6 generate code for Power6 architecture\n"));
1353 fprintf (stream
, _("\
1354 -mpower7, -mpwr7 generate code for Power7 architecture\n"));
1355 fprintf (stream
, _("\
1356 -mpower8, -mpwr8 generate code for Power8 architecture\n"));
1357 fprintf (stream
, _("\
1358 -mpower9, -mpwr9 generate code for Power9 architecture\n"));
1359 fprintf (stream
, _("\
1360 -mpower10, -mpwr10 generate code for Power10 architecture\n"));
1361 fprintf (stream
, _("\
1362 -mcell generate code for Cell Broadband Engine architecture\n"));
1363 fprintf (stream
, _("\
1364 -mcom generate code for Power/PowerPC common instructions\n"));
1365 fprintf (stream
, _("\
1366 -many generate code for any architecture (PWR/PWRX/PPC)\n"));
1367 fprintf (stream
, _("\
1368 -maltivec generate code for AltiVec\n"));
1369 fprintf (stream
, _("\
1370 -mvsx generate code for Vector-Scalar (VSX) instructions\n"));
1371 fprintf (stream
, _("\
1372 -me300 generate code for PowerPC e300 family\n"));
1373 fprintf (stream
, _("\
1374 -me500, -me500x2 generate code for Motorola e500 core complex\n"));
1375 fprintf (stream
, _("\
1376 -me500mc, generate code for Freescale e500mc core complex\n"));
1377 fprintf (stream
, _("\
1378 -me500mc64, generate code for Freescale e500mc64 core complex\n"));
1379 fprintf (stream
, _("\
1380 -me5500, generate code for Freescale e5500 core complex\n"));
1381 fprintf (stream
, _("\
1382 -me6500, generate code for Freescale e6500 core complex\n"));
1383 fprintf (stream
, _("\
1384 -mspe generate code for Motorola SPE instructions\n"));
1385 fprintf (stream
, _("\
1386 -mspe2 generate code for Freescale SPE2 instructions\n"));
1387 fprintf (stream
, _("\
1388 -mvle generate code for Freescale VLE instructions\n"));
1389 fprintf (stream
, _("\
1390 -mtitan generate code for AppliedMicro Titan core complex\n"));
1391 fprintf (stream
, _("\
1392 -mregnames Allow symbolic names for registers\n"));
1393 fprintf (stream
, _("\
1394 -mno-regnames Do not allow symbolic names for registers\n"));
1396 fprintf (stream
, _("\
1397 -mrelocatable support for GCC's -mrelocatble option\n"));
1398 fprintf (stream
, _("\
1399 -mrelocatable-lib support for GCC's -mrelocatble-lib option\n"));
1400 fprintf (stream
, _("\
1401 -memb set PPC_EMB bit in ELF flags\n"));
1402 fprintf (stream
, _("\
1403 -mlittle, -mlittle-endian, -le\n\
1404 generate code for a little endian machine\n"));
1405 fprintf (stream
, _("\
1406 -mbig, -mbig-endian, -be\n\
1407 generate code for a big endian machine\n"));
1408 fprintf (stream
, _("\
1409 -msolaris generate code for Solaris\n"));
1410 fprintf (stream
, _("\
1411 -mno-solaris do not generate code for Solaris\n"));
1412 fprintf (stream
, _("\
1413 -K PIC set EF_PPC_RELOCATABLE_LIB in ELF flags\n"));
1414 fprintf (stream
, _("\
1415 -V print assembler version number\n"));
1416 fprintf (stream
, _("\
1417 -Qy, -Qn ignored\n"));
1419 fprintf (stream
, _("\
1420 -nops=count when aligning, more than COUNT nops uses a branch\n"));
1421 fprintf (stream
, _("\
1422 -ppc476-workaround warn if emitting data to code sections\n"));
1425 /* Set ppc_cpu if it is not already set. */
1430 const char *default_os
= TARGET_OS
;
1431 const char *default_cpu
= TARGET_CPU
;
1433 if ((ppc_cpu
& ~(ppc_cpu_t
) PPC_OPCODE_ANY
) == 0)
1436 if (target_big_endian
)
1437 ppc_cpu
|= PPC_OPCODE_PPC
| PPC_OPCODE_64
;
1439 /* The minimum supported cpu for 64-bit little-endian is power8. */
1440 ppc_cpu
|= ppc_parse_cpu (ppc_cpu
, &sticky
, "power8");
1441 else if (strncmp (default_os
, "aix", 3) == 0
1442 && default_os
[3] >= '4' && default_os
[3] <= '9')
1443 ppc_cpu
|= PPC_OPCODE_COMMON
;
1444 else if (strncmp (default_os
, "aix3", 4) == 0)
1445 ppc_cpu
|= PPC_OPCODE_POWER
;
1446 else if (strcmp (default_cpu
, "rs6000") == 0)
1447 ppc_cpu
|= PPC_OPCODE_POWER
;
1448 else if (strncmp (default_cpu
, "powerpc", 7) == 0)
1449 ppc_cpu
|= PPC_OPCODE_PPC
;
1451 as_fatal (_("unknown default cpu = %s, os = %s"),
1452 default_cpu
, default_os
);
1456 /* Figure out the BFD architecture to use. This function and ppc_mach
1457 are called well before md_begin, when the output file is opened. */
1459 enum bfd_architecture
1462 const char *default_cpu
= TARGET_CPU
;
1465 if ((ppc_cpu
& PPC_OPCODE_PPC
) != 0)
1466 return bfd_arch_powerpc
;
1467 if ((ppc_cpu
& PPC_OPCODE_VLE
) != 0)
1468 return bfd_arch_powerpc
;
1469 if ((ppc_cpu
& PPC_OPCODE_POWER
) != 0)
1470 return bfd_arch_rs6000
;
1471 if ((ppc_cpu
& (PPC_OPCODE_COMMON
| PPC_OPCODE_ANY
)) != 0)
1473 if (strcmp (default_cpu
, "rs6000") == 0)
1474 return bfd_arch_rs6000
;
1475 else if (strncmp (default_cpu
, "powerpc", 7) == 0)
1476 return bfd_arch_powerpc
;
1479 as_fatal (_("neither Power nor PowerPC opcodes were selected."));
1480 return bfd_arch_unknown
;
1487 return bfd_mach_ppc64
;
1488 else if (ppc_arch () == bfd_arch_rs6000
)
1489 return bfd_mach_rs6k
;
1490 else if (ppc_cpu
& PPC_OPCODE_TITAN
)
1491 return bfd_mach_ppc_titan
;
1492 else if (ppc_cpu
& PPC_OPCODE_VLE
)
1493 return bfd_mach_ppc_vle
;
1495 return bfd_mach_ppc
;
1499 ppc_target_format (void)
1503 return "xcoff-powermac";
1506 return (ppc_obj64
? "aix5coff64-rs6000" : "aixcoff-rs6000");
1508 return (ppc_obj64
? "aixcoff64-rs6000" : "aixcoff-rs6000");
1514 return (ppc_obj64
? "elf64-powerpc-freebsd" : "elf32-powerpc-freebsd");
1515 # elif defined (TE_VXWORKS)
1516 return "elf32-powerpc-vxworks";
1518 return (target_big_endian
1519 ? (ppc_obj64
? "elf64-powerpc" : "elf32-powerpc")
1520 : (ppc_obj64
? "elf64-powerpcle" : "elf32-powerpcle"));
1525 /* Validate one entry in powerpc_opcodes[] or vle_opcodes[].
1526 Return TRUE if there's a problem, otherwise FALSE. */
1529 insn_validate (const struct powerpc_opcode
*op
)
1531 const unsigned char *o
;
1532 uint64_t omask
= op
->mask
;
1534 /* The mask had better not trim off opcode bits. */
1535 if ((op
->opcode
& omask
) != op
->opcode
)
1537 as_bad (_("mask trims opcode bits for %s"), op
->name
);
1541 /* The operands must not overlap the opcode or each other. */
1542 for (o
= op
->operands
; *o
; ++o
)
1544 bfd_boolean optional
= FALSE
;
1545 if (*o
>= num_powerpc_operands
)
1547 as_bad (_("operand index error for %s"), op
->name
);
1553 const struct powerpc_operand
*operand
= &powerpc_operands
[*o
];
1554 if (operand
->shift
== (int) PPC_OPSHIFT_INV
)
1561 if ((operand
->flags
& PPC_OPERAND_NEGATIVE
) != 0)
1563 else if ((operand
->flags
& PPC_OPERAND_PLUS1
) != 0)
1565 mask
= (*operand
->insert
) (0, val
, ppc_cpu
, &errmsg
);
1567 else if (operand
->shift
>= 0)
1568 mask
= operand
->bitm
<< operand
->shift
;
1570 mask
= operand
->bitm
>> -operand
->shift
;
1573 as_bad (_("operand %d overlap in %s"),
1574 (int) (o
- op
->operands
), op
->name
);
1578 if ((operand
->flags
& PPC_OPERAND_OPTIONAL
) != 0)
1582 as_bad (_("non-optional operand %d follows optional operand in %s"),
1583 (int) (o
- op
->operands
), op
->name
);
1591 /* Insert opcodes and macros into hash tables. Called at startup and
1592 for .machine pseudo. */
1595 ppc_setup_opcodes (void)
1597 const struct powerpc_opcode
*op
;
1598 const struct powerpc_opcode
*op_end
;
1599 const struct powerpc_macro
*macro
;
1600 const struct powerpc_macro
*macro_end
;
1601 bfd_boolean bad_insn
= FALSE
;
1603 if (ppc_hash
!= NULL
)
1604 htab_delete (ppc_hash
);
1605 if (ppc_macro_hash
!= NULL
)
1606 htab_delete (ppc_macro_hash
);
1608 /* Insert the opcodes into a hash table. */
1609 ppc_hash
= str_htab_create ();
1611 if (ENABLE_CHECKING
)
1615 /* An index into powerpc_operands is stored in struct fix
1616 fx_pcrel_adjust which is 8 bits wide. */
1617 gas_assert (num_powerpc_operands
< 256);
1619 /* Check operand masks. Code here and in the disassembler assumes
1620 all the 1's in the mask are contiguous. */
1621 for (i
= 0; i
< num_powerpc_operands
; ++i
)
1623 uint64_t mask
= powerpc_operands
[i
].bitm
;
1627 right_bit
= mask
& -mask
;
1629 right_bit
= mask
& -mask
;
1630 if (mask
!= right_bit
)
1632 as_bad (_("powerpc_operands[%d].bitm invalid"), i
);
1635 for (j
= i
+ 1; j
< num_powerpc_operands
; ++j
)
1636 if (memcmp (&powerpc_operands
[i
], &powerpc_operands
[j
],
1637 sizeof (powerpc_operands
[0])) == 0)
1639 as_bad (_("powerpc_operands[%d] duplicates powerpc_operands[%d]"),
1646 op_end
= powerpc_opcodes
+ powerpc_num_opcodes
;
1647 for (op
= powerpc_opcodes
; op
< op_end
; op
++)
1649 if (ENABLE_CHECKING
)
1651 unsigned int new_opcode
= PPC_OP (op
[0].opcode
);
1653 #ifdef PRINT_OPCODE_TABLE
1654 printf ("%-14s\t#%04u\tmajor op: 0x%x\top: 0x%llx\tmask: 0x%llx\tflags: 0x%llx\n",
1655 op
->name
, (unsigned int) (op
- powerpc_opcodes
),
1656 new_opcode
, (unsigned long long) op
->opcode
,
1657 (unsigned long long) op
->mask
, (unsigned long long) op
->flags
);
1660 /* The major opcodes had better be sorted. Code in the disassembler
1661 assumes the insns are sorted according to major opcode. */
1662 if (op
!= powerpc_opcodes
1663 && new_opcode
< PPC_OP (op
[-1].opcode
))
1665 as_bad (_("major opcode is not sorted for %s"), op
->name
);
1669 if ((op
->flags
& PPC_OPCODE_VLE
) != 0)
1671 as_bad (_("%s is enabled by vle flag"), op
->name
);
1674 if (PPC_OP (op
->opcode
) != 4
1675 && PPC_OP (op
->opcode
) != 31
1676 && (op
->deprecated
& PPC_OPCODE_VLE
) == 0)
1678 as_bad (_("%s not disabled by vle flag"), op
->name
);
1681 bad_insn
|= insn_validate (op
);
1684 if ((ppc_cpu
& op
->flags
) != 0
1685 && !(ppc_cpu
& op
->deprecated
)
1686 && str_hash_insert (ppc_hash
, op
->name
, op
, 0) != NULL
)
1688 as_bad (_("duplicate %s"), op
->name
);
1693 if ((ppc_cpu
& PPC_OPCODE_ANY
) != 0)
1694 for (op
= powerpc_opcodes
; op
< op_end
; op
++)
1695 str_hash_insert (ppc_hash
, op
->name
, op
, 0);
1697 op_end
= prefix_opcodes
+ prefix_num_opcodes
;
1698 for (op
= prefix_opcodes
; op
< op_end
; op
++)
1700 if (ENABLE_CHECKING
)
1702 unsigned int new_opcode
= PPC_PREFIX_SEG (op
[0].opcode
);
1704 #ifdef PRINT_OPCODE_TABLE
1705 printf ("%-14s\t#%04u\tmajor op/2: 0x%x\top: 0x%llx\tmask: 0x%llx\tflags: 0x%llx\n",
1706 op
->name
, (unsigned int) (op
- prefix_opcodes
),
1707 new_opcode
, (unsigned long long) op
->opcode
,
1708 (unsigned long long) op
->mask
, (unsigned long long) op
->flags
);
1711 /* The major opcodes had better be sorted. Code in the disassembler
1712 assumes the insns are sorted according to major opcode. */
1713 if (op
!= prefix_opcodes
1714 && new_opcode
< PPC_PREFIX_SEG (op
[-1].opcode
))
1716 as_bad (_("major opcode is not sorted for %s"), op
->name
);
1719 bad_insn
|= insn_validate (op
);
1722 if ((ppc_cpu
& op
->flags
) != 0
1723 && !(ppc_cpu
& op
->deprecated
)
1724 && str_hash_insert (ppc_hash
, op
->name
, op
, 0) != NULL
)
1726 as_bad (_("duplicate %s"), op
->name
);
1731 if ((ppc_cpu
& PPC_OPCODE_ANY
) != 0)
1732 for (op
= prefix_opcodes
; op
< op_end
; op
++)
1733 str_hash_insert (ppc_hash
, op
->name
, op
, 0);
1735 op_end
= vle_opcodes
+ vle_num_opcodes
;
1736 for (op
= vle_opcodes
; op
< op_end
; op
++)
1738 if (ENABLE_CHECKING
)
1740 unsigned new_seg
= VLE_OP_TO_SEG (VLE_OP (op
[0].opcode
, op
[0].mask
));
1742 #ifdef PRINT_OPCODE_TABLE
1743 printf ("%-14s\t#%04u\tmajor op: 0x%x\top: 0x%llx\tmask: 0x%llx\tflags: 0x%llx\n",
1744 op
->name
, (unsigned int) (op
- vle_opcodes
),
1745 (unsigned int) new_seg
, (unsigned long long) op
->opcode
,
1746 (unsigned long long) op
->mask
, (unsigned long long) op
->flags
);
1749 /* The major opcodes had better be sorted. Code in the disassembler
1750 assumes the insns are sorted according to major opcode. */
1751 if (op
!= vle_opcodes
1752 && new_seg
< VLE_OP_TO_SEG (VLE_OP (op
[-1].opcode
, op
[-1].mask
)))
1754 as_bad (_("major opcode is not sorted for %s"), op
->name
);
1758 bad_insn
|= insn_validate (op
);
1761 if ((ppc_cpu
& op
->flags
) != 0
1762 && !(ppc_cpu
& op
->deprecated
)
1763 && str_hash_insert (ppc_hash
, op
->name
, op
, 0) != NULL
)
1765 as_bad (_("duplicate %s"), op
->name
);
1770 /* SPE2 instructions */
1771 if ((ppc_cpu
& PPC_OPCODE_SPE2
) == PPC_OPCODE_SPE2
)
1773 op_end
= spe2_opcodes
+ spe2_num_opcodes
;
1774 for (op
= spe2_opcodes
; op
< op_end
; op
++)
1776 if (ENABLE_CHECKING
)
1778 if (op
!= spe2_opcodes
)
1780 unsigned old_seg
, new_seg
;
1782 old_seg
= VLE_OP (op
[-1].opcode
, op
[-1].mask
);
1783 old_seg
= VLE_OP_TO_SEG (old_seg
);
1784 new_seg
= VLE_OP (op
[0].opcode
, op
[0].mask
);
1785 new_seg
= VLE_OP_TO_SEG (new_seg
);
1787 /* The major opcodes had better be sorted. Code in the
1788 disassembler assumes the insns are sorted according to
1790 if (new_seg
< old_seg
)
1792 as_bad (_("major opcode is not sorted for %s"), op
->name
);
1797 bad_insn
|= insn_validate (op
);
1800 if ((ppc_cpu
& op
->flags
) != 0
1801 && !(ppc_cpu
& op
->deprecated
)
1802 && str_hash_insert (ppc_hash
, op
->name
, op
, 0) != NULL
)
1804 as_bad (_("duplicate %s"), op
->name
);
1809 for (op
= spe2_opcodes
; op
< op_end
; op
++)
1810 str_hash_insert (ppc_hash
, op
->name
, op
, 0);
1813 /* Insert the macros into a hash table. */
1814 ppc_macro_hash
= str_htab_create ();
1816 macro_end
= powerpc_macros
+ powerpc_num_macros
;
1817 for (macro
= powerpc_macros
; macro
< macro_end
; macro
++)
1818 if (((macro
->flags
& ppc_cpu
) != 0
1819 || (ppc_cpu
& PPC_OPCODE_ANY
) != 0)
1820 && str_hash_insert (ppc_macro_hash
, macro
->name
, macro
, 0) != NULL
)
1822 as_bad (_("duplicate %s"), macro
->name
);
1830 /* This function is called when the assembler starts up. It is called
1831 after the options have been parsed and the output file has been
1839 ppc_cie_data_alignment
= ppc_obj64
? -8 : -4;
1840 ppc_dwarf2_line_min_insn_length
= (ppc_cpu
& PPC_OPCODE_VLE
) ? 2 : 4;
1843 /* Set the ELF flags if desired. */
1844 if (ppc_flags
&& !msolaris
)
1845 bfd_set_private_flags (stdoutput
, ppc_flags
);
1848 ppc_setup_opcodes ();
1850 /* Tell the main code what the endianness is if it is not overridden
1852 if (!set_target_endian
)
1854 set_target_endian
= 1;
1855 target_big_endian
= PPC_BIG_ENDIAN
;
1859 ppc_coff_debug_section
= coff_section_from_bfd_index (stdoutput
, N_DEBUG
);
1861 /* Create dummy symbols to serve as initial csects. This forces the
1862 text csects to precede the data csects. These symbols will not
1864 ppc_text_csects
= symbol_make ("dummy\001");
1865 symbol_get_tc (ppc_text_csects
)->within
= ppc_text_csects
;
1866 ppc_data_csects
= symbol_make ("dummy\001");
1867 symbol_get_tc (ppc_data_csects
)->within
= ppc_data_csects
;
1875 if (ppc_apuinfo_list
== NULL
)
1878 /* Ok, so write the section info out. We have this layout:
1882 0 8 length of "APUinfo\0"
1883 4 (n*4) number of APU's (4 bytes each)
1886 20 APU#1 first APU's info
1887 24 APU#2 second APU's info
1892 asection
*seg
= now_seg
;
1893 subsegT subseg
= now_subseg
;
1894 asection
*apuinfo_secp
= (asection
*) NULL
;
1897 /* Create the .PPC.EMB.apuinfo section. */
1898 apuinfo_secp
= subseg_new (APUINFO_SECTION_NAME
, 0);
1899 bfd_set_section_flags (apuinfo_secp
, SEC_HAS_CONTENTS
| SEC_READONLY
);
1902 md_number_to_chars (p
, (valueT
) 8, 4);
1905 md_number_to_chars (p
, (valueT
) ppc_apuinfo_num
* 4, 4);
1908 md_number_to_chars (p
, (valueT
) 2, 4);
1911 strcpy (p
, APUINFO_LABEL
);
1913 for (i
= 0; i
< ppc_apuinfo_num
; i
++)
1916 md_number_to_chars (p
, (valueT
) ppc_apuinfo_list
[i
], 4);
1919 frag_align (2, 0, 0);
1921 /* We probably can't restore the current segment, for there likely
1924 subseg_set (seg
, subseg
);
1929 /* Insert an operand value into an instruction. */
1932 ppc_insert_operand (uint64_t insn
,
1933 const struct powerpc_operand
*operand
,
1939 int64_t min
, max
, right
;
1941 max
= operand
->bitm
;
1945 if ((operand
->flags
& PPC_OPERAND_SIGNOPT
) != 0)
1947 /* Extend the allowed range for addis to [-32768, 65535].
1948 Similarly for cmpli and some VLE high part insns. For 64-bit
1949 it would be good to disable this for signed fields since the
1950 value is sign extended into the high 32 bits of the register.
1951 If the value is, say, an address, then we might care about
1952 the high bits. However, gcc as of 2014-06 uses unsigned
1953 values when loading the high part of 64-bit constants using
1955 min
= ~(max
>> 1) & -right
;
1957 else if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
1959 max
= (max
>> 1) & -right
;
1960 min
= ~max
& -right
;
1963 if ((operand
->flags
& PPC_OPERAND_PLUS1
) != 0)
1966 if ((operand
->flags
& PPC_OPERAND_NEGATIVE
) != 0)
1975 /* Some people write constants with the sign extension done by
1976 hand but only up to 32 bits. This shouldn't really be valid,
1977 but, to permit this code to assemble on a 64-bit host, we
1978 sign extend the 32-bit value to 64 bits if so doing makes the
1979 value valid. We only do this for operands that are 32-bits or
1982 && (operand
->bitm
& ~0xffffffffULL
) == 0
1983 && (val
- (1LL << 32)) >= min
1984 && (val
- (1LL << 32)) <= max
1985 && ((val
- (1LL << 32)) & (right
- 1)) == 0)
1986 val
= val
- (1LL << 32);
1988 /* Similarly, people write expressions like ~(1<<15), and expect
1989 this to be OK for a 32-bit unsigned value. */
1991 && (operand
->bitm
& ~0xffffffffULL
) == 0
1992 && (val
+ (1LL << 32)) >= min
1993 && (val
+ (1LL << 32)) <= max
1994 && ((val
+ (1LL << 32)) & (right
- 1)) == 0)
1995 val
= val
+ (1LL << 32);
1999 || (val
& (right
- 1)) != 0)
2000 as_bad_value_out_of_range (_("operand"), val
, min
, max
, file
, line
);
2003 if (operand
->insert
)
2008 insn
= (*operand
->insert
) (insn
, val
, cpu
, &errmsg
);
2009 if (errmsg
!= (const char *) NULL
)
2010 as_bad_where (file
, line
, "%s", errmsg
);
2012 else if (operand
->shift
>= 0)
2013 insn
|= (val
& operand
->bitm
) << operand
->shift
;
2015 insn
|= (val
& operand
->bitm
) >> -operand
->shift
;
2022 /* Parse @got, etc. and return the desired relocation. */
2023 static bfd_reloc_code_real_type
2024 ppc_elf_suffix (char **str_p
, expressionS
*exp_p
)
2028 unsigned int length
: 8;
2029 unsigned int valid32
: 1;
2030 unsigned int valid64
: 1;
2039 const struct map_bfd
*ptr
;
2041 #define MAP(str, reloc) { str, sizeof (str) - 1, 1, 1, reloc }
2042 #define MAP32(str, reloc) { str, sizeof (str) - 1, 1, 0, reloc }
2043 #define MAP64(str, reloc) { str, sizeof (str) - 1, 0, 1, reloc }
2045 static const struct map_bfd mapping
[] = {
2046 MAP ("l", BFD_RELOC_LO16
),
2047 MAP ("h", BFD_RELOC_HI16
),
2048 MAP ("ha", BFD_RELOC_HI16_S
),
2049 MAP ("brtaken", BFD_RELOC_PPC_B16_BRTAKEN
),
2050 MAP ("brntaken", BFD_RELOC_PPC_B16_BRNTAKEN
),
2051 MAP ("got", BFD_RELOC_16_GOTOFF
),
2052 MAP ("got@l", BFD_RELOC_LO16_GOTOFF
),
2053 MAP ("got@h", BFD_RELOC_HI16_GOTOFF
),
2054 MAP ("got@ha", BFD_RELOC_HI16_S_GOTOFF
),
2055 MAP ("plt@l", BFD_RELOC_LO16_PLTOFF
),
2056 MAP ("plt@h", BFD_RELOC_HI16_PLTOFF
),
2057 MAP ("plt@ha", BFD_RELOC_HI16_S_PLTOFF
),
2058 MAP ("copy", BFD_RELOC_PPC_COPY
),
2059 MAP ("globdat", BFD_RELOC_PPC_GLOB_DAT
),
2060 MAP ("sectoff", BFD_RELOC_16_BASEREL
),
2061 MAP ("sectoff@l", BFD_RELOC_LO16_BASEREL
),
2062 MAP ("sectoff@h", BFD_RELOC_HI16_BASEREL
),
2063 MAP ("sectoff@ha", BFD_RELOC_HI16_S_BASEREL
),
2064 MAP ("tls", BFD_RELOC_PPC_TLS
),
2065 MAP ("dtpmod", BFD_RELOC_PPC_DTPMOD
),
2066 MAP ("dtprel", BFD_RELOC_PPC_DTPREL
),
2067 MAP ("dtprel@l", BFD_RELOC_PPC_DTPREL16_LO
),
2068 MAP ("dtprel@h", BFD_RELOC_PPC_DTPREL16_HI
),
2069 MAP ("dtprel@ha", BFD_RELOC_PPC_DTPREL16_HA
),
2070 MAP ("tprel", BFD_RELOC_PPC_TPREL
),
2071 MAP ("tprel@l", BFD_RELOC_PPC_TPREL16_LO
),
2072 MAP ("tprel@h", BFD_RELOC_PPC_TPREL16_HI
),
2073 MAP ("tprel@ha", BFD_RELOC_PPC_TPREL16_HA
),
2074 MAP ("got@tlsgd", BFD_RELOC_PPC_GOT_TLSGD16
),
2075 MAP ("got@tlsgd@l", BFD_RELOC_PPC_GOT_TLSGD16_LO
),
2076 MAP ("got@tlsgd@h", BFD_RELOC_PPC_GOT_TLSGD16_HI
),
2077 MAP ("got@tlsgd@ha", BFD_RELOC_PPC_GOT_TLSGD16_HA
),
2078 MAP ("got@tlsld", BFD_RELOC_PPC_GOT_TLSLD16
),
2079 MAP ("got@tlsld@l", BFD_RELOC_PPC_GOT_TLSLD16_LO
),
2080 MAP ("got@tlsld@h", BFD_RELOC_PPC_GOT_TLSLD16_HI
),
2081 MAP ("got@tlsld@ha", BFD_RELOC_PPC_GOT_TLSLD16_HA
),
2082 MAP ("got@dtprel", BFD_RELOC_PPC_GOT_DTPREL16
),
2083 MAP ("got@dtprel@l", BFD_RELOC_PPC_GOT_DTPREL16_LO
),
2084 MAP ("got@dtprel@h", BFD_RELOC_PPC_GOT_DTPREL16_HI
),
2085 MAP ("got@dtprel@ha", BFD_RELOC_PPC_GOT_DTPREL16_HA
),
2086 MAP ("got@tprel", BFD_RELOC_PPC_GOT_TPREL16
),
2087 MAP ("got@tprel@l", BFD_RELOC_PPC_GOT_TPREL16_LO
),
2088 MAP ("got@tprel@h", BFD_RELOC_PPC_GOT_TPREL16_HI
),
2089 MAP ("got@tprel@ha", BFD_RELOC_PPC_GOT_TPREL16_HA
),
2090 MAP32 ("fixup", BFD_RELOC_CTOR
),
2091 MAP32 ("plt", BFD_RELOC_24_PLT_PCREL
),
2092 MAP32 ("pltrel24", BFD_RELOC_24_PLT_PCREL
),
2093 MAP32 ("local24pc", BFD_RELOC_PPC_LOCAL24PC
),
2094 MAP32 ("local", BFD_RELOC_PPC_LOCAL24PC
),
2095 MAP32 ("pltrel", BFD_RELOC_32_PLT_PCREL
),
2096 MAP32 ("sdarel", BFD_RELOC_GPREL16
),
2097 MAP32 ("sdarel@l", BFD_RELOC_PPC_VLE_SDAREL_LO16A
),
2098 MAP32 ("sdarel@h", BFD_RELOC_PPC_VLE_SDAREL_HI16A
),
2099 MAP32 ("sdarel@ha", BFD_RELOC_PPC_VLE_SDAREL_HA16A
),
2100 MAP32 ("naddr", BFD_RELOC_PPC_EMB_NADDR32
),
2101 MAP32 ("naddr16", BFD_RELOC_PPC_EMB_NADDR16
),
2102 MAP32 ("naddr@l", BFD_RELOC_PPC_EMB_NADDR16_LO
),
2103 MAP32 ("naddr@h", BFD_RELOC_PPC_EMB_NADDR16_HI
),
2104 MAP32 ("naddr@ha", BFD_RELOC_PPC_EMB_NADDR16_HA
),
2105 MAP32 ("sdai16", BFD_RELOC_PPC_EMB_SDAI16
),
2106 MAP32 ("sda2rel", BFD_RELOC_PPC_EMB_SDA2REL
),
2107 MAP32 ("sda2i16", BFD_RELOC_PPC_EMB_SDA2I16
),
2108 MAP32 ("sda21", BFD_RELOC_PPC_EMB_SDA21
),
2109 MAP32 ("sda21@l", BFD_RELOC_PPC_VLE_SDA21_LO
),
2110 MAP32 ("mrkref", BFD_RELOC_PPC_EMB_MRKREF
),
2111 MAP32 ("relsect", BFD_RELOC_PPC_EMB_RELSEC16
),
2112 MAP32 ("relsect@l", BFD_RELOC_PPC_EMB_RELST_LO
),
2113 MAP32 ("relsect@h", BFD_RELOC_PPC_EMB_RELST_HI
),
2114 MAP32 ("relsect@ha", BFD_RELOC_PPC_EMB_RELST_HA
),
2115 MAP32 ("bitfld", BFD_RELOC_PPC_EMB_BIT_FLD
),
2116 MAP32 ("relsda", BFD_RELOC_PPC_EMB_RELSDA
),
2117 MAP32 ("xgot", BFD_RELOC_PPC_TOC16
),
2118 MAP64 ("high", BFD_RELOC_PPC64_ADDR16_HIGH
),
2119 MAP64 ("higha", BFD_RELOC_PPC64_ADDR16_HIGHA
),
2120 MAP64 ("higher", BFD_RELOC_PPC64_HIGHER
),
2121 MAP64 ("highera", BFD_RELOC_PPC64_HIGHER_S
),
2122 MAP64 ("highest", BFD_RELOC_PPC64_HIGHEST
),
2123 MAP64 ("highesta", BFD_RELOC_PPC64_HIGHEST_S
),
2124 MAP64 ("tocbase", BFD_RELOC_PPC64_TOC
),
2125 MAP64 ("toc", BFD_RELOC_PPC_TOC16
),
2126 MAP64 ("toc@l", BFD_RELOC_PPC64_TOC16_LO
),
2127 MAP64 ("toc@h", BFD_RELOC_PPC64_TOC16_HI
),
2128 MAP64 ("toc@ha", BFD_RELOC_PPC64_TOC16_HA
),
2129 MAP64 ("dtprel@high", BFD_RELOC_PPC64_DTPREL16_HIGH
),
2130 MAP64 ("dtprel@higha", BFD_RELOC_PPC64_DTPREL16_HIGHA
),
2131 MAP64 ("dtprel@higher", BFD_RELOC_PPC64_DTPREL16_HIGHER
),
2132 MAP64 ("dtprel@highera", BFD_RELOC_PPC64_DTPREL16_HIGHERA
),
2133 MAP64 ("dtprel@highest", BFD_RELOC_PPC64_DTPREL16_HIGHEST
),
2134 MAP64 ("dtprel@highesta", BFD_RELOC_PPC64_DTPREL16_HIGHESTA
),
2135 MAP64 ("localentry", BFD_RELOC_PPC64_ADDR64_LOCAL
),
2136 MAP64 ("tprel@high", BFD_RELOC_PPC64_TPREL16_HIGH
),
2137 MAP64 ("tprel@higha", BFD_RELOC_PPC64_TPREL16_HIGHA
),
2138 MAP64 ("tprel@higher", BFD_RELOC_PPC64_TPREL16_HIGHER
),
2139 MAP64 ("tprel@highera", BFD_RELOC_PPC64_TPREL16_HIGHERA
),
2140 MAP64 ("tprel@highest", BFD_RELOC_PPC64_TPREL16_HIGHEST
),
2141 MAP64 ("tprel@highesta", BFD_RELOC_PPC64_TPREL16_HIGHESTA
),
2142 MAP64 ("notoc", BFD_RELOC_PPC64_REL24_NOTOC
),
2143 MAP64 ("pcrel", BFD_RELOC_PPC64_PCREL34
),
2144 MAP64 ("got@pcrel", BFD_RELOC_PPC64_GOT_PCREL34
),
2145 MAP64 ("plt@pcrel", BFD_RELOC_PPC64_PLT_PCREL34
),
2146 MAP64 ("tls@pcrel", BFD_RELOC_PPC64_TLS_PCREL
),
2147 MAP64 ("got@tlsgd@pcrel", BFD_RELOC_PPC64_GOT_TLSGD_PCREL34
),
2148 MAP64 ("got@tlsld@pcrel", BFD_RELOC_PPC64_GOT_TLSLD_PCREL34
),
2149 MAP64 ("got@tprel@pcrel", BFD_RELOC_PPC64_GOT_TPREL_PCREL34
),
2150 MAP64 ("got@dtprel@pcrel", BFD_RELOC_PPC64_GOT_DTPREL_PCREL34
),
2151 MAP64 ("higher34", BFD_RELOC_PPC64_ADDR16_HIGHER34
),
2152 MAP64 ("highera34", BFD_RELOC_PPC64_ADDR16_HIGHERA34
),
2153 MAP64 ("highest34", BFD_RELOC_PPC64_ADDR16_HIGHEST34
),
2154 MAP64 ("highesta34", BFD_RELOC_PPC64_ADDR16_HIGHESTA34
),
2155 { (char *) 0, 0, 0, 0, BFD_RELOC_NONE
}
2159 return BFD_RELOC_NONE
;
2161 for (ch
= *str
, str2
= ident
;
2162 (str2
< ident
+ sizeof (ident
) - 1
2163 && (ISALNUM (ch
) || ch
== '@'));
2166 *str2
++ = TOLOWER (ch
);
2173 for (ptr
= &mapping
[0]; ptr
->length
> 0; ptr
++)
2174 if (ch
== ptr
->string
[0]
2175 && len
== ptr
->length
2176 && memcmp (ident
, ptr
->string
, ptr
->length
) == 0
2177 && (ppc_obj64
? ptr
->valid64
: ptr
->valid32
))
2179 int reloc
= ptr
->reloc
;
2181 if (!ppc_obj64
&& exp_p
->X_add_number
!= 0)
2185 case BFD_RELOC_16_GOTOFF
:
2186 case BFD_RELOC_LO16_GOTOFF
:
2187 case BFD_RELOC_HI16_GOTOFF
:
2188 case BFD_RELOC_HI16_S_GOTOFF
:
2189 as_warn (_("symbol+offset@%s means symbol@%s+offset"),
2190 ptr
->string
, ptr
->string
);
2193 case BFD_RELOC_PPC_GOT_TLSGD16
:
2194 case BFD_RELOC_PPC_GOT_TLSGD16_LO
:
2195 case BFD_RELOC_PPC_GOT_TLSGD16_HI
:
2196 case BFD_RELOC_PPC_GOT_TLSGD16_HA
:
2197 case BFD_RELOC_PPC_GOT_TLSLD16
:
2198 case BFD_RELOC_PPC_GOT_TLSLD16_LO
:
2199 case BFD_RELOC_PPC_GOT_TLSLD16_HI
:
2200 case BFD_RELOC_PPC_GOT_TLSLD16_HA
:
2201 case BFD_RELOC_PPC_GOT_DTPREL16
:
2202 case BFD_RELOC_PPC_GOT_DTPREL16_LO
:
2203 case BFD_RELOC_PPC_GOT_DTPREL16_HI
:
2204 case BFD_RELOC_PPC_GOT_DTPREL16_HA
:
2205 case BFD_RELOC_PPC_GOT_TPREL16
:
2206 case BFD_RELOC_PPC_GOT_TPREL16_LO
:
2207 case BFD_RELOC_PPC_GOT_TPREL16_HI
:
2208 case BFD_RELOC_PPC_GOT_TPREL16_HA
:
2209 as_bad (_("symbol+offset@%s not supported"), ptr
->string
);
2214 /* Now check for identifier@suffix+constant. */
2215 if (*str
== '-' || *str
== '+')
2217 char *orig_line
= input_line_pointer
;
2218 expressionS new_exp
;
2220 input_line_pointer
= str
;
2221 expression (&new_exp
);
2222 if (new_exp
.X_op
== O_constant
)
2224 exp_p
->X_add_number
+= new_exp
.X_add_number
;
2225 str
= input_line_pointer
;
2228 if (&input_line_pointer
!= str_p
)
2229 input_line_pointer
= orig_line
;
2233 if (reloc
== (int) BFD_RELOC_PPC64_TOC
2234 && exp_p
->X_op
== O_symbol
2235 && strcmp (S_GET_NAME (exp_p
->X_add_symbol
), ".TOC.") == 0)
2237 /* Change the symbol so that the dummy .TOC. symbol can be
2238 omitted from the object file. */
2239 exp_p
->X_add_symbol
= &abs_symbol
;
2242 return (bfd_reloc_code_real_type
) reloc
;
2245 return BFD_RELOC_NONE
;
2248 /* Support @got, etc. on constants emitted via .short, .int etc. */
2250 bfd_reloc_code_real_type
2251 ppc_elf_parse_cons (expressionS
*exp
, unsigned int nbytes
)
2254 if (nbytes
>= 2 && *input_line_pointer
== '@')
2255 return ppc_elf_suffix (&input_line_pointer
, exp
);
2256 return BFD_RELOC_NONE
;
2259 /* Warn when emitting data to code sections, unless we are emitting
2260 a relocation that ld --ppc476-workaround uses to recognise data
2261 *and* there was an unconditional branch prior to the data. */
2264 ppc_elf_cons_fix_check (expressionS
*exp ATTRIBUTE_UNUSED
,
2265 unsigned int nbytes
, fixS
*fix
)
2268 && (now_seg
->flags
& SEC_CODE
) != 0
2271 || !(fix
->fx_r_type
== BFD_RELOC_32
2272 || fix
->fx_r_type
== BFD_RELOC_CTOR
2273 || fix
->fx_r_type
== BFD_RELOC_32_PCREL
)
2274 || !(last_seg
== now_seg
&& last_subseg
== now_subseg
)
2275 || !((last_insn
& (0x3f << 26)) == (18u << 26)
2276 || ((last_insn
& (0x3f << 26)) == (16u << 26)
2277 && (last_insn
& (0x14 << 21)) == (0x14 << 21))
2278 || ((last_insn
& (0x3f << 26)) == (19u << 26)
2279 && (last_insn
& (0x3ff << 1)) == (16u << 1)
2280 && (last_insn
& (0x14 << 21)) == (0x14 << 21)))))
2282 /* Flag that we've warned. */
2286 as_warn (_("data in executable section"));
2290 /* Solaris pseduo op to change to the .rodata section. */
2292 ppc_elf_rdata (int xxx
)
2294 char *save_line
= input_line_pointer
;
2295 static char section
[] = ".rodata\n";
2297 /* Just pretend this is .section .rodata */
2298 input_line_pointer
= section
;
2299 obj_elf_section (xxx
);
2301 input_line_pointer
= save_line
;
2304 /* Pseudo op to make file scope bss items. */
2306 ppc_elf_lcomm (int xxx ATTRIBUTE_UNUSED
)
2319 c
= get_symbol_name (&name
);
2321 /* Just after name is now '\0'. */
2322 p
= input_line_pointer
;
2324 SKIP_WHITESPACE_AFTER_NAME ();
2325 if (*input_line_pointer
!= ',')
2327 as_bad (_("expected comma after symbol-name: rest of line ignored."));
2328 ignore_rest_of_line ();
2332 input_line_pointer
++; /* skip ',' */
2333 if ((size
= get_absolute_expression ()) < 0)
2335 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) size
);
2336 ignore_rest_of_line ();
2340 /* The third argument to .lcomm is the alignment. */
2341 if (*input_line_pointer
!= ',')
2345 ++input_line_pointer
;
2346 align
= get_absolute_expression ();
2349 as_warn (_("ignoring bad alignment"));
2355 symbolP
= symbol_find_or_make (name
);
2358 if (S_IS_DEFINED (symbolP
) && ! S_IS_COMMON (symbolP
))
2360 as_bad (_("ignoring attempt to re-define symbol `%s'."),
2361 S_GET_NAME (symbolP
));
2362 ignore_rest_of_line ();
2366 if (S_GET_VALUE (symbolP
) && S_GET_VALUE (symbolP
) != (valueT
) size
)
2368 as_bad (_("length of .lcomm \"%s\" is already %ld. Not changed to %ld."),
2369 S_GET_NAME (symbolP
),
2370 (long) S_GET_VALUE (symbolP
),
2373 ignore_rest_of_line ();
2379 old_subsec
= now_subseg
;
2382 /* Convert to a power of 2 alignment. */
2383 for (align2
= 0; (align
& 1) == 0; align
>>= 1, ++align2
);
2386 as_bad (_("common alignment not a power of 2"));
2387 ignore_rest_of_line ();
2394 record_alignment (bss_section
, align2
);
2395 subseg_set (bss_section
, 1);
2397 frag_align (align2
, 0, 0);
2398 if (S_GET_SEGMENT (symbolP
) == bss_section
)
2399 symbol_get_frag (symbolP
)->fr_symbol
= 0;
2400 symbol_set_frag (symbolP
, frag_now
);
2401 pfrag
= frag_var (rs_org
, 1, 1, (relax_substateT
) 0, symbolP
, size
,
2404 S_SET_SIZE (symbolP
, size
);
2405 S_SET_SEGMENT (symbolP
, bss_section
);
2406 subseg_set (old_sec
, old_subsec
);
2407 demand_empty_rest_of_line ();
2410 /* Pseudo op to set symbol local entry point. */
2412 ppc_elf_localentry (int ignore ATTRIBUTE_UNUSED
)
2415 char c
= get_symbol_name (&name
);
2420 elf_symbol_type
*elfsym
;
2422 p
= input_line_pointer
;
2424 SKIP_WHITESPACE_AFTER_NAME ();
2425 if (*input_line_pointer
!= ',')
2428 as_bad (_("expected comma after name `%s' in .localentry directive"),
2431 ignore_rest_of_line ();
2434 input_line_pointer
++;
2436 if (exp
.X_op
== O_absent
)
2438 as_bad (_("missing expression in .localentry directive"));
2439 exp
.X_op
= O_constant
;
2440 exp
.X_add_number
= 0;
2443 sym
= symbol_find_or_make (name
);
2446 if (resolve_expression (&exp
)
2447 && exp
.X_op
== O_constant
)
2449 unsigned int encoded
, ok
;
2452 if (exp
.X_add_number
== 1 || exp
.X_add_number
== 7)
2453 encoded
= exp
.X_add_number
<< STO_PPC64_LOCAL_BIT
;
2456 encoded
= PPC64_SET_LOCAL_ENTRY_OFFSET (exp
.X_add_number
);
2457 if (exp
.X_add_number
!= (offsetT
) PPC64_LOCAL_ENTRY_OFFSET (encoded
))
2459 as_bad (_(".localentry expression for `%s' "
2460 "is not a valid power of 2"), S_GET_NAME (sym
));
2466 bfdsym
= symbol_get_bfdsym (sym
);
2467 elfsym
= elf_symbol_from (bfdsym
);
2468 gas_assert (elfsym
);
2469 elfsym
->internal_elf_sym
.st_other
&= ~STO_PPC64_LOCAL_MASK
;
2470 elfsym
->internal_elf_sym
.st_other
|= encoded
;
2471 if (ppc_abiversion
== 0)
2476 as_bad (_(".localentry expression for `%s' "
2477 "does not evaluate to a constant"), S_GET_NAME (sym
));
2479 demand_empty_rest_of_line ();
2482 /* Pseudo op to set ABI version. */
2484 ppc_elf_abiversion (int ignore ATTRIBUTE_UNUSED
)
2489 if (exp
.X_op
== O_absent
)
2491 as_bad (_("missing expression in .abiversion directive"));
2492 exp
.X_op
= O_constant
;
2493 exp
.X_add_number
= 0;
2496 if (resolve_expression (&exp
)
2497 && exp
.X_op
== O_constant
)
2498 ppc_abiversion
= exp
.X_add_number
;
2500 as_bad (_(".abiversion expression does not evaluate to a constant"));
2501 demand_empty_rest_of_line ();
2504 /* Parse a .gnu_attribute directive. */
2506 ppc_elf_gnu_attribute (int ignored ATTRIBUTE_UNUSED
)
2508 int tag
= obj_elf_vendor_attribute (OBJ_ATTR_GNU
);
2510 /* Check validity of defined powerpc tags. */
2511 if (tag
== Tag_GNU_Power_ABI_FP
2512 || tag
== Tag_GNU_Power_ABI_Vector
2513 || tag
== Tag_GNU_Power_ABI_Struct_Return
)
2517 val
= bfd_elf_get_obj_attr_int (stdoutput
, OBJ_ATTR_GNU
, tag
);
2519 if ((tag
== Tag_GNU_Power_ABI_FP
&& val
> 15)
2520 || (tag
== Tag_GNU_Power_ABI_Vector
&& val
> 3)
2521 || (tag
== Tag_GNU_Power_ABI_Struct_Return
&& val
> 2))
2522 as_warn (_("unknown .gnu_attribute value"));
2526 /* Set ABI version in output file. */
2530 if (ppc_obj64
&& ppc_abiversion
!= 0)
2532 elf_elfheader (stdoutput
)->e_flags
&= ~EF_PPC64_ABI
;
2533 elf_elfheader (stdoutput
)->e_flags
|= ppc_abiversion
& EF_PPC64_ABI
;
2535 /* Any selection of opcodes based on ppc_cpu after gas has finished
2536 parsing the file is invalid. md_apply_fix and ppc_handle_align
2537 must select opcodes based on the machine in force at the point
2538 where the fixup or alignment frag was created, not the machine in
2539 force at the end of file. */
2543 /* Validate any relocations emitted for -mrelocatable, possibly adding
2544 fixups for word relocations in writable segments, so we can adjust
2547 ppc_elf_validate_fix (fixS
*fixp
, segT seg
)
2549 if (fixp
->fx_done
|| fixp
->fx_pcrel
)
2558 case SHLIB_MRELOCATABLE
:
2559 if (fixp
->fx_r_type
!= BFD_RELOC_16_GOTOFF
2560 && fixp
->fx_r_type
!= BFD_RELOC_HI16_GOTOFF
2561 && fixp
->fx_r_type
!= BFD_RELOC_LO16_GOTOFF
2562 && fixp
->fx_r_type
!= BFD_RELOC_HI16_S_GOTOFF
2563 && fixp
->fx_r_type
!= BFD_RELOC_16_BASEREL
2564 && fixp
->fx_r_type
!= BFD_RELOC_LO16_BASEREL
2565 && fixp
->fx_r_type
!= BFD_RELOC_HI16_BASEREL
2566 && fixp
->fx_r_type
!= BFD_RELOC_HI16_S_BASEREL
2567 && (seg
->flags
& SEC_LOAD
) != 0
2568 && strcmp (segment_name (seg
), ".got2") != 0
2569 && strcmp (segment_name (seg
), ".dtors") != 0
2570 && strcmp (segment_name (seg
), ".ctors") != 0
2571 && strcmp (segment_name (seg
), ".fixup") != 0
2572 && strcmp (segment_name (seg
), ".gcc_except_table") != 0
2573 && strcmp (segment_name (seg
), ".eh_frame") != 0
2574 && strcmp (segment_name (seg
), ".ex_shared") != 0)
2576 if ((seg
->flags
& (SEC_READONLY
| SEC_CODE
)) != 0
2577 || fixp
->fx_r_type
!= BFD_RELOC_CTOR
)
2579 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
2580 _("relocation cannot be done when using -mrelocatable"));
2587 /* Prevent elf_frob_file_before_adjust removing a weak undefined
2588 function descriptor sym if the corresponding code sym is used. */
2591 ppc_frob_file_before_adjust (void)
2599 for (symp
= symbol_rootP
; symp
; symp
= symbol_next (symp
))
2605 name
= S_GET_NAME (symp
);
2609 if (! S_IS_WEAK (symp
)
2610 || S_IS_DEFINED (symp
))
2613 dotname
= concat (".", name
, (char *) NULL
);
2614 dotsym
= symbol_find_noref (dotname
, 1);
2616 if (dotsym
!= NULL
&& (symbol_used_p (dotsym
)
2617 || symbol_used_in_reloc_p (dotsym
)))
2618 symbol_mark_used (symp
);
2622 toc
= bfd_get_section_by_name (stdoutput
, ".toc");
2624 && toc_reloc_types
!= has_large_toc_reloc
2625 && bfd_section_size (toc
) > 0x10000)
2626 as_warn (_("TOC section size exceeds 64k"));
2629 /* .TOC. used in an opd entry as .TOC.@tocbase doesn't need to be
2630 emitted. Other uses of .TOC. will cause the symbol to be marked
2631 with BSF_KEEP in md_apply_fix. */
2634 ppc_elf_adjust_symtab (void)
2639 symp
= symbol_find (".TOC.");
2642 asymbol
*bsym
= symbol_get_bfdsym (symp
);
2643 if ((bsym
->flags
& BSF_KEEP
) == 0)
2644 symbol_remove (symp
, &symbol_rootP
, &symbol_lastP
);
2648 #endif /* OBJ_ELF */
2650 #if defined (OBJ_XCOFF) || defined (OBJ_ELF)
2651 /* See whether a symbol is in the TOC section. */
2654 ppc_is_toc_sym (symbolS
*sym
)
2657 return (symbol_get_tc (sym
)->symbol_class
== XMC_TC
2658 || symbol_get_tc (sym
)->symbol_class
== XMC_TC0
);
2661 const char *sname
= segment_name (S_GET_SEGMENT (sym
));
2663 return strcmp (sname
, ".toc") == 0;
2665 return strcmp (sname
, ".got") == 0;
2668 #endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
2672 #define APUID(a,v) ((((a) & 0xffff) << 16) | ((v) & 0xffff))
2674 ppc_apuinfo_section_add (unsigned int apu
, unsigned int version
)
2678 /* Check we don't already exist. */
2679 for (i
= 0; i
< ppc_apuinfo_num
; i
++)
2680 if (ppc_apuinfo_list
[i
] == APUID (apu
, version
))
2683 if (ppc_apuinfo_num
== ppc_apuinfo_num_alloc
)
2685 if (ppc_apuinfo_num_alloc
== 0)
2687 ppc_apuinfo_num_alloc
= 4;
2688 ppc_apuinfo_list
= XNEWVEC (unsigned long, ppc_apuinfo_num_alloc
);
2692 ppc_apuinfo_num_alloc
+= 4;
2693 ppc_apuinfo_list
= XRESIZEVEC (unsigned long, ppc_apuinfo_list
,
2694 ppc_apuinfo_num_alloc
);
2697 ppc_apuinfo_list
[ppc_apuinfo_num
++] = APUID (apu
, version
);
2702 /* Various frobbings of labels and their addresses. */
2704 /* Symbols labelling the current insn. */
2705 struct insn_label_list
2707 struct insn_label_list
*next
;
2711 static struct insn_label_list
*insn_labels
;
2712 static struct insn_label_list
*free_insn_labels
;
2715 ppc_record_label (symbolS
*sym
)
2717 struct insn_label_list
*l
;
2719 if (free_insn_labels
== NULL
)
2720 l
= XNEW (struct insn_label_list
);
2723 l
= free_insn_labels
;
2724 free_insn_labels
= l
->next
;
2728 l
->next
= insn_labels
;
2733 ppc_clear_labels (void)
2735 while (insn_labels
!= NULL
)
2737 struct insn_label_list
*l
= insn_labels
;
2738 insn_labels
= l
->next
;
2739 l
->next
= free_insn_labels
;
2740 free_insn_labels
= l
;
2745 ppc_start_line_hook (void)
2747 ppc_clear_labels ();
2751 ppc_new_dot_label (symbolS
*sym
)
2753 ppc_record_label (sym
);
2755 /* Anchor this label to the current csect for relocations. */
2756 symbol_get_tc (sym
)->within
= ppc_current_csect
;
2761 ppc_frob_label (symbolS
*sym
)
2763 ppc_record_label (sym
);
2766 /* Set the class of a label based on where it is defined. This handles
2767 symbols without suffixes. Also, move the symbol so that it follows
2768 the csect symbol. */
2769 if (ppc_current_csect
!= (symbolS
*) NULL
)
2771 if (symbol_get_tc (sym
)->symbol_class
== -1)
2772 symbol_get_tc (sym
)->symbol_class
= symbol_get_tc (ppc_current_csect
)->symbol_class
;
2774 symbol_remove (sym
, &symbol_rootP
, &symbol_lastP
);
2775 symbol_append (sym
, symbol_get_tc (ppc_current_csect
)->within
,
2776 &symbol_rootP
, &symbol_lastP
);
2777 symbol_get_tc (ppc_current_csect
)->within
= sym
;
2778 symbol_get_tc (sym
)->within
= ppc_current_csect
;
2783 dwarf2_emit_label (sym
);
2787 /* We need to keep a list of fixups. We can't simply generate them as
2788 we go, because that would require us to first create the frag, and
2789 that would screw up references to ``.''. */
2795 bfd_reloc_code_real_type reloc
;
2798 #define MAX_INSN_FIXUPS (5)
2800 /* Return the field size operated on by RELOC, and whether it is
2801 pc-relative in PC_RELATIVE. */
2804 fixup_size (bfd_reloc_code_real_type reloc
, bfd_boolean
*pc_relative
)
2806 unsigned int size
= 0;
2807 bfd_boolean pcrel
= FALSE
;
2811 /* This switch statement must handle all BFD_RELOC values
2812 possible in instruction fixups. As is, it handles all
2813 BFD_RELOC values used in bfd/elf64-ppc.c, bfd/elf32-ppc.c,
2814 bfd/coff-rs6000.c and bfd/coff64-rs6000.c.
2815 Overkill since data and marker relocs need not be handled
2816 here, but this way we can be sure a needed fixup reloc isn't
2817 accidentally omitted. */
2818 case BFD_RELOC_PPC_EMB_MRKREF
:
2819 case BFD_RELOC_VTABLE_ENTRY
:
2820 case BFD_RELOC_VTABLE_INHERIT
:
2828 case BFD_RELOC_16_BASEREL
:
2829 case BFD_RELOC_16_GOTOFF
:
2830 case BFD_RELOC_GPREL16
:
2831 case BFD_RELOC_HI16
:
2832 case BFD_RELOC_HI16_BASEREL
:
2833 case BFD_RELOC_HI16_GOTOFF
:
2834 case BFD_RELOC_HI16_PLTOFF
:
2835 case BFD_RELOC_HI16_S
:
2836 case BFD_RELOC_HI16_S_BASEREL
:
2837 case BFD_RELOC_HI16_S_GOTOFF
:
2838 case BFD_RELOC_HI16_S_PLTOFF
:
2839 case BFD_RELOC_LO16
:
2840 case BFD_RELOC_LO16_BASEREL
:
2841 case BFD_RELOC_LO16_GOTOFF
:
2842 case BFD_RELOC_LO16_PLTOFF
:
2843 case BFD_RELOC_PPC64_ADDR16_DS
:
2844 case BFD_RELOC_PPC64_ADDR16_HIGH
:
2845 case BFD_RELOC_PPC64_ADDR16_HIGHA
:
2846 case BFD_RELOC_PPC64_ADDR16_HIGHER34
:
2847 case BFD_RELOC_PPC64_ADDR16_HIGHERA34
:
2848 case BFD_RELOC_PPC64_ADDR16_HIGHEST34
:
2849 case BFD_RELOC_PPC64_ADDR16_HIGHESTA34
:
2850 case BFD_RELOC_PPC64_ADDR16_LO_DS
:
2851 case BFD_RELOC_PPC64_DTPREL16_DS
:
2852 case BFD_RELOC_PPC64_DTPREL16_HIGH
:
2853 case BFD_RELOC_PPC64_DTPREL16_HIGHA
:
2854 case BFD_RELOC_PPC64_DTPREL16_HIGHER
:
2855 case BFD_RELOC_PPC64_DTPREL16_HIGHERA
:
2856 case BFD_RELOC_PPC64_DTPREL16_HIGHEST
:
2857 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA
:
2858 case BFD_RELOC_PPC64_DTPREL16_LO_DS
:
2859 case BFD_RELOC_PPC64_GOT16_DS
:
2860 case BFD_RELOC_PPC64_GOT16_LO_DS
:
2861 case BFD_RELOC_PPC64_HIGHER
:
2862 case BFD_RELOC_PPC64_HIGHER_S
:
2863 case BFD_RELOC_PPC64_HIGHEST
:
2864 case BFD_RELOC_PPC64_HIGHEST_S
:
2865 case BFD_RELOC_PPC64_PLT16_LO_DS
:
2866 case BFD_RELOC_PPC64_PLTGOT16
:
2867 case BFD_RELOC_PPC64_PLTGOT16_DS
:
2868 case BFD_RELOC_PPC64_PLTGOT16_HA
:
2869 case BFD_RELOC_PPC64_PLTGOT16_HI
:
2870 case BFD_RELOC_PPC64_PLTGOT16_LO
:
2871 case BFD_RELOC_PPC64_PLTGOT16_LO_DS
:
2872 case BFD_RELOC_PPC64_SECTOFF_DS
:
2873 case BFD_RELOC_PPC64_SECTOFF_LO_DS
:
2874 case BFD_RELOC_PPC64_TOC16_DS
:
2875 case BFD_RELOC_PPC64_TOC16_HA
:
2876 case BFD_RELOC_PPC64_TOC16_HI
:
2877 case BFD_RELOC_PPC64_TOC16_LO
:
2878 case BFD_RELOC_PPC64_TOC16_LO_DS
:
2879 case BFD_RELOC_PPC64_TPREL16_DS
:
2880 case BFD_RELOC_PPC64_TPREL16_HIGH
:
2881 case BFD_RELOC_PPC64_TPREL16_HIGHA
:
2882 case BFD_RELOC_PPC64_TPREL16_HIGHER
:
2883 case BFD_RELOC_PPC64_TPREL16_HIGHERA
:
2884 case BFD_RELOC_PPC64_TPREL16_HIGHEST
:
2885 case BFD_RELOC_PPC64_TPREL16_HIGHESTA
:
2886 case BFD_RELOC_PPC64_TPREL16_LO_DS
:
2888 case BFD_RELOC_PPC_BA16
:
2890 case BFD_RELOC_PPC_DTPREL16
:
2891 case BFD_RELOC_PPC_DTPREL16_HA
:
2892 case BFD_RELOC_PPC_DTPREL16_HI
:
2893 case BFD_RELOC_PPC_DTPREL16_LO
:
2894 case BFD_RELOC_PPC_EMB_NADDR16
:
2895 case BFD_RELOC_PPC_EMB_NADDR16_HA
:
2896 case BFD_RELOC_PPC_EMB_NADDR16_HI
:
2897 case BFD_RELOC_PPC_EMB_NADDR16_LO
:
2898 case BFD_RELOC_PPC_EMB_RELSDA
:
2899 case BFD_RELOC_PPC_EMB_RELSEC16
:
2900 case BFD_RELOC_PPC_EMB_RELST_LO
:
2901 case BFD_RELOC_PPC_EMB_RELST_HI
:
2902 case BFD_RELOC_PPC_EMB_RELST_HA
:
2903 case BFD_RELOC_PPC_EMB_SDA2I16
:
2904 case BFD_RELOC_PPC_EMB_SDA2REL
:
2905 case BFD_RELOC_PPC_EMB_SDAI16
:
2906 case BFD_RELOC_PPC_GOT_DTPREL16
:
2907 case BFD_RELOC_PPC_GOT_DTPREL16_HA
:
2908 case BFD_RELOC_PPC_GOT_DTPREL16_HI
:
2909 case BFD_RELOC_PPC_GOT_DTPREL16_LO
:
2910 case BFD_RELOC_PPC_GOT_TLSGD16
:
2911 case BFD_RELOC_PPC_GOT_TLSGD16_HA
:
2912 case BFD_RELOC_PPC_GOT_TLSGD16_HI
:
2913 case BFD_RELOC_PPC_GOT_TLSGD16_LO
:
2914 case BFD_RELOC_PPC_GOT_TLSLD16
:
2915 case BFD_RELOC_PPC_GOT_TLSLD16_HA
:
2916 case BFD_RELOC_PPC_GOT_TLSLD16_HI
:
2917 case BFD_RELOC_PPC_GOT_TLSLD16_LO
:
2918 case BFD_RELOC_PPC_GOT_TPREL16
:
2919 case BFD_RELOC_PPC_GOT_TPREL16_HA
:
2920 case BFD_RELOC_PPC_GOT_TPREL16_HI
:
2921 case BFD_RELOC_PPC_GOT_TPREL16_LO
:
2922 case BFD_RELOC_PPC_TOC16
:
2923 case BFD_RELOC_PPC_TPREL16
:
2924 case BFD_RELOC_PPC_TPREL16_HA
:
2925 case BFD_RELOC_PPC_TPREL16_HI
:
2926 case BFD_RELOC_PPC_TPREL16_LO
:
2930 case BFD_RELOC_16_PCREL
:
2931 case BFD_RELOC_HI16_PCREL
:
2932 case BFD_RELOC_HI16_S_PCREL
:
2933 case BFD_RELOC_LO16_PCREL
:
2934 case BFD_RELOC_PPC64_REL16_HIGH
:
2935 case BFD_RELOC_PPC64_REL16_HIGHA
:
2936 case BFD_RELOC_PPC64_REL16_HIGHER
:
2937 case BFD_RELOC_PPC64_REL16_HIGHER34
:
2938 case BFD_RELOC_PPC64_REL16_HIGHERA
:
2939 case BFD_RELOC_PPC64_REL16_HIGHERA34
:
2940 case BFD_RELOC_PPC64_REL16_HIGHEST
:
2941 case BFD_RELOC_PPC64_REL16_HIGHEST34
:
2942 case BFD_RELOC_PPC64_REL16_HIGHESTA
:
2943 case BFD_RELOC_PPC64_REL16_HIGHESTA34
:
2945 case BFD_RELOC_PPC_B16
:
2947 case BFD_RELOC_PPC_VLE_REL8
:
2953 case BFD_RELOC_32_PLTOFF
:
2955 case BFD_RELOC_CTOR
:
2957 case BFD_RELOC_PPC64_ENTRY
:
2958 case BFD_RELOC_PPC_16DX_HA
:
2960 case BFD_RELOC_PPC_BA16
:
2962 case BFD_RELOC_PPC_BA16_BRNTAKEN
:
2963 case BFD_RELOC_PPC_BA16_BRTAKEN
:
2964 case BFD_RELOC_PPC_BA26
:
2965 case BFD_RELOC_PPC_EMB_BIT_FLD
:
2966 case BFD_RELOC_PPC_EMB_NADDR32
:
2967 case BFD_RELOC_PPC_EMB_SDA21
:
2968 case BFD_RELOC_PPC_TLS
:
2969 case BFD_RELOC_PPC_TLSGD
:
2970 case BFD_RELOC_PPC_TLSLD
:
2971 case BFD_RELOC_PPC_VLE_HA16A
:
2972 case BFD_RELOC_PPC_VLE_HA16D
:
2973 case BFD_RELOC_PPC_VLE_HI16A
:
2974 case BFD_RELOC_PPC_VLE_HI16D
:
2975 case BFD_RELOC_PPC_VLE_LO16A
:
2976 case BFD_RELOC_PPC_VLE_LO16D
:
2977 case BFD_RELOC_PPC_VLE_SDA21
:
2978 case BFD_RELOC_PPC_VLE_SDA21_LO
:
2979 case BFD_RELOC_PPC_VLE_SDAREL_HA16A
:
2980 case BFD_RELOC_PPC_VLE_SDAREL_HA16D
:
2981 case BFD_RELOC_PPC_VLE_SDAREL_HI16A
:
2982 case BFD_RELOC_PPC_VLE_SDAREL_HI16D
:
2983 case BFD_RELOC_PPC_VLE_SDAREL_LO16A
:
2984 case BFD_RELOC_PPC_VLE_SDAREL_LO16D
:
2985 case BFD_RELOC_PPC64_TLS_PCREL
:
2990 case BFD_RELOC_24_PLT_PCREL
:
2991 case BFD_RELOC_32_PCREL
:
2992 case BFD_RELOC_32_PLT_PCREL
:
2993 case BFD_RELOC_PPC64_REL24_NOTOC
:
2995 case BFD_RELOC_PPC_B16
:
2997 case BFD_RELOC_PPC_B16_BRNTAKEN
:
2998 case BFD_RELOC_PPC_B16_BRTAKEN
:
2999 case BFD_RELOC_PPC_B26
:
3000 case BFD_RELOC_PPC_LOCAL24PC
:
3001 case BFD_RELOC_PPC_REL16DX_HA
:
3002 case BFD_RELOC_PPC_VLE_REL15
:
3003 case BFD_RELOC_PPC_VLE_REL24
:
3009 case BFD_RELOC_CTOR
:
3011 case BFD_RELOC_PPC_COPY
:
3012 case BFD_RELOC_PPC_DTPMOD
:
3013 case BFD_RELOC_PPC_DTPREL
:
3014 case BFD_RELOC_PPC_GLOB_DAT
:
3015 case BFD_RELOC_PPC_TPREL
:
3016 size
= ppc_obj64
? 8 : 4;
3020 case BFD_RELOC_64_PLTOFF
:
3021 case BFD_RELOC_PPC64_ADDR64_LOCAL
:
3022 case BFD_RELOC_PPC64_D28
:
3023 case BFD_RELOC_PPC64_D34
:
3024 case BFD_RELOC_PPC64_D34_LO
:
3025 case BFD_RELOC_PPC64_D34_HI30
:
3026 case BFD_RELOC_PPC64_D34_HA30
:
3027 case BFD_RELOC_PPC64_TPREL34
:
3028 case BFD_RELOC_PPC64_DTPREL34
:
3029 case BFD_RELOC_PPC64_TOC
:
3033 case BFD_RELOC_64_PCREL
:
3034 case BFD_RELOC_64_PLT_PCREL
:
3035 case BFD_RELOC_PPC64_GOT_PCREL34
:
3036 case BFD_RELOC_PPC64_GOT_TLSGD_PCREL34
:
3037 case BFD_RELOC_PPC64_GOT_TLSLD_PCREL34
:
3038 case BFD_RELOC_PPC64_GOT_TPREL_PCREL34
:
3039 case BFD_RELOC_PPC64_GOT_DTPREL_PCREL34
:
3040 case BFD_RELOC_PPC64_PCREL28
:
3041 case BFD_RELOC_PPC64_PCREL34
:
3042 case BFD_RELOC_PPC64_PLT_PCREL34
:
3051 if (ENABLE_CHECKING
)
3053 reloc_howto_type
*reloc_howto
= bfd_reloc_type_lookup (stdoutput
, reloc
);
3054 if (reloc_howto
!= NULL
3055 && (size
!= bfd_get_reloc_size (reloc_howto
)
3056 || pcrel
!= reloc_howto
->pc_relative
))
3058 as_bad (_("%s howto doesn't match size/pcrel in gas"),
3063 *pc_relative
= pcrel
;
3068 /* If we have parsed a call to __tls_get_addr, parse an argument like
3069 (gd0@tlsgd). *STR is the leading parenthesis on entry. If an arg
3070 is successfully parsed, *STR is updated past the trailing
3071 parenthesis and trailing white space, and *TLS_FIX contains the
3072 reloc and arg expression. */
3075 parse_tls_arg (char **str
, const expressionS
*exp
, struct ppc_fixup
*tls_fix
)
3077 const char *sym_name
= S_GET_NAME (exp
->X_add_symbol
);
3078 if (sym_name
[0] == '.')
3081 tls_fix
->reloc
= BFD_RELOC_NONE
;
3082 if (strncasecmp (sym_name
, "__tls_get_addr", 14) == 0
3083 && (sym_name
[14] == 0
3084 || strcasecmp (sym_name
+ 14, "_desc") == 0
3085 || strcasecmp (sym_name
+ 14, "_opt") == 0))
3087 char *hold
= input_line_pointer
;
3088 input_line_pointer
= *str
+ 1;
3089 expression (&tls_fix
->exp
);
3090 if (tls_fix
->exp
.X_op
== O_symbol
)
3092 if (strncasecmp (input_line_pointer
, "@tlsgd)", 7) == 0)
3093 tls_fix
->reloc
= BFD_RELOC_PPC_TLSGD
;
3094 else if (strncasecmp (input_line_pointer
, "@tlsld)", 7) == 0)
3095 tls_fix
->reloc
= BFD_RELOC_PPC_TLSLD
;
3096 if (tls_fix
->reloc
!= BFD_RELOC_NONE
)
3098 input_line_pointer
+= 7;
3100 *str
= input_line_pointer
;
3103 input_line_pointer
= hold
;
3105 return tls_fix
->reloc
!= BFD_RELOC_NONE
;
3109 /* Parse svp64 extra operands given to the MACRO opcode starting at S,
3110 then its operands, and assemble the svp64 macro. */
3113 parse_svp64_macro (char *s
, struct powerpc_macro
*macro
)
3115 as_bad (_("`sv.'-prefixed macros are not supported"));
3118 /* Parse extra operands at S, and initialize SVP64_PREFIX with them. */
3120 parse_svp64_operands (char **s
, uint32_t *svp64_prefix
, ppc_cpu_t flags
)
3122 *svp64_prefix
= (uint32_t)1 << 26;
3123 /* Do nothing for now. */
3126 /* This routine is called for each instruction to be assembled. */
3129 md_assemble (char *str
)
3131 char *s
, *spfx
= str
;
3132 const struct powerpc_opcode
*opcode
;
3134 const unsigned char *opindex_ptr
;
3137 struct ppc_fixup fixups
[MAX_INSN_FIXUPS
];
3142 unsigned int insn_length
;
3143 bfd_boolean svp64
= FALSE
;
3145 uint32_t svp64_prefix
;
3147 if (strncmp (str
, "sv.", 3) == 0)
3153 /* Get the opcode. */
3154 for (s
= str
; *s
!= '\0' && ! ISSPACE (*s
) && (!svp64
|| *s
!= '/'); s
++)
3160 /* Look up the opcode in the hash table. */
3161 opcode
= (const struct powerpc_opcode
*) str_hash_find (ppc_hash
, str
);
3162 if (opcode
== (const struct powerpc_opcode
*) NULL
)
3164 const struct powerpc_macro
*macro
;
3166 macro
= (const struct powerpc_macro
*) str_hash_find (ppc_macro_hash
,
3168 if (macro
== (const struct powerpc_macro
*) NULL
)
3169 as_bad (_("unrecognized opcode: `%s'"), spfx
);
3170 else if (svp64
&& !(macro
->flags
& PPC_OPCODE_SVP64PFX
))
3171 as_bad (_("opcode is not `sv.'-prefixable: `%s'"), str
);
3175 ppc_svp64_macro (s
, macro
);
3178 ppc_macro (s
, macro
);
3180 ppc_clear_labels ();
3184 insn
= opcode
->opcode
;
3185 if (!target_big_endian
3186 && ((insn
& ~(1 << 26)) == 46u << 26
3187 || (insn
& ~(0xc0 << 1)) == (31u << 26 | 533 << 1)))
3189 /* lmw, stmw, lswi, lswx, stswi, stswx */
3190 as_bad (_("`%s' invalid when little-endian"), str
);
3191 ppc_clear_labels ();
3197 if (!(opcode
->flags
& PPC_OPCODE_SVP64PFX
))
3199 as_bad (_("opcode is not `sv.'-prefixable: `%s'"), str
);
3200 ppc_clear_labels ();
3205 parse_svp64_operands (&s
, &svp64_prefix
,
3206 opcode
->flags
& PPC_OPCODE_SVP64MSK
);
3210 while (ISSPACE (*str
))
3213 /* PowerPC operands are just expressions. The only real issue is
3214 that a few operand types are optional. If an instruction has
3215 multiple optional operands and one is omitted, then all optional
3216 operands past the first omitted one must also be omitted. */
3217 int num_optional_operands
= 0;
3218 int num_optional_provided
= 0;
3220 /* Gather the operands. */
3224 for (opindex_ptr
= opcode
->operands
; *opindex_ptr
!= 0; opindex_ptr
++)
3226 const struct powerpc_operand
*operand
;
3232 if (next_opindex
== 0)
3233 operand
= &powerpc_operands
[*opindex_ptr
];
3236 operand
= &powerpc_operands
[next_opindex
];
3241 /* If this is an optional operand, and we are skipping it, just
3242 insert the default value, usually a zero. */
3243 if ((operand
->flags
& PPC_OPERAND_OPTIONAL
) != 0
3244 && !((operand
->flags
& PPC_OPERAND_OPTIONAL32
) != 0 && ppc_obj64
))
3246 if (num_optional_operands
== 0)
3248 const unsigned char *optr
;
3254 for (optr
= opindex_ptr
; *optr
!= 0; optr
++)
3256 const struct powerpc_operand
*op
;
3257 op
= &powerpc_operands
[*optr
];
3261 if ((op
->flags
& PPC_OPERAND_OPTIONAL
) != 0
3262 && !((op
->flags
& PPC_OPERAND_OPTIONAL32
) != 0
3264 ++num_optional_operands
;
3266 if (s
!= NULL
&& *s
!= '\0')
3270 /* Look for the start of the next operand. */
3271 if ((op
->flags
& PPC_OPERAND_PARENS
) != 0)
3272 s
= strpbrk (s
, "(,");
3274 s
= strchr (s
, ',');
3280 omitted
= total
- provided
;
3281 num_optional_provided
= num_optional_operands
- omitted
;
3283 if (--num_optional_provided
< 0)
3285 int64_t val
= ppc_optional_operand_value (operand
, insn
, ppc_cpu
,
3286 num_optional_provided
);
3287 if (operand
->insert
)
3289 insn
= (*operand
->insert
) (insn
, val
, ppc_cpu
, &errmsg
);
3290 if (errmsg
!= (const char *) NULL
)
3291 as_bad ("%s", errmsg
);
3293 else if (operand
->shift
>= 0)
3294 insn
|= (val
& operand
->bitm
) << operand
->shift
;
3296 insn
|= (val
& operand
->bitm
) >> -operand
->shift
;
3298 if ((operand
->flags
& PPC_OPERAND_NEXT
) != 0)
3299 next_opindex
= *opindex_ptr
+ 1;
3304 /* Gather the operand. */
3305 hold
= input_line_pointer
;
3306 input_line_pointer
= str
;
3309 && (((operand
->flags
& PPC_OPERAND_CR_BIT
) != 0)
3310 || ((operand
->flags
& PPC_OPERAND_CR_REG
) != 0)))
3311 || !register_name (&ex
))
3313 char save_lex
= lex_type
['%'];
3315 if (((operand
->flags
& PPC_OPERAND_CR_REG
) != 0)
3316 || (operand
->flags
& PPC_OPERAND_CR_BIT
) != 0)
3319 lex_type
['%'] |= LEX_BEGIN_NAME
;
3323 lex_type
['%'] = save_lex
;
3326 str
= input_line_pointer
;
3327 input_line_pointer
= hold
;
3329 if (ex
.X_op
== O_illegal
)
3330 as_bad (_("illegal operand"));
3331 else if (ex
.X_op
== O_absent
)
3332 as_bad (_("missing operand"));
3333 else if (ex
.X_op
== O_register
)
3337 & (PPC_OPERAND_GPR
| PPC_OPERAND_FPR
| PPC_OPERAND_VR
3338 | PPC_OPERAND_VSR
| PPC_OPERAND_CR_BIT
| PPC_OPERAND_CR_REG
3339 | PPC_OPERAND_SPR
| PPC_OPERAND_GQR
| PPC_OPERAND_ACC
)) != 0
3340 && !((ex
.X_md
& PPC_OPERAND_GPR
) != 0
3341 && ex
.X_add_number
!= 0
3342 && (operand
->flags
& PPC_OPERAND_GPR_0
) != 0))
3343 as_warn (_("invalid register expression"));
3344 insn
= ppc_insert_operand (insn
, operand
, ex
.X_add_number
,
3345 ppc_cpu
, (char *) NULL
, 0);
3347 else if (ex
.X_op
== O_constant
)
3350 /* Allow @HA, @L, @H on constants. */
3351 bfd_reloc_code_real_type reloc
;
3352 char *orig_str
= str
;
3354 if ((reloc
= ppc_elf_suffix (&str
, &ex
)) != BFD_RELOC_NONE
)
3361 case BFD_RELOC_LO16
:
3362 ex
.X_add_number
&= 0xffff;
3363 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3364 ex
.X_add_number
= SEX16 (ex
.X_add_number
);
3367 case BFD_RELOC_HI16
:
3368 if (REPORT_OVERFLOW_HI
&& ppc_obj64
)
3370 /* PowerPC64 @h is tested for overflow. */
3371 ex
.X_add_number
= (addressT
) ex
.X_add_number
>> 16;
3372 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3374 addressT sign
= (((addressT
) -1 >> 16) + 1) >> 1;
3376 = ((addressT
) ex
.X_add_number
^ sign
) - sign
;
3382 case BFD_RELOC_PPC64_ADDR16_HIGH
:
3383 ex
.X_add_number
= PPC_HI (ex
.X_add_number
);
3384 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3385 ex
.X_add_number
= SEX16 (ex
.X_add_number
);
3388 case BFD_RELOC_HI16_S
:
3389 if (REPORT_OVERFLOW_HI
&& ppc_obj64
)
3391 /* PowerPC64 @ha is tested for overflow. */
3393 = ((addressT
) ex
.X_add_number
+ 0x8000) >> 16;
3394 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3396 addressT sign
= (((addressT
) -1 >> 16) + 1) >> 1;
3398 = ((addressT
) ex
.X_add_number
^ sign
) - sign
;
3404 case BFD_RELOC_PPC64_ADDR16_HIGHA
:
3405 ex
.X_add_number
= PPC_HA (ex
.X_add_number
);
3406 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3407 ex
.X_add_number
= SEX16 (ex
.X_add_number
);
3410 case BFD_RELOC_PPC64_HIGHER
:
3411 ex
.X_add_number
= PPC_HIGHER (ex
.X_add_number
);
3412 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3413 ex
.X_add_number
= SEX16 (ex
.X_add_number
);
3416 case BFD_RELOC_PPC64_HIGHER_S
:
3417 ex
.X_add_number
= PPC_HIGHERA (ex
.X_add_number
);
3418 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3419 ex
.X_add_number
= SEX16 (ex
.X_add_number
);
3422 case BFD_RELOC_PPC64_HIGHEST
:
3423 ex
.X_add_number
= PPC_HIGHEST (ex
.X_add_number
);
3424 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3425 ex
.X_add_number
= SEX16 (ex
.X_add_number
);
3428 case BFD_RELOC_PPC64_HIGHEST_S
:
3429 ex
.X_add_number
= PPC_HIGHESTA (ex
.X_add_number
);
3430 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3431 ex
.X_add_number
= SEX16 (ex
.X_add_number
);
3434 #endif /* OBJ_ELF */
3435 insn
= ppc_insert_operand (insn
, operand
, ex
.X_add_number
,
3436 ppc_cpu
, (char *) NULL
, 0);
3440 bfd_reloc_code_real_type reloc
= BFD_RELOC_NONE
;
3442 /* Look for a __tls_get_addr arg using the insane old syntax. */
3443 if (ex
.X_op
== O_symbol
&& *str
== '(' && fc
< MAX_INSN_FIXUPS
3444 && parse_tls_arg (&str
, &ex
, &fixups
[fc
]))
3446 fixups
[fc
].opindex
= *opindex_ptr
;
3450 if ((reloc
= ppc_elf_suffix (&str
, &ex
)) != BFD_RELOC_NONE
)
3452 /* If VLE-mode convert LO/HI/HA relocations. */
3453 if (opcode
->flags
& PPC_OPCODE_VLE
)
3455 uint64_t tmp_insn
= insn
& opcode
->mask
;
3457 int use_a_reloc
= (tmp_insn
== E_OR2I_INSN
3458 || tmp_insn
== E_AND2I_DOT_INSN
3459 || tmp_insn
== E_OR2IS_INSN
3460 || tmp_insn
== E_LI_INSN
3461 || tmp_insn
== E_LIS_INSN
3462 || tmp_insn
== E_AND2IS_DOT_INSN
);
3465 int use_d_reloc
= (tmp_insn
== E_ADD2I_DOT_INSN
3466 || tmp_insn
== E_ADD2IS_INSN
3467 || tmp_insn
== E_CMP16I_INSN
3468 || tmp_insn
== E_MULL2I_INSN
3469 || tmp_insn
== E_CMPL16I_INSN
3470 || tmp_insn
== E_CMPH16I_INSN
3471 || tmp_insn
== E_CMPHL16I_INSN
);
3478 case BFD_RELOC_PPC_EMB_SDA21
:
3479 reloc
= BFD_RELOC_PPC_VLE_SDA21
;
3482 case BFD_RELOC_LO16
:
3484 reloc
= BFD_RELOC_PPC_VLE_LO16D
;
3485 else if (use_a_reloc
)
3486 reloc
= BFD_RELOC_PPC_VLE_LO16A
;
3489 case BFD_RELOC_HI16
:
3491 reloc
= BFD_RELOC_PPC_VLE_HI16D
;
3492 else if (use_a_reloc
)
3493 reloc
= BFD_RELOC_PPC_VLE_HI16A
;
3496 case BFD_RELOC_HI16_S
:
3498 reloc
= BFD_RELOC_PPC_VLE_HA16D
;
3499 else if (use_a_reloc
)
3500 reloc
= BFD_RELOC_PPC_VLE_HA16A
;
3503 case BFD_RELOC_PPC_VLE_SDAREL_LO16A
:
3505 reloc
= BFD_RELOC_PPC_VLE_SDAREL_LO16D
;
3508 case BFD_RELOC_PPC_VLE_SDAREL_HI16A
:
3510 reloc
= BFD_RELOC_PPC_VLE_SDAREL_HI16D
;
3513 case BFD_RELOC_PPC_VLE_SDAREL_HA16A
:
3515 reloc
= BFD_RELOC_PPC_VLE_SDAREL_HA16D
;
3520 /* TLS and other tweaks. */
3526 case BFD_RELOC_PPC_TLS
:
3527 case BFD_RELOC_PPC64_TLS_PCREL
:
3528 if (!_bfd_elf_ppc_at_tls_transform (opcode
->opcode
, 0))
3529 as_bad (_("@tls may not be used with \"%s\" operands"),
3531 else if (operand
->shift
!= 11)
3532 as_bad (_("@tls may only be used in last operand"));
3534 insn
= ppc_insert_operand (insn
, operand
,
3536 ppc_cpu
, (char *) NULL
, 0);
3539 /* We'll only use the 32 (or 64) bit form of these relocations
3540 in constants. Instructions get the 16 or 34 bit form. */
3541 case BFD_RELOC_PPC_DTPREL
:
3542 if (operand
->bitm
== 0x3ffffffffULL
)
3543 reloc
= BFD_RELOC_PPC64_DTPREL34
;
3545 reloc
= BFD_RELOC_PPC_DTPREL16
;
3548 case BFD_RELOC_PPC_TPREL
:
3549 if (operand
->bitm
== 0x3ffffffffULL
)
3550 reloc
= BFD_RELOC_PPC64_TPREL34
;
3552 reloc
= BFD_RELOC_PPC_TPREL16
;
3555 case BFD_RELOC_PPC64_PCREL34
:
3556 if (operand
->bitm
== 0xfffffffULL
)
3558 reloc
= BFD_RELOC_PPC64_PCREL28
;
3562 case BFD_RELOC_PPC64_GOT_PCREL34
:
3563 case BFD_RELOC_PPC64_PLT_PCREL34
:
3564 case BFD_RELOC_PPC64_GOT_TLSGD_PCREL34
:
3565 case BFD_RELOC_PPC64_GOT_TLSLD_PCREL34
:
3566 case BFD_RELOC_PPC64_GOT_TPREL_PCREL34
:
3567 case BFD_RELOC_PPC64_GOT_DTPREL_PCREL34
:
3568 if (operand
->bitm
!= 0x3ffffffffULL
3569 || (operand
->flags
& PPC_OPERAND_NEGATIVE
) != 0)
3570 as_warn (_("%s unsupported on this instruction"), "@pcrel");
3573 case BFD_RELOC_LO16
:
3574 if (operand
->bitm
== 0x3ffffffffULL
3575 && (operand
->flags
& PPC_OPERAND_NEGATIVE
) == 0)
3576 reloc
= BFD_RELOC_PPC64_D34_LO
;
3577 else if ((operand
->bitm
| 0xf) != 0xffff
3578 || operand
->shift
!= 0
3579 || (operand
->flags
& PPC_OPERAND_NEGATIVE
) != 0)
3580 as_warn (_("%s unsupported on this instruction"), "@l");
3583 case BFD_RELOC_HI16
:
3584 if (operand
->bitm
== 0x3ffffffffULL
3585 && (operand
->flags
& PPC_OPERAND_NEGATIVE
) == 0)
3586 reloc
= BFD_RELOC_PPC64_D34_HI30
;
3587 else if (operand
->bitm
!= 0xffff
3588 || operand
->shift
!= 0
3589 || (operand
->flags
& PPC_OPERAND_NEGATIVE
) != 0)
3590 as_warn (_("%s unsupported on this instruction"), "@h");
3593 case BFD_RELOC_HI16_S
:
3594 if (operand
->bitm
== 0x3ffffffffULL
3595 && (operand
->flags
& PPC_OPERAND_NEGATIVE
) == 0)
3596 reloc
= BFD_RELOC_PPC64_D34_HA30
;
3597 else if (operand
->bitm
== 0xffff
3598 && operand
->shift
== (int) PPC_OPSHIFT_INV
3599 && opcode
->opcode
== (19 << 26) + (2 << 1))
3601 reloc
= BFD_RELOC_PPC_16DX_HA
;
3602 else if (operand
->bitm
!= 0xffff
3603 || operand
->shift
!= 0
3604 || (operand
->flags
& PPC_OPERAND_NEGATIVE
) != 0)
3605 as_warn (_("%s unsupported on this instruction"), "@ha");
3608 #endif /* OBJ_ELF */
3610 if (reloc
!= BFD_RELOC_NONE
)
3612 /* Determine a BFD reloc value based on the operand information.
3613 We are only prepared to turn a few of the operands into
3615 else if ((operand
->flags
& (PPC_OPERAND_RELATIVE
3616 | PPC_OPERAND_ABSOLUTE
)) != 0
3617 && operand
->bitm
== 0x3fffffc
3618 && operand
->shift
== 0)
3619 reloc
= BFD_RELOC_PPC_B26
;
3620 else if ((operand
->flags
& (PPC_OPERAND_RELATIVE
3621 | PPC_OPERAND_ABSOLUTE
)) != 0
3622 && operand
->bitm
== 0xfffc
3623 && operand
->shift
== 0)
3624 reloc
= BFD_RELOC_PPC_B16
;
3625 else if ((operand
->flags
& PPC_OPERAND_RELATIVE
) != 0
3626 && operand
->bitm
== 0x1fe
3627 && operand
->shift
== -1)
3628 reloc
= BFD_RELOC_PPC_VLE_REL8
;
3629 else if ((operand
->flags
& PPC_OPERAND_RELATIVE
) != 0
3630 && operand
->bitm
== 0xfffe
3631 && operand
->shift
== 0)
3632 reloc
= BFD_RELOC_PPC_VLE_REL15
;
3633 else if ((operand
->flags
& PPC_OPERAND_RELATIVE
) != 0
3634 && operand
->bitm
== 0x1fffffe
3635 && operand
->shift
== 0)
3636 reloc
= BFD_RELOC_PPC_VLE_REL24
;
3637 else if ((operand
->flags
& PPC_OPERAND_NEGATIVE
) == 0
3638 && (operand
->bitm
& 0xfff0) == 0xfff0
3639 && operand
->shift
== 0)
3641 reloc
= BFD_RELOC_16
;
3642 #if defined OBJ_XCOFF || defined OBJ_ELF
3643 /* Note: the symbol may be not yet defined. */
3644 if ((operand
->flags
& PPC_OPERAND_PARENS
) != 0
3645 && ppc_is_toc_sym (ex
.X_add_symbol
))
3647 reloc
= BFD_RELOC_PPC_TOC16
;
3649 as_warn (_("assuming %s on symbol"),
3650 ppc_obj64
? "@toc" : "@xgot");
3655 else if (operand
->bitm
== 0x3ffffffffULL
)
3656 reloc
= BFD_RELOC_PPC64_D34
;
3657 else if (operand
->bitm
== 0xfffffffULL
)
3658 reloc
= BFD_RELOC_PPC64_D28
;
3660 /* For the absolute forms of branches, convert the PC
3661 relative form back into the absolute. */
3662 if ((operand
->flags
& PPC_OPERAND_ABSOLUTE
) != 0)
3666 case BFD_RELOC_PPC_B26
:
3667 reloc
= BFD_RELOC_PPC_BA26
;
3669 case BFD_RELOC_PPC_B16
:
3670 reloc
= BFD_RELOC_PPC_BA16
;
3673 case BFD_RELOC_PPC_B16_BRTAKEN
:
3674 reloc
= BFD_RELOC_PPC_BA16_BRTAKEN
;
3676 case BFD_RELOC_PPC_B16_BRNTAKEN
:
3677 reloc
= BFD_RELOC_PPC_BA16_BRNTAKEN
;
3688 case BFD_RELOC_PPC_TOC16
:
3689 toc_reloc_types
|= has_small_toc_reloc
;
3691 case BFD_RELOC_PPC64_TOC16_LO
:
3692 case BFD_RELOC_PPC64_TOC16_HI
:
3693 case BFD_RELOC_PPC64_TOC16_HA
:
3694 toc_reloc_types
|= has_large_toc_reloc
;
3701 && (operand
->flags
& (PPC_OPERAND_DS
| PPC_OPERAND_DQ
)) != 0)
3706 reloc
= BFD_RELOC_PPC64_ADDR16_DS
;
3709 case BFD_RELOC_LO16
:
3710 reloc
= BFD_RELOC_PPC64_ADDR16_LO_DS
;
3713 case BFD_RELOC_16_GOTOFF
:
3714 reloc
= BFD_RELOC_PPC64_GOT16_DS
;
3717 case BFD_RELOC_LO16_GOTOFF
:
3718 reloc
= BFD_RELOC_PPC64_GOT16_LO_DS
;
3721 case BFD_RELOC_LO16_PLTOFF
:
3722 reloc
= BFD_RELOC_PPC64_PLT16_LO_DS
;
3725 case BFD_RELOC_16_BASEREL
:
3726 reloc
= BFD_RELOC_PPC64_SECTOFF_DS
;
3729 case BFD_RELOC_LO16_BASEREL
:
3730 reloc
= BFD_RELOC_PPC64_SECTOFF_LO_DS
;
3733 case BFD_RELOC_PPC_TOC16
:
3734 reloc
= BFD_RELOC_PPC64_TOC16_DS
;
3737 case BFD_RELOC_PPC64_TOC16_LO
:
3738 reloc
= BFD_RELOC_PPC64_TOC16_LO_DS
;
3741 case BFD_RELOC_PPC64_PLTGOT16
:
3742 reloc
= BFD_RELOC_PPC64_PLTGOT16_DS
;
3745 case BFD_RELOC_PPC64_PLTGOT16_LO
:
3746 reloc
= BFD_RELOC_PPC64_PLTGOT16_LO_DS
;
3749 case BFD_RELOC_PPC_DTPREL16
:
3750 reloc
= BFD_RELOC_PPC64_DTPREL16_DS
;
3753 case BFD_RELOC_PPC_DTPREL16_LO
:
3754 reloc
= BFD_RELOC_PPC64_DTPREL16_LO_DS
;
3757 case BFD_RELOC_PPC_TPREL16
:
3758 reloc
= BFD_RELOC_PPC64_TPREL16_DS
;
3761 case BFD_RELOC_PPC_TPREL16_LO
:
3762 reloc
= BFD_RELOC_PPC64_TPREL16_LO_DS
;
3765 case BFD_RELOC_PPC_GOT_DTPREL16
:
3766 case BFD_RELOC_PPC_GOT_DTPREL16_LO
:
3767 case BFD_RELOC_PPC_GOT_TPREL16
:
3768 case BFD_RELOC_PPC_GOT_TPREL16_LO
:
3772 as_bad (_("unsupported relocation for DS offset field"));
3777 /* Look for a __tls_get_addr arg after any __tls_get_addr
3778 modifiers like @plt. This fixup must be emitted before
3779 the usual call fixup. */
3780 if (ex
.X_op
== O_symbol
&& *str
== '(' && fc
< MAX_INSN_FIXUPS
3781 && parse_tls_arg (&str
, &ex
, &fixups
[fc
]))
3783 fixups
[fc
].opindex
= *opindex_ptr
;
3788 /* We need to generate a fixup for this expression. */
3789 if (fc
>= MAX_INSN_FIXUPS
)
3790 as_fatal (_("too many fixups"));
3791 fixups
[fc
].exp
= ex
;
3792 fixups
[fc
].opindex
= *opindex_ptr
;
3793 fixups
[fc
].reloc
= reloc
;
3801 /* If expecting more operands, then we want to see "),". */
3802 if (*str
== endc
&& opindex_ptr
[1] != 0)
3806 while (ISSPACE (*str
));
3810 else if ((operand
->flags
& PPC_OPERAND_PARENS
) != 0)
3815 /* The call to expression should have advanced str past any
3823 else if (*str
!= '\0')
3825 as_bad (_("syntax error; found `%c', expected `%c'"), *str
, endc
);
3828 else if (endc
== ')')
3830 as_bad (_("syntax error; end of line, expected `%c'"), endc
);
3835 while (ISSPACE (*str
))
3839 as_bad (_("junk at end of line: `%s'"), str
);
3842 /* Do we need/want an APUinfo section? */
3843 if ((ppc_cpu
& (PPC_OPCODE_E500
| PPC_OPCODE_E500MC
| PPC_OPCODE_VLE
)) != 0
3846 /* These are all version "1". */
3847 if (opcode
->flags
& PPC_OPCODE_SPE
)
3848 ppc_apuinfo_section_add (PPC_APUINFO_SPE
, 1);
3849 if (opcode
->flags
& PPC_OPCODE_ISEL
)
3850 ppc_apuinfo_section_add (PPC_APUINFO_ISEL
, 1);
3851 if (opcode
->flags
& PPC_OPCODE_EFS
)
3852 ppc_apuinfo_section_add (PPC_APUINFO_EFS
, 1);
3853 if (opcode
->flags
& PPC_OPCODE_BRLOCK
)
3854 ppc_apuinfo_section_add (PPC_APUINFO_BRLOCK
, 1);
3855 if (opcode
->flags
& PPC_OPCODE_PMR
)
3856 ppc_apuinfo_section_add (PPC_APUINFO_PMR
, 1);
3857 if (opcode
->flags
& PPC_OPCODE_CACHELCK
)
3858 ppc_apuinfo_section_add (PPC_APUINFO_CACHELCK
, 1);
3859 if (opcode
->flags
& PPC_OPCODE_RFMCI
)
3860 ppc_apuinfo_section_add (PPC_APUINFO_RFMCI
, 1);
3861 /* Only set the VLE flag if the instruction has been pulled via
3862 the VLE instruction set. This way the flag is guaranteed to
3863 be set for VLE-only instructions or for VLE-only processors,
3864 however it'll remain clear for dual-mode instructions on
3865 dual-mode and, more importantly, standard-mode processors. */
3866 if ((ppc_cpu
& opcode
->flags
) == PPC_OPCODE_VLE
)
3868 ppc_apuinfo_section_add (PPC_APUINFO_VLE
, 1);
3869 if (elf_section_data (now_seg
) != NULL
)
3870 elf_section_data (now_seg
)->this_hdr
.sh_flags
|= SHF_PPC_VLE
;
3875 /* Write out the instruction. */
3878 if ((ppc_cpu
& PPC_OPCODE_VLE
) != 0)
3879 /* All instructions can start on a 2 byte boundary for VLE. */
3882 if (frag_now
->insn_addr
!= addr_mask
)
3884 /* Don't emit instructions to a frag started for data, or for a
3885 CPU differing in VLE mode. Data is allowed to be misaligned,
3886 and it's possible to start a new frag in the middle of
3888 frag_wane (frag_now
);
3892 /* Check that insns within the frag are aligned. ppc_frag_check
3893 will ensure that the frag start address is aligned. */
3894 if ((frag_now_fix () & addr_mask
) != 0)
3895 as_bad (_("instruction address is not a multiple of %d"), addr_mask
+ 1);
3897 /* Differentiate between two, four, and eight byte insns. */
3899 if ((ppc_cpu
& PPC_OPCODE_VLE
) != 0 && PPC_OP_SE_VLE (insn
))
3901 else if ((opcode
->flags
& PPC_OPCODE_POWER10
) != 0
3902 && PPC_PREFIX_P (insn
))
3904 struct insn_label_list
*l
;
3908 /* 8-byte prefix instructions are not allowed to cross 64-byte
3910 frag_align_code (6, 4);
3911 record_alignment (now_seg
, 6);
3913 /* Update "dot" in any expressions used by this instruction, and
3914 a label attached to the instruction. By "attached" we mean
3915 on the same source line as the instruction and without any
3916 intervening semicolons. */
3917 dot_value
= frag_now_fix ();
3918 dot_frag
= frag_now
;
3919 for (l
= insn_labels
; l
!= NULL
; l
= l
->next
)
3921 symbol_set_frag (l
->label
, dot_frag
);
3922 S_SET_VALUE (l
->label
, dot_value
);
3926 ppc_clear_labels ();
3928 f
= frag_more (insn_length
);
3929 frag_now
->insn_addr
= addr_mask
;
3931 /* The prefix part of an 8-byte instruction always occupies the lower
3932 addressed word in a doubleword, regardless of endianness. */
3933 if (insn_length
== 8
3934 && (sizeof (insn
) > sizeof (valueT
) || !target_big_endian
))
3936 md_number_to_chars (f
, PPC_GET_PREFIX (insn
), 4);
3937 md_number_to_chars (f
+ 4, PPC_GET_SUFFIX (insn
), 4);
3940 md_number_to_chars (f
, insn
, insn_length
);
3944 last_subseg
= now_subseg
;
3947 dwarf2_emit_insn (insn_length
);
3950 /* Create any fixups. */
3951 for (i
= 0; i
< fc
; i
++)
3954 if (fixups
[i
].reloc
!= BFD_RELOC_NONE
)
3957 unsigned int size
= fixup_size (fixups
[i
].reloc
, &pcrel
);
3958 int offset
= target_big_endian
? (insn_length
- size
) : 0;
3960 fixP
= fix_new_exp (frag_now
,
3961 f
- frag_now
->fr_literal
+ offset
,
3969 const struct powerpc_operand
*operand
;
3971 operand
= &powerpc_operands
[fixups
[i
].opindex
];
3972 fixP
= fix_new_exp (frag_now
,
3973 f
- frag_now
->fr_literal
,
3976 (operand
->flags
& PPC_OPERAND_RELATIVE
) != 0,
3979 fixP
->fx_pcrel_adjust
= fixups
[i
].opindex
;
3983 /* Handle a macro. Gather all the operands, transform them as
3984 described by the macro, and call md_assemble recursively. All the
3985 operands are separated by commas; we don't accept parentheses
3986 around operands here. */
3989 ppc_macro (char *str
, const struct powerpc_macro
*macro
)
4000 /* Gather the users operands into the operands array. */
4005 if (count
>= sizeof operands
/ sizeof operands
[0])
4007 operands
[count
++] = s
;
4008 s
= strchr (s
, ',');
4009 if (s
== (char *) NULL
)
4014 if (count
!= macro
->operands
)
4016 as_bad (_("wrong number of operands"));
4020 /* Work out how large the string must be (the size is unbounded
4021 because it includes user input). */
4023 format
= macro
->format
;
4024 while (*format
!= '\0')
4033 arg
= strtol (format
+ 1, &send
, 10);
4034 know (send
!= format
&& arg
< count
);
4035 len
+= strlen (operands
[arg
]);
4040 /* Put the string together. */
4041 complete
= s
= XNEWVEC (char, len
+ 1);
4042 format
= macro
->format
;
4043 while (*format
!= '\0')
4049 arg
= strtol (format
+ 1, &send
, 10);
4050 strcpy (s
, operands
[arg
]);
4057 /* Assemble the constructed instruction. */
4058 md_assemble (complete
);
4063 /* For ELF, add support for SHT_ORDERED. */
4066 ppc_section_type (char *str
, size_t len
)
4068 if (len
== 7 && strncmp (str
, "ordered", 7) == 0)
4075 ppc_section_flags (flagword flags
, bfd_vma attr ATTRIBUTE_UNUSED
, int type
)
4077 if (type
== SHT_ORDERED
)
4078 flags
|= SEC_ALLOC
| SEC_LOAD
| SEC_SORT_ENTRIES
;
4084 ppc_elf_section_letter (int letter
, const char **ptrmsg
)
4089 *ptrmsg
= _("bad .section directive: want a,e,v,w,x,M,S,G,T in string");
4092 #endif /* OBJ_ELF */
4095 /* Pseudo-op handling. */
4097 /* The .byte pseudo-op. This is similar to the normal .byte
4098 pseudo-op, but it can also take a single ASCII string. */
4101 ppc_byte (int ignore ATTRIBUTE_UNUSED
)
4105 if (*input_line_pointer
!= '\"')
4111 /* Gather characters. A real double quote is doubled. Unusual
4112 characters are not permitted. */
4113 ++input_line_pointer
;
4118 c
= *input_line_pointer
++;
4122 if (*input_line_pointer
!= '\"')
4124 ++input_line_pointer
;
4127 FRAG_APPEND_1_CHAR (c
);
4131 if (warn_476
&& count
!= 0 && (now_seg
->flags
& SEC_CODE
) != 0)
4132 as_warn (_("data in executable section"));
4133 demand_empty_rest_of_line ();
4138 /* XCOFF specific pseudo-op handling. */
4140 /* This is set if we are creating a .stabx symbol, since we don't want
4141 to handle symbol suffixes for such symbols. */
4142 static bfd_boolean ppc_stab_symbol
;
4144 /* The .comm and .lcomm pseudo-ops for XCOFF. XCOFF puts common
4145 symbols in the .bss segment as though they were local common
4146 symbols, and uses a different smclas. The native Aix 4.3.3 assembler
4147 aligns .comm and .lcomm to 4 bytes. */
4150 ppc_comm (int lcomm
)
4152 asection
*current_seg
= now_seg
;
4153 subsegT current_subseg
= now_subseg
;
4159 symbolS
*lcomm_sym
= NULL
;
4163 endc
= get_symbol_name (&name
);
4164 end_name
= input_line_pointer
;
4165 (void) restore_line_pointer (endc
);
4167 if (*input_line_pointer
!= ',')
4169 as_bad (_("missing size"));
4170 ignore_rest_of_line ();
4173 ++input_line_pointer
;
4175 size
= get_absolute_expression ();
4178 as_bad (_("negative size"));
4179 ignore_rest_of_line ();
4185 /* The third argument to .comm is the alignment. */
4186 if (*input_line_pointer
!= ',')
4190 ++input_line_pointer
;
4191 align
= get_absolute_expression ();
4194 as_warn (_("ignoring bad alignment"));
4204 /* The third argument to .lcomm appears to be the real local
4205 common symbol to create. References to the symbol named in
4206 the first argument are turned into references to the third
4208 if (*input_line_pointer
!= ',')
4210 as_bad (_("missing real symbol name"));
4211 ignore_rest_of_line ();
4214 ++input_line_pointer
;
4216 lcomm_endc
= get_symbol_name (&lcomm_name
);
4218 lcomm_sym
= symbol_find_or_make (lcomm_name
);
4220 (void) restore_line_pointer (lcomm_endc
);
4222 /* The fourth argument to .lcomm is the alignment. */
4223 if (*input_line_pointer
!= ',')
4232 ++input_line_pointer
;
4233 align
= get_absolute_expression ();
4236 as_warn (_("ignoring bad alignment"));
4243 sym
= symbol_find_or_make (name
);
4246 if (S_IS_DEFINED (sym
)
4247 || S_GET_VALUE (sym
) != 0)
4249 as_bad (_("attempt to redefine symbol"));
4250 ignore_rest_of_line ();
4254 record_alignment (bss_section
, align
);
4257 || ! S_IS_DEFINED (lcomm_sym
))
4266 S_SET_EXTERNAL (sym
);
4270 symbol_get_tc (lcomm_sym
)->output
= 1;
4271 def_sym
= lcomm_sym
;
4275 subseg_set (bss_section
, 1);
4276 frag_align (align
, 0, 0);
4278 symbol_set_frag (def_sym
, frag_now
);
4279 pfrag
= frag_var (rs_org
, 1, 1, (relax_substateT
) 0, def_sym
,
4280 def_size
, (char *) NULL
);
4282 S_SET_SEGMENT (def_sym
, bss_section
);
4283 symbol_get_tc (def_sym
)->align
= align
;
4287 /* Align the size of lcomm_sym. */
4288 symbol_get_frag (lcomm_sym
)->fr_offset
=
4289 ((symbol_get_frag (lcomm_sym
)->fr_offset
+ (1 << align
) - 1)
4290 &~ ((1 << align
) - 1));
4291 if (align
> symbol_get_tc (lcomm_sym
)->align
)
4292 symbol_get_tc (lcomm_sym
)->align
= align
;
4297 /* Make sym an offset from lcomm_sym. */
4298 S_SET_SEGMENT (sym
, bss_section
);
4299 symbol_set_frag (sym
, symbol_get_frag (lcomm_sym
));
4300 S_SET_VALUE (sym
, symbol_get_frag (lcomm_sym
)->fr_offset
);
4301 symbol_get_frag (lcomm_sym
)->fr_offset
+= size
;
4304 subseg_set (current_seg
, current_subseg
);
4306 demand_empty_rest_of_line ();
4309 /* The .csect pseudo-op. This switches us into a different
4310 subsegment. The first argument is a symbol whose value is the
4311 start of the .csect. In COFF, csect symbols get special aux
4312 entries defined by the x_csect field of union internal_auxent. The
4313 optional second argument is the alignment (the default is 2). */
4316 ppc_csect (int ignore ATTRIBUTE_UNUSED
)
4323 endc
= get_symbol_name (&name
);
4325 sym
= symbol_find_or_make (name
);
4327 (void) restore_line_pointer (endc
);
4329 if (S_GET_NAME (sym
)[0] == '\0')
4331 /* An unnamed csect is assumed to be [PR]. */
4332 symbol_get_tc (sym
)->symbol_class
= XMC_PR
;
4336 if (*input_line_pointer
== ',')
4338 ++input_line_pointer
;
4339 align
= get_absolute_expression ();
4342 ppc_change_csect (sym
, align
);
4344 demand_empty_rest_of_line ();
4347 /* Change to a different csect. */
4350 ppc_change_csect (symbolS
*sym
, offsetT align
)
4352 if (S_IS_DEFINED (sym
))
4353 subseg_set (S_GET_SEGMENT (sym
), symbol_get_tc (sym
)->subseg
);
4363 /* This is a new csect. We need to look at the symbol class to
4364 figure out whether it should go in the text section or the
4368 switch (symbol_get_tc (sym
)->symbol_class
)
4378 S_SET_SEGMENT (sym
, text_section
);
4379 symbol_get_tc (sym
)->subseg
= ppc_text_subsegment
;
4380 ++ppc_text_subsegment
;
4381 list_ptr
= &ppc_text_csects
;
4391 if (ppc_toc_csect
!= NULL
4392 && (symbol_get_tc (ppc_toc_csect
)->subseg
+ 1
4393 == ppc_data_subsegment
))
4395 S_SET_SEGMENT (sym
, data_section
);
4396 symbol_get_tc (sym
)->subseg
= ppc_data_subsegment
;
4397 ++ppc_data_subsegment
;
4398 list_ptr
= &ppc_data_csects
;
4404 /* We set the obstack chunk size to a small value before
4405 changing subsegments, so that we don't use a lot of memory
4406 space for what may be a small section. */
4407 hold_chunksize
= chunksize
;
4410 sec
= subseg_new (segment_name (S_GET_SEGMENT (sym
)),
4411 symbol_get_tc (sym
)->subseg
);
4413 chunksize
= hold_chunksize
;
4416 ppc_after_toc_frag
= frag_now
;
4418 record_alignment (sec
, align
);
4420 frag_align_code (align
, 0);
4422 frag_align (align
, 0, 0);
4424 symbol_set_frag (sym
, frag_now
);
4425 S_SET_VALUE (sym
, (valueT
) frag_now_fix ());
4427 symbol_get_tc (sym
)->align
= align
;
4428 symbol_get_tc (sym
)->output
= 1;
4429 symbol_get_tc (sym
)->within
= sym
;
4431 for (list
= *list_ptr
;
4432 symbol_get_tc (list
)->next
!= (symbolS
*) NULL
;
4433 list
= symbol_get_tc (list
)->next
)
4435 symbol_get_tc (list
)->next
= sym
;
4437 symbol_remove (sym
, &symbol_rootP
, &symbol_lastP
);
4438 symbol_append (sym
, symbol_get_tc (list
)->within
, &symbol_rootP
,
4442 ppc_current_csect
= sym
;
4446 ppc_change_debug_section (unsigned int idx
, subsegT subseg
)
4450 const struct xcoff_dwsect_name
*dw
= &xcoff_dwsect_names
[idx
];
4452 sec
= subseg_new (dw
->name
, subseg
);
4453 oldflags
= bfd_section_flags (sec
);
4454 if (oldflags
== SEC_NO_FLAGS
)
4456 /* Just created section. */
4457 gas_assert (dw_sections
[idx
].sect
== NULL
);
4459 bfd_set_section_flags (sec
, SEC_DEBUGGING
);
4460 bfd_set_section_alignment (sec
, 0);
4461 dw_sections
[idx
].sect
= sec
;
4464 /* Not anymore in a csect. */
4465 ppc_current_csect
= NULL
;
4468 /* The .dwsect pseudo-op. Defines a DWARF section. Syntax is:
4469 .dwsect flag [, opt-label ]
4473 ppc_dwsect (int ignore ATTRIBUTE_UNUSED
)
4477 const struct xcoff_dwsect_name
*dw
;
4478 struct dw_subsection
*subseg
;
4479 struct dw_section
*dws
;
4483 flag
= get_absolute_expression ();
4485 for (i
= 0; i
< XCOFF_DWSECT_NBR_NAMES
; i
++)
4486 if (xcoff_dwsect_names
[i
].flag
== flag
)
4488 dw
= &xcoff_dwsect_names
[i
];
4492 /* Parse opt-label. */
4493 if (*input_line_pointer
== ',')
4498 ++input_line_pointer
;
4500 c
= get_symbol_name (&label
);
4501 opt_label
= symbol_find_or_make (label
);
4502 (void) restore_line_pointer (c
);
4507 demand_empty_rest_of_line ();
4509 /* Return now in case of unknown subsection. */
4512 as_bad (_("no known dwarf XCOFF section for flag 0x%08x\n"),
4517 /* Find the subsection. */
4518 dws
= &dw_sections
[i
];
4520 if (opt_label
!= NULL
&& S_IS_DEFINED (opt_label
))
4522 /* Sanity check (note that in theory S_GET_SEGMENT mustn't be null). */
4523 if (dws
->sect
== NULL
|| S_GET_SEGMENT (opt_label
) != dws
->sect
)
4525 as_bad (_("label %s was not defined in this dwarf section"),
4526 S_GET_NAME (opt_label
));
4527 subseg
= dws
->anon_subseg
;
4531 subseg
= symbol_get_tc (opt_label
)->u
.dw
;
4536 /* Switch to the subsection. */
4537 ppc_change_debug_section (i
, subseg
->subseg
);
4541 /* Create a new dw subsection. */
4542 subseg
= XNEW (struct dw_subsection
);
4544 if (opt_label
== NULL
)
4546 /* The anonymous one. */
4548 subseg
->link
= NULL
;
4549 dws
->anon_subseg
= subseg
;
4554 if (dws
->list_subseg
!= NULL
)
4555 subseg
->subseg
= dws
->list_subseg
->subseg
+ 1;
4559 subseg
->link
= dws
->list_subseg
;
4560 dws
->list_subseg
= subseg
;
4561 symbol_get_tc (opt_label
)->u
.dw
= subseg
;
4564 ppc_change_debug_section (i
, subseg
->subseg
);
4568 /* Add the length field. */
4569 expressionS
*exp
= &subseg
->end_exp
;
4572 if (opt_label
!= NULL
)
4573 symbol_set_value_now (opt_label
);
4575 /* Add the length field. Note that according to the AIX assembler
4576 manual, the size of the length field is 4 for powerpc32 but
4577 12 for powerpc64. */
4580 /* Write the 64bit marker. */
4581 md_number_to_chars (frag_more (4), -1, 4);
4584 exp
->X_op
= O_subtract
;
4585 exp
->X_op_symbol
= symbol_temp_new_now ();
4586 exp
->X_add_symbol
= symbol_temp_make ();
4588 sz
= ppc_obj64
? 8 : 4;
4589 exp
->X_add_number
= -sz
;
4590 emit_expr (exp
, sz
);
4595 /* This function handles the .text and .data pseudo-ops. These
4596 pseudo-ops aren't really used by XCOFF; we implement them for the
4597 convenience of people who aren't used to XCOFF. */
4600 ppc_section (int type
)
4607 else if (type
== 'd')
4612 sym
= symbol_find_or_make (name
);
4614 ppc_change_csect (sym
, 2);
4616 demand_empty_rest_of_line ();
4619 /* This function handles the .section pseudo-op. This is mostly to
4620 give an error, since XCOFF only supports .text, .data and .bss, but
4621 we do permit the user to name the text or data section. */
4624 ppc_named_section (int ignore ATTRIBUTE_UNUSED
)
4627 const char *real_name
;
4631 c
= get_symbol_name (&user_name
);
4633 if (strcmp (user_name
, ".text") == 0)
4634 real_name
= ".text[PR]";
4635 else if (strcmp (user_name
, ".data") == 0)
4636 real_name
= ".data[RW]";
4639 as_bad (_("the XCOFF file format does not support arbitrary sections"));
4640 (void) restore_line_pointer (c
);
4641 ignore_rest_of_line ();
4645 (void) restore_line_pointer (c
);
4647 sym
= symbol_find_or_make (real_name
);
4649 ppc_change_csect (sym
, 2);
4651 demand_empty_rest_of_line ();
4654 /* The .extern pseudo-op. We create an undefined symbol. */
4657 ppc_extern (int ignore ATTRIBUTE_UNUSED
)
4662 endc
= get_symbol_name (&name
);
4664 (void) symbol_find_or_make (name
);
4666 (void) restore_line_pointer (endc
);
4668 demand_empty_rest_of_line ();
4671 /* The .lglobl pseudo-op. Keep the symbol in the symbol table. */
4674 ppc_lglobl (int ignore ATTRIBUTE_UNUSED
)
4680 endc
= get_symbol_name (&name
);
4682 sym
= symbol_find_or_make (name
);
4684 (void) restore_line_pointer (endc
);
4686 symbol_get_tc (sym
)->output
= 1;
4688 demand_empty_rest_of_line ();
4691 /* The .ref pseudo-op. It takes a list of symbol names and inserts R_REF
4692 relocations at the beginning of the current csect.
4694 (In principle, there's no reason why the relocations _have_ to be at
4695 the beginning. Anywhere in the csect would do. However, inserting
4696 at the beginning is what the native assembler does, and it helps to
4697 deal with cases where the .ref statements follow the section contents.)
4699 ??? .refs don't work for empty .csects. However, the native assembler
4700 doesn't report an error in this case, and neither yet do we. */
4703 ppc_ref (int ignore ATTRIBUTE_UNUSED
)
4708 if (ppc_current_csect
== NULL
)
4710 as_bad (_(".ref outside .csect"));
4711 ignore_rest_of_line ();
4717 c
= get_symbol_name (&name
);
4719 fix_at_start (symbol_get_frag (ppc_current_csect
), 0,
4720 symbol_find_or_make (name
), 0, FALSE
, BFD_RELOC_NONE
);
4722 *input_line_pointer
= c
;
4723 SKIP_WHITESPACE_AFTER_NAME ();
4724 c
= *input_line_pointer
;
4727 input_line_pointer
++;
4729 if (is_end_of_line
[(unsigned char) *input_line_pointer
])
4731 as_bad (_("missing symbol name"));
4732 ignore_rest_of_line ();
4739 demand_empty_rest_of_line ();
4742 /* The .rename pseudo-op. The RS/6000 assembler can rename symbols,
4743 although I don't know why it bothers. */
4746 ppc_rename (int ignore ATTRIBUTE_UNUSED
)
4753 endc
= get_symbol_name (&name
);
4755 sym
= symbol_find_or_make (name
);
4757 (void) restore_line_pointer (endc
);
4759 if (*input_line_pointer
!= ',')
4761 as_bad (_("missing rename string"));
4762 ignore_rest_of_line ();
4765 ++input_line_pointer
;
4767 symbol_get_tc (sym
)->real_name
= demand_copy_C_string (&len
);
4769 demand_empty_rest_of_line ();
4772 /* The .stabx pseudo-op. This is similar to a normal .stabs
4773 pseudo-op, but slightly different. A sample is
4774 .stabx "main:F-1",.main,142,0
4775 The first argument is the symbol name to create. The second is the
4776 value, and the third is the storage class. The fourth seems to be
4777 always zero, and I am assuming it is the type. */
4780 ppc_stabx (int ignore ATTRIBUTE_UNUSED
)
4787 name
= demand_copy_C_string (&len
);
4789 if (*input_line_pointer
!= ',')
4791 as_bad (_("missing value"));
4794 ++input_line_pointer
;
4796 ppc_stab_symbol
= TRUE
;
4797 sym
= symbol_make (name
);
4798 ppc_stab_symbol
= FALSE
;
4800 symbol_get_tc (sym
)->real_name
= name
;
4802 (void) expression (&exp
);
4809 as_bad (_("illegal .stabx expression; zero assumed"));
4810 exp
.X_add_number
= 0;
4813 S_SET_VALUE (sym
, (valueT
) exp
.X_add_number
);
4814 symbol_set_frag (sym
, &zero_address_frag
);
4818 if (S_GET_SEGMENT (exp
.X_add_symbol
) == undefined_section
)
4819 symbol_set_value_expression (sym
, &exp
);
4823 exp
.X_add_number
+ S_GET_VALUE (exp
.X_add_symbol
));
4824 symbol_set_frag (sym
, symbol_get_frag (exp
.X_add_symbol
));
4829 /* The value is some complex expression. This will probably
4830 fail at some later point, but this is probably the right
4831 thing to do here. */
4832 symbol_set_value_expression (sym
, &exp
);
4836 S_SET_SEGMENT (sym
, ppc_coff_debug_section
);
4837 symbol_get_bfdsym (sym
)->flags
|= BSF_DEBUGGING
;
4839 if (*input_line_pointer
!= ',')
4841 as_bad (_("missing class"));
4844 ++input_line_pointer
;
4846 S_SET_STORAGE_CLASS (sym
, get_absolute_expression ());
4848 if (*input_line_pointer
!= ',')
4850 as_bad (_("missing type"));
4853 ++input_line_pointer
;
4855 S_SET_DATA_TYPE (sym
, get_absolute_expression ());
4857 symbol_get_tc (sym
)->output
= 1;
4859 if (S_GET_STORAGE_CLASS (sym
) == C_STSYM
)
4864 .stabx "z",arrays_,133,0
4867 .comm arrays_,13768,3
4869 resolve_symbol_value will copy the exp's "within" into sym's when the
4870 offset is 0. Since this seems to be corner case problem,
4871 only do the correction for storage class C_STSYM. A better solution
4872 would be to have the tc field updated in ppc_symbol_new_hook. */
4874 if (exp
.X_op
== O_symbol
)
4876 if (ppc_current_block
== NULL
)
4877 as_bad (_(".stabx of storage class stsym must be within .bs/.es"));
4879 symbol_get_tc (sym
)->within
= ppc_current_block
;
4880 symbol_get_tc (exp
.X_add_symbol
)->within
= ppc_current_block
;
4884 if (exp
.X_op
!= O_symbol
4885 || ! S_IS_EXTERNAL (exp
.X_add_symbol
)
4886 || S_GET_SEGMENT (exp
.X_add_symbol
) != bss_section
)
4887 ppc_frob_label (sym
);
4890 symbol_remove (sym
, &symbol_rootP
, &symbol_lastP
);
4891 symbol_append (sym
, exp
.X_add_symbol
, &symbol_rootP
, &symbol_lastP
);
4892 if (symbol_get_tc (ppc_current_csect
)->within
== exp
.X_add_symbol
)
4893 symbol_get_tc (ppc_current_csect
)->within
= sym
;
4896 demand_empty_rest_of_line ();
4899 /* The .function pseudo-op. This takes several arguments. The first
4900 argument seems to be the external name of the symbol. The second
4901 argument seems to be the label for the start of the function. gcc
4902 uses the same name for both. I have no idea what the third and
4903 fourth arguments are meant to be. The optional fifth argument is
4904 an expression for the size of the function. In COFF this symbol
4905 gets an aux entry like that used for a csect. */
4908 ppc_function (int ignore ATTRIBUTE_UNUSED
)
4916 endc
= get_symbol_name (&name
);
4918 /* Ignore any [PR] suffix. */
4919 name
= ppc_canonicalize_symbol_name (name
);
4920 s
= strchr (name
, '[');
4921 if (s
!= (char *) NULL
4922 && strcmp (s
+ 1, "PR]") == 0)
4925 ext_sym
= symbol_find_or_make (name
);
4927 (void) restore_line_pointer (endc
);
4929 if (*input_line_pointer
!= ',')
4931 as_bad (_("missing symbol name"));
4932 ignore_rest_of_line ();
4935 ++input_line_pointer
;
4937 endc
= get_symbol_name (&name
);
4939 lab_sym
= symbol_find_or_make (name
);
4941 (void) restore_line_pointer (endc
);
4943 if (ext_sym
!= lab_sym
)
4947 exp
.X_op
= O_symbol
;
4948 exp
.X_add_symbol
= lab_sym
;
4949 exp
.X_op_symbol
= NULL
;
4950 exp
.X_add_number
= 0;
4952 symbol_set_value_expression (ext_sym
, &exp
);
4955 if (symbol_get_tc (ext_sym
)->symbol_class
== -1)
4956 symbol_get_tc (ext_sym
)->symbol_class
= XMC_PR
;
4957 symbol_get_tc (ext_sym
)->output
= 1;
4959 if (*input_line_pointer
== ',')
4963 /* Ignore the third argument. */
4964 ++input_line_pointer
;
4966 if (*input_line_pointer
== ',')
4968 /* Ignore the fourth argument. */
4969 ++input_line_pointer
;
4971 if (*input_line_pointer
== ',')
4973 /* The fifth argument is the function size. */
4974 ++input_line_pointer
;
4975 symbol_get_tc (ext_sym
)->u
.size
4976 = symbol_new ("L0\001", absolute_section
,
4977 &zero_address_frag
, 0);
4978 pseudo_set (symbol_get_tc (ext_sym
)->u
.size
);
4983 S_SET_DATA_TYPE (ext_sym
, DT_FCN
<< N_BTSHFT
);
4984 SF_SET_FUNCTION (ext_sym
);
4985 SF_SET_PROCESS (ext_sym
);
4986 coff_add_linesym (ext_sym
);
4988 demand_empty_rest_of_line ();
4991 /* The .bf pseudo-op. This is just like a COFF C_FCN symbol named
4992 ".bf". If the pseudo op .bi was seen before .bf, patch the .bi sym
4993 with the correct line number */
4995 static symbolS
*saved_bi_sym
= 0;
4998 ppc_bf (int ignore ATTRIBUTE_UNUSED
)
5002 sym
= symbol_make (".bf");
5003 S_SET_SEGMENT (sym
, text_section
);
5004 symbol_set_frag (sym
, frag_now
);
5005 S_SET_VALUE (sym
, frag_now_fix ());
5006 S_SET_STORAGE_CLASS (sym
, C_FCN
);
5008 coff_line_base
= get_absolute_expression ();
5010 S_SET_NUMBER_AUXILIARY (sym
, 1);
5011 SA_SET_SYM_LNNO (sym
, coff_line_base
);
5013 /* Line number for bi. */
5016 S_SET_VALUE (saved_bi_sym
, coff_n_line_nos
);
5021 symbol_get_tc (sym
)->output
= 1;
5023 ppc_frob_label (sym
);
5025 demand_empty_rest_of_line ();
5028 /* The .ef pseudo-op. This is just like a COFF C_FCN symbol named
5029 ".ef", except that the line number is absolute, not relative to the
5030 most recent ".bf" symbol. */
5033 ppc_ef (int ignore ATTRIBUTE_UNUSED
)
5037 sym
= symbol_make (".ef");
5038 S_SET_SEGMENT (sym
, text_section
);
5039 symbol_set_frag (sym
, frag_now
);
5040 S_SET_VALUE (sym
, frag_now_fix ());
5041 S_SET_STORAGE_CLASS (sym
, C_FCN
);
5042 S_SET_NUMBER_AUXILIARY (sym
, 1);
5043 SA_SET_SYM_LNNO (sym
, get_absolute_expression ());
5044 symbol_get_tc (sym
)->output
= 1;
5046 ppc_frob_label (sym
);
5048 demand_empty_rest_of_line ();
5051 /* The .bi and .ei pseudo-ops. These take a string argument and
5052 generates a C_BINCL or C_EINCL symbol, which goes at the start of
5053 the symbol list. The value of .bi will be know when the next .bf
5059 static symbolS
*last_biei
;
5066 name
= demand_copy_C_string (&len
);
5068 /* The value of these symbols is actually file offset. Here we set
5069 the value to the index into the line number entries. In
5070 ppc_frob_symbols we set the fix_line field, which will cause BFD
5071 to do the right thing. */
5073 sym
= symbol_make (name
);
5074 /* obj-coff.c currently only handles line numbers correctly in the
5076 S_SET_SEGMENT (sym
, text_section
);
5077 S_SET_VALUE (sym
, coff_n_line_nos
);
5078 symbol_get_bfdsym (sym
)->flags
|= BSF_DEBUGGING
;
5080 S_SET_STORAGE_CLASS (sym
, ei
? C_EINCL
: C_BINCL
);
5081 symbol_get_tc (sym
)->output
= 1;
5089 for (look
= last_biei
? last_biei
: symbol_rootP
;
5090 (look
!= (symbolS
*) NULL
5091 && (S_GET_STORAGE_CLASS (look
) == C_FILE
5092 || S_GET_STORAGE_CLASS (look
) == C_BINCL
5093 || S_GET_STORAGE_CLASS (look
) == C_EINCL
));
5094 look
= symbol_next (look
))
5096 if (look
!= (symbolS
*) NULL
)
5098 symbol_remove (sym
, &symbol_rootP
, &symbol_lastP
);
5099 symbol_insert (sym
, look
, &symbol_rootP
, &symbol_lastP
);
5103 demand_empty_rest_of_line ();
5106 /* The .bs pseudo-op. This generates a C_BSTAT symbol named ".bs".
5107 There is one argument, which is a csect symbol. The value of the
5108 .bs symbol is the index of this csect symbol. */
5111 ppc_bs (int ignore ATTRIBUTE_UNUSED
)
5118 if (ppc_current_block
!= NULL
)
5119 as_bad (_("nested .bs blocks"));
5121 endc
= get_symbol_name (&name
);
5123 csect
= symbol_find_or_make (name
);
5125 (void) restore_line_pointer (endc
);
5127 sym
= symbol_make (".bs");
5128 S_SET_SEGMENT (sym
, now_seg
);
5129 S_SET_STORAGE_CLASS (sym
, C_BSTAT
);
5130 symbol_get_bfdsym (sym
)->flags
|= BSF_DEBUGGING
;
5131 symbol_get_tc (sym
)->output
= 1;
5133 symbol_get_tc (sym
)->within
= csect
;
5135 ppc_frob_label (sym
);
5137 ppc_current_block
= sym
;
5139 demand_empty_rest_of_line ();
5142 /* The .es pseudo-op. Generate a C_ESTART symbol named .es. */
5145 ppc_es (int ignore ATTRIBUTE_UNUSED
)
5149 if (ppc_current_block
== NULL
)
5150 as_bad (_(".es without preceding .bs"));
5152 sym
= symbol_make (".es");
5153 S_SET_SEGMENT (sym
, now_seg
);
5154 S_SET_STORAGE_CLASS (sym
, C_ESTAT
);
5155 symbol_get_bfdsym (sym
)->flags
|= BSF_DEBUGGING
;
5156 symbol_get_tc (sym
)->output
= 1;
5158 ppc_frob_label (sym
);
5160 ppc_current_block
= NULL
;
5162 demand_empty_rest_of_line ();
5165 /* The .bb pseudo-op. Generate a C_BLOCK symbol named .bb, with a
5169 ppc_bb (int ignore ATTRIBUTE_UNUSED
)
5173 sym
= symbol_make (".bb");
5174 S_SET_SEGMENT (sym
, text_section
);
5175 symbol_set_frag (sym
, frag_now
);
5176 S_SET_VALUE (sym
, frag_now_fix ());
5177 S_SET_STORAGE_CLASS (sym
, C_BLOCK
);
5179 S_SET_NUMBER_AUXILIARY (sym
, 1);
5180 SA_SET_SYM_LNNO (sym
, get_absolute_expression ());
5182 symbol_get_tc (sym
)->output
= 1;
5184 SF_SET_PROCESS (sym
);
5186 ppc_frob_label (sym
);
5188 demand_empty_rest_of_line ();
5191 /* The .eb pseudo-op. Generate a C_BLOCK symbol named .eb, with a
5195 ppc_eb (int ignore ATTRIBUTE_UNUSED
)
5199 sym
= symbol_make (".eb");
5200 S_SET_SEGMENT (sym
, text_section
);
5201 symbol_set_frag (sym
, frag_now
);
5202 S_SET_VALUE (sym
, frag_now_fix ());
5203 S_SET_STORAGE_CLASS (sym
, C_BLOCK
);
5204 S_SET_NUMBER_AUXILIARY (sym
, 1);
5205 SA_SET_SYM_LNNO (sym
, get_absolute_expression ());
5206 symbol_get_tc (sym
)->output
= 1;
5208 SF_SET_PROCESS (sym
);
5210 ppc_frob_label (sym
);
5212 demand_empty_rest_of_line ();
5215 /* The .bc pseudo-op. This just creates a C_BCOMM symbol with a
5219 ppc_bc (int ignore ATTRIBUTE_UNUSED
)
5225 name
= demand_copy_C_string (&len
);
5226 sym
= symbol_make (name
);
5227 S_SET_SEGMENT (sym
, ppc_coff_debug_section
);
5228 symbol_get_bfdsym (sym
)->flags
|= BSF_DEBUGGING
;
5229 S_SET_STORAGE_CLASS (sym
, C_BCOMM
);
5230 S_SET_VALUE (sym
, 0);
5231 symbol_get_tc (sym
)->output
= 1;
5233 ppc_frob_label (sym
);
5235 demand_empty_rest_of_line ();
5238 /* The .ec pseudo-op. This just creates a C_ECOMM symbol. */
5241 ppc_ec (int ignore ATTRIBUTE_UNUSED
)
5245 sym
= symbol_make (".ec");
5246 S_SET_SEGMENT (sym
, ppc_coff_debug_section
);
5247 symbol_get_bfdsym (sym
)->flags
|= BSF_DEBUGGING
;
5248 S_SET_STORAGE_CLASS (sym
, C_ECOMM
);
5249 S_SET_VALUE (sym
, 0);
5250 symbol_get_tc (sym
)->output
= 1;
5252 ppc_frob_label (sym
);
5254 demand_empty_rest_of_line ();
5257 /* The .toc pseudo-op. Switch to the .toc subsegment. */
5260 ppc_toc (int ignore ATTRIBUTE_UNUSED
)
5262 if (ppc_toc_csect
!= (symbolS
*) NULL
)
5263 subseg_set (data_section
, symbol_get_tc (ppc_toc_csect
)->subseg
);
5270 subseg
= ppc_data_subsegment
;
5271 ++ppc_data_subsegment
;
5273 subseg_new (segment_name (data_section
), subseg
);
5274 ppc_toc_frag
= frag_now
;
5276 sym
= symbol_find_or_make ("TOC[TC0]");
5277 symbol_set_frag (sym
, frag_now
);
5278 S_SET_SEGMENT (sym
, data_section
);
5279 S_SET_VALUE (sym
, (valueT
) frag_now_fix ());
5280 symbol_get_tc (sym
)->subseg
= subseg
;
5281 symbol_get_tc (sym
)->output
= 1;
5282 symbol_get_tc (sym
)->within
= sym
;
5284 ppc_toc_csect
= sym
;
5286 for (list
= ppc_data_csects
;
5287 symbol_get_tc (list
)->next
!= (symbolS
*) NULL
;
5288 list
= symbol_get_tc (list
)->next
)
5290 symbol_get_tc (list
)->next
= sym
;
5292 symbol_remove (sym
, &symbol_rootP
, &symbol_lastP
);
5293 symbol_append (sym
, symbol_get_tc (list
)->within
, &symbol_rootP
,
5297 ppc_current_csect
= ppc_toc_csect
;
5299 demand_empty_rest_of_line ();
5302 /* The AIX assembler automatically aligns the operands of a .long or
5303 .short pseudo-op, and we want to be compatible. */
5306 ppc_xcoff_cons (int log_size
)
5308 frag_align (log_size
, 0, 0);
5309 record_alignment (now_seg
, log_size
);
5310 cons (1 << log_size
);
5314 ppc_vbyte (int dummy ATTRIBUTE_UNUSED
)
5319 (void) expression (&exp
);
5321 if (exp
.X_op
!= O_constant
)
5323 as_bad (_("non-constant byte count"));
5327 byte_count
= exp
.X_add_number
;
5329 if (*input_line_pointer
!= ',')
5331 as_bad (_("missing value"));
5335 ++input_line_pointer
;
5340 ppc_xcoff_end (void)
5344 for (i
= 0; i
< XCOFF_DWSECT_NBR_NAMES
; i
++)
5346 struct dw_section
*dws
= &dw_sections
[i
];
5347 struct dw_subsection
*dwss
;
5349 if (dws
->anon_subseg
)
5351 dwss
= dws
->anon_subseg
;
5352 dwss
->link
= dws
->list_subseg
;
5355 dwss
= dws
->list_subseg
;
5357 for (; dwss
!= NULL
; dwss
= dwss
->link
)
5358 if (dwss
->end_exp
.X_add_symbol
!= NULL
)
5360 subseg_set (dws
->sect
, dwss
->subseg
);
5361 symbol_set_value_now (dwss
->end_exp
.X_add_symbol
);
5367 #endif /* OBJ_XCOFF */
5368 #if defined (OBJ_XCOFF) || defined (OBJ_ELF)
5370 /* The .tc pseudo-op. This is used when generating either XCOFF or
5371 ELF. This takes two or more arguments.
5373 When generating XCOFF output, the first argument is the name to
5374 give to this location in the toc; this will be a symbol with class
5375 TC. The rest of the arguments are N-byte values to actually put at
5376 this location in the TOC; often there is just one more argument, a
5377 relocatable symbol reference. The size of the value to store
5378 depends on target word size. A 32-bit target uses 4-byte values, a
5379 64-bit target uses 8-byte values.
5381 When not generating XCOFF output, the arguments are the same, but
5382 the first argument is simply ignored. */
5385 ppc_tc (int ignore ATTRIBUTE_UNUSED
)
5389 /* Define the TOC symbol name. */
5395 if (ppc_toc_csect
== (symbolS
*) NULL
5396 || ppc_toc_csect
!= ppc_current_csect
)
5398 as_bad (_(".tc not in .toc section"));
5399 ignore_rest_of_line ();
5403 endc
= get_symbol_name (&name
);
5405 sym
= symbol_find_or_make (name
);
5407 (void) restore_line_pointer (endc
);
5409 if (S_IS_DEFINED (sym
))
5413 label
= symbol_get_tc (ppc_current_csect
)->within
;
5414 if (symbol_get_tc (label
)->symbol_class
!= XMC_TC0
)
5416 as_bad (_(".tc with no label"));
5417 ignore_rest_of_line ();
5421 S_SET_SEGMENT (label
, S_GET_SEGMENT (sym
));
5422 symbol_set_frag (label
, symbol_get_frag (sym
));
5423 S_SET_VALUE (label
, S_GET_VALUE (sym
));
5425 while (! is_end_of_line
[(unsigned char) *input_line_pointer
])
5426 ++input_line_pointer
;
5431 S_SET_SEGMENT (sym
, now_seg
);
5432 symbol_set_frag (sym
, frag_now
);
5433 S_SET_VALUE (sym
, (valueT
) frag_now_fix ());
5434 symbol_get_tc (sym
)->symbol_class
= XMC_TC
;
5435 symbol_get_tc (sym
)->output
= 1;
5437 ppc_frob_label (sym
);
5440 #endif /* OBJ_XCOFF */
5444 /* Skip the TOC symbol name. */
5445 while (is_part_of_name (*input_line_pointer
)
5446 || *input_line_pointer
== ' '
5447 || *input_line_pointer
== '['
5448 || *input_line_pointer
== ']'
5449 || *input_line_pointer
== '{'
5450 || *input_line_pointer
== '}')
5451 ++input_line_pointer
;
5453 /* Align to a four/eight byte boundary. */
5454 align
= ppc_obj64
? 3 : 2;
5455 frag_align (align
, 0, 0);
5456 record_alignment (now_seg
, align
);
5457 #endif /* OBJ_ELF */
5459 if (*input_line_pointer
!= ',')
5460 demand_empty_rest_of_line ();
5463 ++input_line_pointer
;
5464 cons (ppc_obj64
? 8 : 4);
5468 /* Pseudo-op .machine. */
5471 ppc_machine (int ignore ATTRIBUTE_UNUSED
)
5475 #define MAX_HISTORY 100
5476 static ppc_cpu_t
*cpu_history
;
5477 static int curr_hist
;
5481 c
= get_symbol_name (&cpu_string
);
5482 cpu_string
= xstrdup (cpu_string
);
5483 (void) restore_line_pointer (c
);
5485 if (cpu_string
!= NULL
)
5487 ppc_cpu_t old_cpu
= ppc_cpu
;
5491 for (p
= cpu_string
; *p
!= 0; p
++)
5494 if (strcmp (cpu_string
, "push") == 0)
5496 if (cpu_history
== NULL
)
5497 cpu_history
= XNEWVEC (ppc_cpu_t
, MAX_HISTORY
);
5499 if (curr_hist
>= MAX_HISTORY
)
5500 as_bad (_(".machine stack overflow"));
5502 cpu_history
[curr_hist
++] = ppc_cpu
;
5504 else if (strcmp (cpu_string
, "pop") == 0)
5507 as_bad (_(".machine stack underflow"));
5509 ppc_cpu
= cpu_history
[--curr_hist
];
5511 else if ((new_cpu
= ppc_parse_cpu (ppc_cpu
, &sticky
, cpu_string
)) != 0)
5514 as_bad (_("invalid machine `%s'"), cpu_string
);
5516 if (ppc_cpu
!= old_cpu
)
5517 ppc_setup_opcodes ();
5520 demand_empty_rest_of_line ();
5522 #endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
5526 /* XCOFF specific symbol and file handling. */
5528 /* Canonicalize the symbol name. We use the to force the suffix, if
5529 any, to use square brackets, and to be in upper case. */
5532 ppc_canonicalize_symbol_name (char *name
)
5536 if (ppc_stab_symbol
)
5539 for (s
= name
; *s
!= '\0' && *s
!= '{' && *s
!= '['; s
++)
5553 for (s
++; *s
!= '\0' && *s
!= brac
; s
++)
5556 if (*s
== '\0' || s
[1] != '\0')
5557 as_bad (_("bad symbol suffix"));
5565 /* Set the class of a symbol based on the suffix, if any. This is
5566 called whenever a new symbol is created. */
5569 ppc_symbol_new_hook (symbolS
*sym
)
5571 struct ppc_tc_sy
*tc
;
5574 tc
= symbol_get_tc (sym
);
5577 tc
->symbol_class
= -1;
5578 tc
->real_name
= NULL
;
5585 if (ppc_stab_symbol
)
5588 s
= strchr (S_GET_NAME (sym
), '[');
5589 if (s
== (const char *) NULL
)
5591 /* There is no suffix. */
5600 if (strcmp (s
, "BS]") == 0)
5601 tc
->symbol_class
= XMC_BS
;
5604 if (strcmp (s
, "DB]") == 0)
5605 tc
->symbol_class
= XMC_DB
;
5606 else if (strcmp (s
, "DS]") == 0)
5607 tc
->symbol_class
= XMC_DS
;
5610 if (strcmp (s
, "GL]") == 0)
5611 tc
->symbol_class
= XMC_GL
;
5614 if (strcmp (s
, "PR]") == 0)
5615 tc
->symbol_class
= XMC_PR
;
5618 if (strcmp (s
, "RO]") == 0)
5619 tc
->symbol_class
= XMC_RO
;
5620 else if (strcmp (s
, "RW]") == 0)
5621 tc
->symbol_class
= XMC_RW
;
5624 if (strcmp (s
, "SV]") == 0)
5625 tc
->symbol_class
= XMC_SV
;
5628 if (strcmp (s
, "TC]") == 0)
5629 tc
->symbol_class
= XMC_TC
;
5630 else if (strcmp (s
, "TI]") == 0)
5631 tc
->symbol_class
= XMC_TI
;
5632 else if (strcmp (s
, "TB]") == 0)
5633 tc
->symbol_class
= XMC_TB
;
5634 else if (strcmp (s
, "TC0]") == 0 || strcmp (s
, "T0]") == 0)
5635 tc
->symbol_class
= XMC_TC0
;
5638 if (strcmp (s
, "UA]") == 0)
5639 tc
->symbol_class
= XMC_UA
;
5640 else if (strcmp (s
, "UC]") == 0)
5641 tc
->symbol_class
= XMC_UC
;
5644 if (strcmp (s
, "XO]") == 0)
5645 tc
->symbol_class
= XMC_XO
;
5649 if (tc
->symbol_class
== -1)
5650 as_bad (_("unrecognized symbol suffix"));
5653 /* This variable is set by ppc_frob_symbol if any absolute symbols are
5654 seen. It tells ppc_adjust_symtab whether it needs to look through
5657 static bfd_boolean ppc_saw_abs
;
5659 /* Change the name of a symbol just before writing it out. Set the
5660 real name if the .rename pseudo-op was used. Otherwise, remove any
5661 class suffix. Return 1 if the symbol should not be included in the
5665 ppc_frob_symbol (symbolS
*sym
)
5667 static symbolS
*ppc_last_function
;
5668 static symbolS
*set_end
;
5670 /* Discard symbols that should not be included in the output symbol
5672 if (! symbol_used_in_reloc_p (sym
)
5673 && ((symbol_get_bfdsym (sym
)->flags
& BSF_SECTION_SYM
) != 0
5674 || (! (S_IS_EXTERNAL (sym
) || S_IS_WEAK (sym
))
5675 && ! symbol_get_tc (sym
)->output
5676 && S_GET_STORAGE_CLASS (sym
) != C_FILE
)))
5679 /* This one will disappear anyway. Don't make a csect sym for it. */
5680 if (sym
== abs_section_sym
)
5683 if (symbol_get_tc (sym
)->real_name
!= (char *) NULL
)
5684 S_SET_NAME (sym
, symbol_get_tc (sym
)->real_name
);
5690 name
= S_GET_NAME (sym
);
5691 s
= strchr (name
, '[');
5692 if (s
!= (char *) NULL
)
5698 snew
= xstrndup (name
, len
);
5700 S_SET_NAME (sym
, snew
);
5704 if (set_end
!= (symbolS
*) NULL
)
5706 SA_SET_SYM_ENDNDX (set_end
, sym
);
5710 if (SF_GET_FUNCTION (sym
))
5712 if (ppc_last_function
!= (symbolS
*) NULL
)
5713 as_bad (_("two .function pseudo-ops with no intervening .ef"));
5714 ppc_last_function
= sym
;
5715 if (symbol_get_tc (sym
)->u
.size
!= (symbolS
*) NULL
)
5717 resolve_symbol_value (symbol_get_tc (sym
)->u
.size
);
5718 SA_SET_SYM_FSIZE (sym
,
5719 (long) S_GET_VALUE (symbol_get_tc (sym
)->u
.size
));
5722 else if (S_GET_STORAGE_CLASS (sym
) == C_FCN
5723 && strcmp (S_GET_NAME (sym
), ".ef") == 0)
5725 if (ppc_last_function
== (symbolS
*) NULL
)
5726 as_bad (_(".ef with no preceding .function"));
5729 set_end
= ppc_last_function
;
5730 ppc_last_function
= NULL
;
5732 /* We don't have a C_EFCN symbol, but we need to force the
5733 COFF backend to believe that it has seen one. */
5734 coff_last_function
= NULL
;
5738 if (! (S_IS_EXTERNAL (sym
) || S_IS_WEAK (sym
))
5739 && (symbol_get_bfdsym (sym
)->flags
& BSF_SECTION_SYM
) == 0
5740 && S_GET_STORAGE_CLASS (sym
) != C_FILE
5741 && S_GET_STORAGE_CLASS (sym
) != C_FCN
5742 && S_GET_STORAGE_CLASS (sym
) != C_BLOCK
5743 && S_GET_STORAGE_CLASS (sym
) != C_BSTAT
5744 && S_GET_STORAGE_CLASS (sym
) != C_ESTAT
5745 && S_GET_STORAGE_CLASS (sym
) != C_BINCL
5746 && S_GET_STORAGE_CLASS (sym
) != C_EINCL
5747 && S_GET_SEGMENT (sym
) != ppc_coff_debug_section
)
5748 S_SET_STORAGE_CLASS (sym
, C_HIDEXT
);
5750 if (S_GET_STORAGE_CLASS (sym
) == C_EXT
5751 || S_GET_STORAGE_CLASS (sym
) == C_AIX_WEAKEXT
5752 || S_GET_STORAGE_CLASS (sym
) == C_HIDEXT
)
5755 union internal_auxent
*a
;
5757 /* Create a csect aux. */
5758 i
= S_GET_NUMBER_AUXILIARY (sym
);
5759 S_SET_NUMBER_AUXILIARY (sym
, i
+ 1);
5760 a
= &coffsymbol (symbol_get_bfdsym (sym
))->native
[i
+ 1].u
.auxent
;
5761 if (symbol_get_tc (sym
)->symbol_class
== XMC_TC0
)
5763 /* This is the TOC table. */
5764 know (strcmp (S_GET_NAME (sym
), "TOC") == 0);
5765 a
->x_csect
.x_scnlen
.l
= 0;
5766 a
->x_csect
.x_smtyp
= (2 << 3) | XTY_SD
;
5768 else if (symbol_get_tc (sym
)->subseg
!= 0)
5770 /* This is a csect symbol. x_scnlen is the size of the
5772 if (symbol_get_tc (sym
)->next
== (symbolS
*) NULL
)
5773 a
->x_csect
.x_scnlen
.l
= (bfd_section_size (S_GET_SEGMENT (sym
))
5774 - S_GET_VALUE (sym
));
5777 resolve_symbol_value (symbol_get_tc (sym
)->next
);
5778 a
->x_csect
.x_scnlen
.l
= (S_GET_VALUE (symbol_get_tc (sym
)->next
)
5779 - S_GET_VALUE (sym
));
5781 a
->x_csect
.x_smtyp
= (symbol_get_tc (sym
)->align
<< 3) | XTY_SD
;
5783 else if (S_GET_SEGMENT (sym
) == bss_section
)
5785 /* This is a common symbol. */
5786 a
->x_csect
.x_scnlen
.l
= symbol_get_frag (sym
)->fr_offset
;
5787 a
->x_csect
.x_smtyp
= (symbol_get_tc (sym
)->align
<< 3) | XTY_CM
;
5788 if (S_IS_EXTERNAL (sym
))
5789 symbol_get_tc (sym
)->symbol_class
= XMC_RW
;
5791 symbol_get_tc (sym
)->symbol_class
= XMC_BS
;
5793 else if (S_GET_SEGMENT (sym
) == absolute_section
)
5795 /* This is an absolute symbol. The csect will be created by
5796 ppc_adjust_symtab. */
5798 a
->x_csect
.x_smtyp
= XTY_LD
;
5799 if (symbol_get_tc (sym
)->symbol_class
== -1)
5800 symbol_get_tc (sym
)->symbol_class
= XMC_XO
;
5802 else if (! S_IS_DEFINED (sym
))
5804 /* This is an external symbol. */
5805 a
->x_csect
.x_scnlen
.l
= 0;
5806 a
->x_csect
.x_smtyp
= XTY_ER
;
5808 else if (symbol_get_tc (sym
)->symbol_class
== XMC_TC
)
5812 /* This is a TOC definition. x_scnlen is the size of the
5814 next
= symbol_next (sym
);
5815 while (symbol_get_tc (next
)->symbol_class
== XMC_TC0
)
5816 next
= symbol_next (next
);
5817 if (next
== (symbolS
*) NULL
5818 || symbol_get_tc (next
)->symbol_class
!= XMC_TC
)
5820 if (ppc_after_toc_frag
== (fragS
*) NULL
)
5821 a
->x_csect
.x_scnlen
.l
= (bfd_section_size (data_section
)
5822 - S_GET_VALUE (sym
));
5824 a
->x_csect
.x_scnlen
.l
= (ppc_after_toc_frag
->fr_address
5825 - S_GET_VALUE (sym
));
5829 resolve_symbol_value (next
);
5830 a
->x_csect
.x_scnlen
.l
= (S_GET_VALUE (next
)
5831 - S_GET_VALUE (sym
));
5833 a
->x_csect
.x_smtyp
= (2 << 3) | XTY_SD
;
5839 /* This is a normal symbol definition. x_scnlen is the
5840 symbol index of the containing csect. */
5841 if (S_GET_SEGMENT (sym
) == text_section
)
5842 csect
= ppc_text_csects
;
5843 else if (S_GET_SEGMENT (sym
) == data_section
)
5844 csect
= ppc_data_csects
;
5848 /* Skip the initial dummy symbol. */
5849 csect
= symbol_get_tc (csect
)->next
;
5851 if (csect
== (symbolS
*) NULL
)
5853 as_warn (_("warning: symbol %s has no csect"), S_GET_NAME (sym
));
5854 a
->x_csect
.x_scnlen
.l
= 0;
5858 while (symbol_get_tc (csect
)->next
!= (symbolS
*) NULL
)
5860 resolve_symbol_value (symbol_get_tc (csect
)->next
);
5861 if (S_GET_VALUE (symbol_get_tc (csect
)->next
)
5862 > S_GET_VALUE (sym
))
5864 csect
= symbol_get_tc (csect
)->next
;
5867 a
->x_csect
.x_scnlen
.p
=
5868 coffsymbol (symbol_get_bfdsym (csect
))->native
;
5869 coffsymbol (symbol_get_bfdsym (sym
))->native
[i
+ 1].fix_scnlen
=
5872 a
->x_csect
.x_smtyp
= XTY_LD
;
5875 a
->x_csect
.x_parmhash
= 0;
5876 a
->x_csect
.x_snhash
= 0;
5877 if (symbol_get_tc (sym
)->symbol_class
== -1)
5878 a
->x_csect
.x_smclas
= XMC_PR
;
5880 a
->x_csect
.x_smclas
= symbol_get_tc (sym
)->symbol_class
;
5881 a
->x_csect
.x_stab
= 0;
5882 a
->x_csect
.x_snstab
= 0;
5884 /* Don't let the COFF backend resort these symbols. */
5885 symbol_get_bfdsym (sym
)->flags
|= BSF_NOT_AT_END
;
5887 else if (S_GET_STORAGE_CLASS (sym
) == C_BSTAT
)
5889 /* We want the value to be the symbol index of the referenced
5890 csect symbol. BFD will do that for us if we set the right
5892 asymbol
*bsym
= symbol_get_bfdsym (symbol_get_tc (sym
)->within
);
5893 combined_entry_type
*c
= coffsymbol (bsym
)->native
;
5895 S_SET_VALUE (sym
, (valueT
) (size_t) c
);
5896 coffsymbol (symbol_get_bfdsym (sym
))->native
->fix_value
= 1;
5898 else if (S_GET_STORAGE_CLASS (sym
) == C_STSYM
)
5903 block
= symbol_get_tc (sym
)->within
;
5906 /* The value is the offset from the enclosing csect. */
5909 csect
= symbol_get_tc (block
)->within
;
5910 resolve_symbol_value (csect
);
5911 base
= S_GET_VALUE (csect
);
5916 S_SET_VALUE (sym
, S_GET_VALUE (sym
) - base
);
5918 else if (S_GET_STORAGE_CLASS (sym
) == C_BINCL
5919 || S_GET_STORAGE_CLASS (sym
) == C_EINCL
)
5921 /* We want the value to be a file offset into the line numbers.
5922 BFD will do that for us if we set the right flags. We have
5923 already set the value correctly. */
5924 coffsymbol (symbol_get_bfdsym (sym
))->native
->fix_line
= 1;
5930 /* Adjust the symbol table. This creates csect symbols for all
5931 absolute symbols. */
5934 ppc_adjust_symtab (void)
5941 for (sym
= symbol_rootP
; sym
!= NULL
; sym
= symbol_next (sym
))
5945 union internal_auxent
*a
;
5947 if (S_GET_SEGMENT (sym
) != absolute_section
)
5950 csect
= symbol_create (".abs[XO]", absolute_section
,
5951 &zero_address_frag
, S_GET_VALUE (sym
));
5952 symbol_get_bfdsym (csect
)->value
= S_GET_VALUE (sym
);
5953 S_SET_STORAGE_CLASS (csect
, C_HIDEXT
);
5954 i
= S_GET_NUMBER_AUXILIARY (csect
);
5955 S_SET_NUMBER_AUXILIARY (csect
, i
+ 1);
5956 a
= &coffsymbol (symbol_get_bfdsym (csect
))->native
[i
+ 1].u
.auxent
;
5957 a
->x_csect
.x_scnlen
.l
= 0;
5958 a
->x_csect
.x_smtyp
= XTY_SD
;
5959 a
->x_csect
.x_parmhash
= 0;
5960 a
->x_csect
.x_snhash
= 0;
5961 a
->x_csect
.x_smclas
= XMC_XO
;
5962 a
->x_csect
.x_stab
= 0;
5963 a
->x_csect
.x_snstab
= 0;
5965 symbol_insert (csect
, sym
, &symbol_rootP
, &symbol_lastP
);
5967 i
= S_GET_NUMBER_AUXILIARY (sym
);
5968 a
= &coffsymbol (symbol_get_bfdsym (sym
))->native
[i
].u
.auxent
;
5969 a
->x_csect
.x_scnlen
.p
= coffsymbol (symbol_get_bfdsym (csect
))->native
;
5970 coffsymbol (symbol_get_bfdsym (sym
))->native
[i
].fix_scnlen
= 1;
5973 ppc_saw_abs
= FALSE
;
5976 /* Set the VMA for a section. This is called on all the sections in
5980 ppc_frob_section (asection
*sec
)
5982 static bfd_vma vma
= 0;
5984 /* Dwarf sections start at 0. */
5985 if (bfd_section_flags (sec
) & SEC_DEBUGGING
)
5988 vma
= md_section_align (sec
, vma
);
5989 bfd_set_section_vma (sec
, vma
);
5990 vma
+= bfd_section_size (sec
);
5993 #endif /* OBJ_XCOFF */
5996 md_atof (int type
, char *litp
, int *sizep
)
5998 return ieee_md_atof (type
, litp
, sizep
, target_big_endian
);
6001 /* Write a value out to the object file, using the appropriate
6005 md_number_to_chars (char *buf
, valueT val
, int n
)
6007 if (target_big_endian
)
6008 number_to_chars_bigendian (buf
, val
, n
);
6010 number_to_chars_littleendian (buf
, val
, n
);
6013 /* Align a section (I don't know why this is machine dependent). */
6016 md_section_align (asection
*seg ATTRIBUTE_UNUSED
, valueT addr
)
6021 int align
= bfd_section_alignment (seg
);
6023 return ((addr
+ (1 << align
) - 1) & -(1 << align
));
6027 /* We don't have any form of relaxing. */
6030 md_estimate_size_before_relax (fragS
*fragp ATTRIBUTE_UNUSED
,
6031 asection
*seg ATTRIBUTE_UNUSED
)
6037 /* Convert a machine dependent frag. We never generate these. */
6040 md_convert_frag (bfd
*abfd ATTRIBUTE_UNUSED
,
6041 asection
*sec ATTRIBUTE_UNUSED
,
6042 fragS
*fragp ATTRIBUTE_UNUSED
)
6047 /* We have no need to default values of symbols. */
6050 md_undefined_symbol (char *name ATTRIBUTE_UNUSED
)
6055 /* Functions concerning relocs. */
6057 /* The location from which a PC relative jump should be calculated,
6058 given a PC relative reloc. */
6061 md_pcrel_from_section (fixS
*fixp
, segT sec ATTRIBUTE_UNUSED
)
6063 return fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
6068 /* This is called to see whether a fixup should be adjusted to use a
6069 section symbol. We take the opportunity to change a fixup against
6070 a symbol in the TOC subsegment into a reloc against the
6071 corresponding .tc symbol. */
6074 ppc_fix_adjustable (fixS
*fix
)
6076 valueT val
= resolve_symbol_value (fix
->fx_addsy
);
6077 segT symseg
= S_GET_SEGMENT (fix
->fx_addsy
);
6078 TC_SYMFIELD_TYPE
*tc
;
6080 if (symseg
== absolute_section
)
6083 /* Always adjust symbols in debugging sections. */
6084 if (bfd_section_flags (symseg
) & SEC_DEBUGGING
)
6087 if (ppc_toc_csect
!= (symbolS
*) NULL
6088 && fix
->fx_addsy
!= ppc_toc_csect
6089 && symseg
== data_section
6090 && val
>= ppc_toc_frag
->fr_address
6091 && (ppc_after_toc_frag
== (fragS
*) NULL
6092 || val
< ppc_after_toc_frag
->fr_address
))
6096 for (sy
= symbol_next (ppc_toc_csect
);
6097 sy
!= (symbolS
*) NULL
;
6098 sy
= symbol_next (sy
))
6100 TC_SYMFIELD_TYPE
*sy_tc
= symbol_get_tc (sy
);
6102 if (sy_tc
->symbol_class
== XMC_TC0
)
6104 if (sy_tc
->symbol_class
!= XMC_TC
)
6106 if (val
== resolve_symbol_value (sy
))
6109 fix
->fx_addnumber
= val
- ppc_toc_frag
->fr_address
;
6114 as_bad_where (fix
->fx_file
, fix
->fx_line
,
6115 _("symbol in .toc does not match any .tc"));
6118 /* Possibly adjust the reloc to be against the csect. */
6119 tc
= symbol_get_tc (fix
->fx_addsy
);
6121 && tc
->symbol_class
!= XMC_TC0
6122 && tc
->symbol_class
!= XMC_TC
6123 && symseg
!= bss_section
6124 /* Don't adjust if this is a reloc in the toc section. */
6125 && (symseg
!= data_section
6126 || ppc_toc_csect
== NULL
6127 || val
< ppc_toc_frag
->fr_address
6128 || (ppc_after_toc_frag
!= NULL
6129 && val
>= ppc_after_toc_frag
->fr_address
)))
6131 symbolS
*csect
= tc
->within
;
6133 /* If the symbol was not declared by a label (eg: a section symbol),
6134 use the section instead of the csect. This doesn't happen in
6135 normal AIX assembly code. */
6137 csect
= seg_info (symseg
)->sym
;
6139 fix
->fx_offset
+= val
- symbol_get_frag (csect
)->fr_address
;
6140 fix
->fx_addsy
= csect
;
6145 /* Adjust a reloc against a .lcomm symbol to be against the base
6147 if (symseg
== bss_section
6148 && ! S_IS_EXTERNAL (fix
->fx_addsy
))
6150 symbolS
*sy
= symbol_get_frag (fix
->fx_addsy
)->fr_symbol
;
6152 fix
->fx_offset
+= val
- resolve_symbol_value (sy
);
6159 /* A reloc from one csect to another must be kept. The assembler
6160 will, of course, keep relocs between sections, and it will keep
6161 absolute relocs, but we need to force it to keep PC relative relocs
6162 between two csects in the same section. */
6165 ppc_force_relocation (fixS
*fix
)
6167 /* At this point fix->fx_addsy should already have been converted to
6168 a csect symbol. If the csect does not include the fragment, then
6169 we need to force the relocation. */
6171 && fix
->fx_addsy
!= NULL
6172 && symbol_get_tc (fix
->fx_addsy
)->subseg
!= 0
6173 && ((symbol_get_frag (fix
->fx_addsy
)->fr_address
6174 > fix
->fx_frag
->fr_address
)
6175 || (symbol_get_tc (fix
->fx_addsy
)->next
!= NULL
6176 && (symbol_get_frag (symbol_get_tc (fix
->fx_addsy
)->next
)->fr_address
6177 <= fix
->fx_frag
->fr_address
))))
6180 return generic_force_reloc (fix
);
6182 #endif /* OBJ_XCOFF */
6185 /* If this function returns non-zero, it guarantees that a relocation
6186 will be emitted for a fixup. */
6189 ppc_force_relocation (fixS
*fix
)
6191 /* Branch prediction relocations must force a relocation, as must
6192 the vtable description relocs. */
6193 switch (fix
->fx_r_type
)
6195 case BFD_RELOC_PPC_B16_BRTAKEN
:
6196 case BFD_RELOC_PPC_B16_BRNTAKEN
:
6197 case BFD_RELOC_PPC_BA16_BRTAKEN
:
6198 case BFD_RELOC_PPC_BA16_BRNTAKEN
:
6199 case BFD_RELOC_24_PLT_PCREL
:
6200 case BFD_RELOC_PPC64_TOC
:
6202 case BFD_RELOC_PPC_B26
:
6203 case BFD_RELOC_PPC_BA26
:
6204 case BFD_RELOC_PPC_B16
:
6205 case BFD_RELOC_PPC_BA16
:
6206 case BFD_RELOC_PPC64_REL24_NOTOC
:
6207 /* All branch fixups targeting a localentry symbol must
6208 force a relocation. */
6211 asymbol
*bfdsym
= symbol_get_bfdsym (fix
->fx_addsy
);
6212 elf_symbol_type
*elfsym
= elf_symbol_from (bfdsym
);
6213 gas_assert (elfsym
);
6214 if ((STO_PPC64_LOCAL_MASK
& elfsym
->internal_elf_sym
.st_other
) != 0)
6222 if (fix
->fx_r_type
>= BFD_RELOC_PPC_TLS
6223 && fix
->fx_r_type
<= BFD_RELOC_PPC64_TLS_PCREL
)
6226 return generic_force_reloc (fix
);
6230 ppc_fix_adjustable (fixS
*fix
)
6232 switch (fix
->fx_r_type
)
6234 /* All branch fixups targeting a localentry symbol must
6235 continue using the symbol. */
6236 case BFD_RELOC_PPC_B26
:
6237 case BFD_RELOC_PPC_BA26
:
6238 case BFD_RELOC_PPC_B16
:
6239 case BFD_RELOC_PPC_BA16
:
6240 case BFD_RELOC_PPC_B16_BRTAKEN
:
6241 case BFD_RELOC_PPC_B16_BRNTAKEN
:
6242 case BFD_RELOC_PPC_BA16_BRTAKEN
:
6243 case BFD_RELOC_PPC_BA16_BRNTAKEN
:
6244 case BFD_RELOC_PPC64_REL24_NOTOC
:
6247 asymbol
*bfdsym
= symbol_get_bfdsym (fix
->fx_addsy
);
6248 elf_symbol_type
*elfsym
= elf_symbol_from (bfdsym
);
6249 gas_assert (elfsym
);
6250 if ((STO_PPC64_LOCAL_MASK
& elfsym
->internal_elf_sym
.st_other
) != 0)
6258 return (fix
->fx_r_type
!= BFD_RELOC_16_GOTOFF
6259 && fix
->fx_r_type
!= BFD_RELOC_LO16_GOTOFF
6260 && fix
->fx_r_type
!= BFD_RELOC_HI16_GOTOFF
6261 && fix
->fx_r_type
!= BFD_RELOC_HI16_S_GOTOFF
6262 && fix
->fx_r_type
!= BFD_RELOC_PPC64_GOT16_DS
6263 && fix
->fx_r_type
!= BFD_RELOC_PPC64_GOT16_LO_DS
6264 && fix
->fx_r_type
!= BFD_RELOC_PPC64_GOT_PCREL34
6265 && fix
->fx_r_type
!= BFD_RELOC_24_PLT_PCREL
6266 && fix
->fx_r_type
!= BFD_RELOC_32_PLTOFF
6267 && fix
->fx_r_type
!= BFD_RELOC_32_PLT_PCREL
6268 && fix
->fx_r_type
!= BFD_RELOC_LO16_PLTOFF
6269 && fix
->fx_r_type
!= BFD_RELOC_HI16_PLTOFF
6270 && fix
->fx_r_type
!= BFD_RELOC_HI16_S_PLTOFF
6271 && fix
->fx_r_type
!= BFD_RELOC_64_PLTOFF
6272 && fix
->fx_r_type
!= BFD_RELOC_64_PLT_PCREL
6273 && fix
->fx_r_type
!= BFD_RELOC_PPC64_PLT16_LO_DS
6274 && fix
->fx_r_type
!= BFD_RELOC_PPC64_PLT_PCREL34
6275 && fix
->fx_r_type
!= BFD_RELOC_PPC64_PLTGOT16
6276 && fix
->fx_r_type
!= BFD_RELOC_PPC64_PLTGOT16_LO
6277 && fix
->fx_r_type
!= BFD_RELOC_PPC64_PLTGOT16_HI
6278 && fix
->fx_r_type
!= BFD_RELOC_PPC64_PLTGOT16_HA
6279 && fix
->fx_r_type
!= BFD_RELOC_PPC64_PLTGOT16_DS
6280 && fix
->fx_r_type
!= BFD_RELOC_PPC64_PLTGOT16_LO_DS
6281 && fix
->fx_r_type
!= BFD_RELOC_GPREL16
6282 && fix
->fx_r_type
!= BFD_RELOC_PPC_VLE_SDAREL_LO16A
6283 && fix
->fx_r_type
!= BFD_RELOC_PPC_VLE_SDAREL_HI16A
6284 && fix
->fx_r_type
!= BFD_RELOC_PPC_VLE_SDAREL_HA16A
6285 && fix
->fx_r_type
!= BFD_RELOC_VTABLE_INHERIT
6286 && fix
->fx_r_type
!= BFD_RELOC_VTABLE_ENTRY
6287 && !(fix
->fx_r_type
>= BFD_RELOC_PPC_TLS
6288 && fix
->fx_r_type
<= BFD_RELOC_PPC64_TLS_PCREL
));
6293 ppc_frag_check (struct frag
*fragP
)
6295 if ((fragP
->fr_address
& fragP
->insn_addr
) != 0)
6296 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
6297 _("instruction address is not a multiple of %d"),
6298 fragP
->insn_addr
+ 1);
6301 /* rs_align_code frag handling. */
6303 enum ppc_nop_encoding_for_rs_align_code
6312 ppc_nop_select (void)
6314 if ((ppc_cpu
& PPC_OPCODE_VLE
) != 0)
6316 if ((ppc_cpu
& (PPC_OPCODE_POWER9
| PPC_OPCODE_E500MC
)) == 0)
6318 if ((ppc_cpu
& PPC_OPCODE_POWER7
) != 0)
6319 return PPC_NOP_GROUP_P7
;
6320 if ((ppc_cpu
& PPC_OPCODE_POWER6
) != 0)
6321 return PPC_NOP_GROUP_P6
;
6323 return PPC_NOP_VANILLA
;
6327 ppc_handle_align (struct frag
*fragP
)
6329 valueT count
= (fragP
->fr_next
->fr_address
6330 - (fragP
->fr_address
+ fragP
->fr_fix
));
6331 char *dest
= fragP
->fr_literal
+ fragP
->fr_fix
;
6332 enum ppc_nop_encoding_for_rs_align_code nop_select
= *dest
& 0xff;
6334 /* Pad with zeros if not inserting a whole number of instructions.
6335 We could pad with zeros up to an instruction boundary then follow
6336 with nops but odd counts indicate data in an executable section
6337 so padding with zeros is most appropriate. */
6339 || (nop_select
== PPC_NOP_VLE
? (count
& 1) != 0 : (count
& 3) != 0))
6345 if (nop_select
== PPC_NOP_VLE
)
6349 md_number_to_chars (dest
, 0x4400, 2);
6355 if (count
> 4 * nop_limit
&& count
< 0x2000000)
6359 /* Make a branch, then follow with nops. Insert another
6360 frag to handle the nops. */
6361 md_number_to_chars (dest
, 0x48000000 + count
, 4);
6366 rest
= xmalloc (SIZEOF_STRUCT_FRAG
+ 4);
6367 memcpy (rest
, fragP
, SIZEOF_STRUCT_FRAG
);
6368 fragP
->fr_next
= rest
;
6370 rest
->fr_address
+= rest
->fr_fix
+ 4;
6372 /* If we leave the next frag as rs_align_code we'll come here
6373 again, resulting in a bunch of branches rather than a
6374 branch followed by nops. */
6375 rest
->fr_type
= rs_align
;
6376 dest
= rest
->fr_literal
;
6379 md_number_to_chars (dest
, 0x60000000, 4);
6381 if (nop_select
>= PPC_NOP_GROUP_P6
)
6383 /* For power6, power7, and power8, we want the last nop to
6384 be a group terminating one. Do this by inserting an
6385 rs_fill frag immediately after this one, with its address
6386 set to the last nop location. This will automatically
6387 reduce the number of nops in the current frag by one. */
6390 struct frag
*group_nop
= xmalloc (SIZEOF_STRUCT_FRAG
+ 4);
6392 memcpy (group_nop
, fragP
, SIZEOF_STRUCT_FRAG
);
6393 group_nop
->fr_address
= group_nop
->fr_next
->fr_address
- 4;
6394 group_nop
->fr_fix
= 0;
6395 group_nop
->fr_offset
= 1;
6396 group_nop
->fr_type
= rs_fill
;
6397 fragP
->fr_next
= group_nop
;
6398 dest
= group_nop
->fr_literal
;
6401 if (nop_select
== PPC_NOP_GROUP_P6
)
6402 /* power6 group terminating nop: "ori 1,1,0". */
6403 md_number_to_chars (dest
, 0x60210000, 4);
6405 /* power7/power8 group terminating nop: "ori 2,2,0". */
6406 md_number_to_chars (dest
, 0x60420000, 4);
6411 /* Apply a fixup to the object code. This is called for all the
6412 fixups we generated by the calls to fix_new_exp, above. */
6415 md_apply_fix (fixS
*fixP
, valueT
*valP
, segT seg
)
6417 valueT value
= * valP
;
6419 const struct powerpc_operand
*operand
;
6422 if (fixP
->fx_addsy
!= NULL
)
6424 /* Hack around bfd_install_relocation brain damage. */
6426 value
+= fixP
->fx_frag
->fr_address
+ fixP
->fx_where
;
6428 if (fixP
->fx_addsy
== abs_section_sym
)
6434 /* FIXME FIXME FIXME: The value we are passed in *valP includes
6435 the symbol values. If we are doing this relocation the code in
6436 write.c is going to call bfd_install_relocation, which is also
6437 going to use the symbol value. That means that if the reloc is
6438 fully resolved we want to use *valP since bfd_install_relocation is
6440 However, if the reloc is not fully resolved we do not want to
6441 use *valP, and must use fx_offset instead. If the relocation
6442 is PC-relative, we then need to re-apply md_pcrel_from_section
6443 to this new relocation value. */
6444 if (fixP
->fx_addsy
== (symbolS
*) NULL
)
6449 value
= fixP
->fx_offset
;
6451 value
-= md_pcrel_from_section (fixP
, seg
);
6455 /* We are only able to convert some relocs to pc-relative. */
6458 switch (fixP
->fx_r_type
)
6461 fixP
->fx_r_type
= BFD_RELOC_64_PCREL
;
6465 fixP
->fx_r_type
= BFD_RELOC_32_PCREL
;
6469 fixP
->fx_r_type
= BFD_RELOC_16_PCREL
;
6472 case BFD_RELOC_LO16
:
6473 fixP
->fx_r_type
= BFD_RELOC_LO16_PCREL
;
6476 case BFD_RELOC_HI16
:
6477 fixP
->fx_r_type
= BFD_RELOC_HI16_PCREL
;
6480 case BFD_RELOC_HI16_S
:
6481 fixP
->fx_r_type
= BFD_RELOC_HI16_S_PCREL
;
6484 case BFD_RELOC_PPC64_ADDR16_HIGH
:
6485 fixP
->fx_r_type
= BFD_RELOC_PPC64_REL16_HIGH
;
6488 case BFD_RELOC_PPC64_ADDR16_HIGHA
:
6489 fixP
->fx_r_type
= BFD_RELOC_PPC64_REL16_HIGHA
;
6492 case BFD_RELOC_PPC64_HIGHER
:
6493 fixP
->fx_r_type
= BFD_RELOC_PPC64_REL16_HIGHER
;
6496 case BFD_RELOC_PPC64_HIGHER_S
:
6497 fixP
->fx_r_type
= BFD_RELOC_PPC64_REL16_HIGHERA
;
6500 case BFD_RELOC_PPC64_HIGHEST
:
6501 fixP
->fx_r_type
= BFD_RELOC_PPC64_REL16_HIGHEST
;
6504 case BFD_RELOC_PPC64_HIGHEST_S
:
6505 fixP
->fx_r_type
= BFD_RELOC_PPC64_REL16_HIGHESTA
;
6508 case BFD_RELOC_PPC64_ADDR16_HIGHER34
:
6509 fixP
->fx_r_type
= BFD_RELOC_PPC64_REL16_HIGHER34
;
6512 case BFD_RELOC_PPC64_ADDR16_HIGHERA34
:
6513 fixP
->fx_r_type
= BFD_RELOC_PPC64_REL16_HIGHERA34
;
6516 case BFD_RELOC_PPC64_ADDR16_HIGHEST34
:
6517 fixP
->fx_r_type
= BFD_RELOC_PPC64_REL16_HIGHEST34
;
6520 case BFD_RELOC_PPC64_ADDR16_HIGHESTA34
:
6521 fixP
->fx_r_type
= BFD_RELOC_PPC64_REL16_HIGHESTA34
;
6524 case BFD_RELOC_PPC_16DX_HA
:
6525 fixP
->fx_r_type
= BFD_RELOC_PPC_REL16DX_HA
;
6528 case BFD_RELOC_PPC64_D34
:
6529 fixP
->fx_r_type
= BFD_RELOC_PPC64_PCREL34
;
6532 case BFD_RELOC_PPC64_D28
:
6533 fixP
->fx_r_type
= BFD_RELOC_PPC64_PCREL28
;
6540 else if (!fixP
->fx_done
6541 && fixP
->fx_r_type
== BFD_RELOC_PPC_16DX_HA
)
6543 /* addpcis is relative to next insn address. */
6545 fixP
->fx_r_type
= BFD_RELOC_PPC_REL16DX_HA
;
6550 if (fixP
->fx_pcrel_adjust
!= 0)
6552 /* This is a fixup on an instruction. */
6553 int opindex
= fixP
->fx_pcrel_adjust
& 0xff;
6555 operand
= &powerpc_operands
[opindex
];
6557 /* An instruction like `lwz 9,sym(30)' when `sym' is not a TOC symbol
6558 does not generate a reloc. It uses the offset of `sym' within its
6559 csect. Other usages, such as `.long sym', generate relocs. This
6560 is the documented behaviour of non-TOC symbols. */
6561 if ((operand
->flags
& PPC_OPERAND_PARENS
) != 0
6562 && (operand
->bitm
& 0xfff0) == 0xfff0
6563 && operand
->shift
== 0
6564 && (operand
->insert
== NULL
|| ppc_obj64
)
6565 && fixP
->fx_addsy
!= NULL
6566 && symbol_get_tc (fixP
->fx_addsy
)->subseg
!= 0
6567 && symbol_get_tc (fixP
->fx_addsy
)->symbol_class
!= XMC_TC
6568 && symbol_get_tc (fixP
->fx_addsy
)->symbol_class
!= XMC_TC0
6569 && S_GET_SEGMENT (fixP
->fx_addsy
) != bss_section
)
6571 value
= fixP
->fx_offset
;
6575 /* During parsing of instructions, a TOC16 reloc is generated for
6576 instructions such as 'lwz RT,SYM(RB)' if SYM is a symbol defined
6577 in the toc. But at parse time, SYM may be not yet defined, so
6578 check again here. */
6579 if (fixP
->fx_r_type
== BFD_RELOC_16
6580 && fixP
->fx_addsy
!= NULL
6581 && ppc_is_toc_sym (fixP
->fx_addsy
))
6582 fixP
->fx_r_type
= BFD_RELOC_PPC_TOC16
;
6586 /* Calculate value to be stored in field. */
6588 switch (fixP
->fx_r_type
)
6591 case BFD_RELOC_PPC64_ADDR16_LO_DS
:
6592 case BFD_RELOC_PPC_VLE_LO16A
:
6593 case BFD_RELOC_PPC_VLE_LO16D
:
6595 case BFD_RELOC_LO16
:
6596 case BFD_RELOC_LO16_PCREL
:
6597 fieldval
= value
& 0xffff;
6599 if (operand
!= NULL
&& (operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
6600 fieldval
= SEX16 (fieldval
);
6601 fixP
->fx_no_overflow
= 1;
6604 case BFD_RELOC_HI16
:
6605 case BFD_RELOC_HI16_PCREL
:
6607 if (REPORT_OVERFLOW_HI
&& ppc_obj64
)
6609 fieldval
= value
>> 16;
6610 if (operand
!= NULL
&& (operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
6612 valueT sign
= (((valueT
) -1 >> 16) + 1) >> 1;
6613 fieldval
= ((valueT
) fieldval
^ sign
) - sign
;
6619 case BFD_RELOC_PPC_VLE_HI16A
:
6620 case BFD_RELOC_PPC_VLE_HI16D
:
6621 case BFD_RELOC_PPC64_ADDR16_HIGH
:
6623 fieldval
= PPC_HI (value
);
6624 goto sign_extend_16
;
6626 case BFD_RELOC_HI16_S
:
6627 case BFD_RELOC_HI16_S_PCREL
:
6628 case BFD_RELOC_PPC_16DX_HA
:
6629 case BFD_RELOC_PPC_REL16DX_HA
:
6631 if (REPORT_OVERFLOW_HI
&& ppc_obj64
)
6633 fieldval
= (value
+ 0x8000) >> 16;
6634 if (operand
!= NULL
&& (operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
6636 valueT sign
= (((valueT
) -1 >> 16) + 1) >> 1;
6637 fieldval
= ((valueT
) fieldval
^ sign
) - sign
;
6643 case BFD_RELOC_PPC_VLE_HA16A
:
6644 case BFD_RELOC_PPC_VLE_HA16D
:
6645 case BFD_RELOC_PPC64_ADDR16_HIGHA
:
6647 fieldval
= PPC_HA (value
);
6648 goto sign_extend_16
;
6651 case BFD_RELOC_PPC64_HIGHER
:
6652 fieldval
= PPC_HIGHER (value
);
6653 goto sign_extend_16
;
6655 case BFD_RELOC_PPC64_HIGHER_S
:
6656 fieldval
= PPC_HIGHERA (value
);
6657 goto sign_extend_16
;
6659 case BFD_RELOC_PPC64_HIGHEST
:
6660 fieldval
= PPC_HIGHEST (value
);
6661 goto sign_extend_16
;
6663 case BFD_RELOC_PPC64_HIGHEST_S
:
6664 fieldval
= PPC_HIGHESTA (value
);
6665 goto sign_extend_16
;
6672 if (operand
!= NULL
)
6674 /* Handle relocs in an insn. */
6675 switch (fixP
->fx_r_type
)
6678 /* The following relocs can't be calculated by the assembler.
6679 Leave the field zero. */
6680 case BFD_RELOC_PPC_TPREL16
:
6681 case BFD_RELOC_PPC_TPREL16_LO
:
6682 case BFD_RELOC_PPC_TPREL16_HI
:
6683 case BFD_RELOC_PPC_TPREL16_HA
:
6684 case BFD_RELOC_PPC_DTPREL16
:
6685 case BFD_RELOC_PPC_DTPREL16_LO
:
6686 case BFD_RELOC_PPC_DTPREL16_HI
:
6687 case BFD_RELOC_PPC_DTPREL16_HA
:
6688 case BFD_RELOC_PPC_GOT_TLSGD16
:
6689 case BFD_RELOC_PPC_GOT_TLSGD16_LO
:
6690 case BFD_RELOC_PPC_GOT_TLSGD16_HI
:
6691 case BFD_RELOC_PPC_GOT_TLSGD16_HA
:
6692 case BFD_RELOC_PPC_GOT_TLSLD16
:
6693 case BFD_RELOC_PPC_GOT_TLSLD16_LO
:
6694 case BFD_RELOC_PPC_GOT_TLSLD16_HI
:
6695 case BFD_RELOC_PPC_GOT_TLSLD16_HA
:
6696 case BFD_RELOC_PPC_GOT_TPREL16
:
6697 case BFD_RELOC_PPC_GOT_TPREL16_LO
:
6698 case BFD_RELOC_PPC_GOT_TPREL16_HI
:
6699 case BFD_RELOC_PPC_GOT_TPREL16_HA
:
6700 case BFD_RELOC_PPC_GOT_DTPREL16
:
6701 case BFD_RELOC_PPC_GOT_DTPREL16_LO
:
6702 case BFD_RELOC_PPC_GOT_DTPREL16_HI
:
6703 case BFD_RELOC_PPC_GOT_DTPREL16_HA
:
6704 case BFD_RELOC_PPC64_TPREL16_DS
:
6705 case BFD_RELOC_PPC64_TPREL16_LO_DS
:
6706 case BFD_RELOC_PPC64_TPREL16_HIGH
:
6707 case BFD_RELOC_PPC64_TPREL16_HIGHA
:
6708 case BFD_RELOC_PPC64_TPREL16_HIGHER
:
6709 case BFD_RELOC_PPC64_TPREL16_HIGHERA
:
6710 case BFD_RELOC_PPC64_TPREL16_HIGHEST
:
6711 case BFD_RELOC_PPC64_TPREL16_HIGHESTA
:
6712 case BFD_RELOC_PPC64_DTPREL16_HIGH
:
6713 case BFD_RELOC_PPC64_DTPREL16_HIGHA
:
6714 case BFD_RELOC_PPC64_DTPREL16_DS
:
6715 case BFD_RELOC_PPC64_DTPREL16_LO_DS
:
6716 case BFD_RELOC_PPC64_DTPREL16_HIGHER
:
6717 case BFD_RELOC_PPC64_DTPREL16_HIGHERA
:
6718 case BFD_RELOC_PPC64_DTPREL16_HIGHEST
:
6719 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA
:
6720 case BFD_RELOC_PPC64_TPREL34
:
6721 case BFD_RELOC_PPC64_DTPREL34
:
6722 case BFD_RELOC_PPC64_GOT_TLSGD_PCREL34
:
6723 case BFD_RELOC_PPC64_GOT_TLSLD_PCREL34
:
6724 case BFD_RELOC_PPC64_GOT_TPREL_PCREL34
:
6725 case BFD_RELOC_PPC64_GOT_DTPREL_PCREL34
:
6726 gas_assert (fixP
->fx_addsy
!= NULL
);
6727 S_SET_THREAD_LOCAL (fixP
->fx_addsy
);
6731 /* These also should leave the field zero for the same
6732 reason. Note that older versions of gas wrote values
6733 here. If we want to go back to the old behaviour, then
6734 all _LO and _LO_DS cases will need to be treated like
6735 BFD_RELOC_LO16_PCREL above. Similarly for _HI etc. */
6736 case BFD_RELOC_16_GOTOFF
:
6737 case BFD_RELOC_LO16_GOTOFF
:
6738 case BFD_RELOC_HI16_GOTOFF
:
6739 case BFD_RELOC_HI16_S_GOTOFF
:
6740 case BFD_RELOC_LO16_PLTOFF
:
6741 case BFD_RELOC_HI16_PLTOFF
:
6742 case BFD_RELOC_HI16_S_PLTOFF
:
6743 case BFD_RELOC_GPREL16
:
6744 case BFD_RELOC_16_BASEREL
:
6745 case BFD_RELOC_LO16_BASEREL
:
6746 case BFD_RELOC_HI16_BASEREL
:
6747 case BFD_RELOC_HI16_S_BASEREL
:
6748 case BFD_RELOC_PPC_TOC16
:
6749 case BFD_RELOC_PPC64_TOC16_LO
:
6750 case BFD_RELOC_PPC64_TOC16_HI
:
6751 case BFD_RELOC_PPC64_TOC16_HA
:
6752 case BFD_RELOC_PPC64_PLTGOT16
:
6753 case BFD_RELOC_PPC64_PLTGOT16_LO
:
6754 case BFD_RELOC_PPC64_PLTGOT16_HI
:
6755 case BFD_RELOC_PPC64_PLTGOT16_HA
:
6756 case BFD_RELOC_PPC64_GOT16_DS
:
6757 case BFD_RELOC_PPC64_GOT16_LO_DS
:
6758 case BFD_RELOC_PPC64_PLT16_LO_DS
:
6759 case BFD_RELOC_PPC64_SECTOFF_DS
:
6760 case BFD_RELOC_PPC64_SECTOFF_LO_DS
:
6761 case BFD_RELOC_PPC64_TOC16_DS
:
6762 case BFD_RELOC_PPC64_TOC16_LO_DS
:
6763 case BFD_RELOC_PPC64_PLTGOT16_DS
:
6764 case BFD_RELOC_PPC64_PLTGOT16_LO_DS
:
6765 case BFD_RELOC_PPC_EMB_NADDR16
:
6766 case BFD_RELOC_PPC_EMB_NADDR16_LO
:
6767 case BFD_RELOC_PPC_EMB_NADDR16_HI
:
6768 case BFD_RELOC_PPC_EMB_NADDR16_HA
:
6769 case BFD_RELOC_PPC_EMB_SDAI16
:
6770 case BFD_RELOC_PPC_EMB_SDA2I16
:
6771 case BFD_RELOC_PPC_EMB_SDA2REL
:
6772 case BFD_RELOC_PPC_EMB_SDA21
:
6773 case BFD_RELOC_PPC_EMB_MRKREF
:
6774 case BFD_RELOC_PPC_EMB_RELSEC16
:
6775 case BFD_RELOC_PPC_EMB_RELST_LO
:
6776 case BFD_RELOC_PPC_EMB_RELST_HI
:
6777 case BFD_RELOC_PPC_EMB_RELST_HA
:
6778 case BFD_RELOC_PPC_EMB_BIT_FLD
:
6779 case BFD_RELOC_PPC_EMB_RELSDA
:
6780 case BFD_RELOC_PPC_VLE_SDA21
:
6781 case BFD_RELOC_PPC_VLE_SDA21_LO
:
6782 case BFD_RELOC_PPC_VLE_SDAREL_LO16A
:
6783 case BFD_RELOC_PPC_VLE_SDAREL_LO16D
:
6784 case BFD_RELOC_PPC_VLE_SDAREL_HI16A
:
6785 case BFD_RELOC_PPC_VLE_SDAREL_HI16D
:
6786 case BFD_RELOC_PPC_VLE_SDAREL_HA16A
:
6787 case BFD_RELOC_PPC_VLE_SDAREL_HA16D
:
6788 case BFD_RELOC_PPC64_GOT_PCREL34
:
6789 case BFD_RELOC_PPC64_PLT_PCREL34
:
6790 gas_assert (fixP
->fx_addsy
!= NULL
);
6793 case BFD_RELOC_PPC_TLS
:
6794 case BFD_RELOC_PPC_TLSGD
:
6795 case BFD_RELOC_PPC_TLSLD
:
6796 case BFD_RELOC_PPC64_TLS_PCREL
:
6802 case BFD_RELOC_PPC_B16
:
6803 /* Adjust the offset to the instruction boundary. */
6808 case BFD_RELOC_VTABLE_INHERIT
:
6809 case BFD_RELOC_VTABLE_ENTRY
:
6810 case BFD_RELOC_PPC_DTPMOD
:
6811 case BFD_RELOC_PPC_TPREL
:
6812 case BFD_RELOC_PPC_DTPREL
:
6813 case BFD_RELOC_PPC_COPY
:
6814 case BFD_RELOC_PPC_GLOB_DAT
:
6815 case BFD_RELOC_32_PLT_PCREL
:
6816 case BFD_RELOC_PPC_EMB_NADDR32
:
6817 case BFD_RELOC_PPC64_TOC
:
6818 case BFD_RELOC_CTOR
:
6820 case BFD_RELOC_32_PCREL
:
6823 case BFD_RELOC_64_PCREL
:
6824 case BFD_RELOC_PPC64_ADDR64_LOCAL
:
6825 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
6826 _("%s unsupported as instruction fixup"),
6827 bfd_get_reloc_code_name (fixP
->fx_r_type
));
6836 /* powerpc uses RELA style relocs, so if emitting a reloc the field
6837 contents can stay at zero. */
6838 #define APPLY_RELOC fixP->fx_done
6840 #define APPLY_RELOC 1
6842 /* We need to call the insert function even when fieldval is
6843 zero if the insert function would translate that zero to a
6844 bit pattern other than all zeros. */
6845 if ((fieldval
!= 0 && APPLY_RELOC
) || operand
->insert
!= NULL
)
6848 unsigned char *where
;
6850 /* Fetch the instruction, insert the fully resolved operand
6851 value, and stuff the instruction back again. */
6852 where
= (unsigned char *) fixP
->fx_frag
->fr_literal
+ fixP
->fx_where
;
6853 if (target_big_endian
)
6855 if (fixP
->fx_size
< 4)
6856 insn
= bfd_getb16 (where
);
6859 insn
= bfd_getb32 (where
);
6860 if (fixP
->fx_size
> 4)
6861 insn
= insn
<< 32 | bfd_getb32 (where
+ 4);
6866 if (fixP
->fx_size
< 4)
6867 insn
= bfd_getl16 (where
);
6870 insn
= bfd_getl32 (where
);
6871 if (fixP
->fx_size
> 4)
6872 insn
= insn
<< 32 | bfd_getl32 (where
+ 4);
6875 insn
= ppc_insert_operand (insn
, operand
, fieldval
,
6876 fixP
->tc_fix_data
.ppc_cpu
,
6877 fixP
->fx_file
, fixP
->fx_line
);
6878 if (target_big_endian
)
6880 if (fixP
->fx_size
< 4)
6881 bfd_putb16 (insn
, where
);
6884 if (fixP
->fx_size
> 4)
6886 bfd_putb32 (insn
, where
+ 4);
6889 bfd_putb32 (insn
, where
);
6894 if (fixP
->fx_size
< 4)
6895 bfd_putl16 (insn
, where
);
6898 if (fixP
->fx_size
> 4)
6900 bfd_putl32 (insn
, where
+ 4);
6903 bfd_putl32 (insn
, where
);
6909 /* Nothing else to do here. */
6912 gas_assert (fixP
->fx_addsy
!= NULL
);
6913 if (fixP
->fx_r_type
== BFD_RELOC_NONE
)
6918 /* Use expr_symbol_where to see if this is an expression
6920 if (expr_symbol_where (fixP
->fx_addsy
, &sfile
, &sline
))
6921 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
6922 _("unresolved expression that must be resolved"));
6924 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
6925 _("unsupported relocation against %s"),
6926 S_GET_NAME (fixP
->fx_addsy
));
6933 /* Handle relocs in data. */
6934 switch (fixP
->fx_r_type
)
6936 case BFD_RELOC_VTABLE_INHERIT
:
6938 && !S_IS_DEFINED (fixP
->fx_addsy
)
6939 && !S_IS_WEAK (fixP
->fx_addsy
))
6940 S_SET_WEAK (fixP
->fx_addsy
);
6943 case BFD_RELOC_VTABLE_ENTRY
:
6948 /* These can appear with @l etc. in data. */
6949 case BFD_RELOC_LO16
:
6950 case BFD_RELOC_LO16_PCREL
:
6951 case BFD_RELOC_HI16
:
6952 case BFD_RELOC_HI16_PCREL
:
6953 case BFD_RELOC_HI16_S
:
6954 case BFD_RELOC_HI16_S_PCREL
:
6955 case BFD_RELOC_PPC64_HIGHER
:
6956 case BFD_RELOC_PPC64_HIGHER_S
:
6957 case BFD_RELOC_PPC64_HIGHEST
:
6958 case BFD_RELOC_PPC64_HIGHEST_S
:
6959 case BFD_RELOC_PPC64_ADDR16_HIGH
:
6960 case BFD_RELOC_PPC64_ADDR16_HIGHA
:
6961 case BFD_RELOC_PPC64_ADDR64_LOCAL
:
6964 case BFD_RELOC_PPC_DTPMOD
:
6965 case BFD_RELOC_PPC_TPREL
:
6966 case BFD_RELOC_PPC_DTPREL
:
6967 S_SET_THREAD_LOCAL (fixP
->fx_addsy
);
6970 /* Just punt all of these to the linker. */
6971 case BFD_RELOC_PPC_B16_BRTAKEN
:
6972 case BFD_RELOC_PPC_B16_BRNTAKEN
:
6973 case BFD_RELOC_16_GOTOFF
:
6974 case BFD_RELOC_LO16_GOTOFF
:
6975 case BFD_RELOC_HI16_GOTOFF
:
6976 case BFD_RELOC_HI16_S_GOTOFF
:
6977 case BFD_RELOC_LO16_PLTOFF
:
6978 case BFD_RELOC_HI16_PLTOFF
:
6979 case BFD_RELOC_HI16_S_PLTOFF
:
6980 case BFD_RELOC_PPC_COPY
:
6981 case BFD_RELOC_PPC_GLOB_DAT
:
6982 case BFD_RELOC_16_BASEREL
:
6983 case BFD_RELOC_LO16_BASEREL
:
6984 case BFD_RELOC_HI16_BASEREL
:
6985 case BFD_RELOC_HI16_S_BASEREL
:
6986 case BFD_RELOC_PPC_TLS
:
6987 case BFD_RELOC_PPC_DTPREL16_LO
:
6988 case BFD_RELOC_PPC_DTPREL16_HI
:
6989 case BFD_RELOC_PPC_DTPREL16_HA
:
6990 case BFD_RELOC_PPC_TPREL16_LO
:
6991 case BFD_RELOC_PPC_TPREL16_HI
:
6992 case BFD_RELOC_PPC_TPREL16_HA
:
6993 case BFD_RELOC_PPC_GOT_TLSGD16
:
6994 case BFD_RELOC_PPC_GOT_TLSGD16_LO
:
6995 case BFD_RELOC_PPC_GOT_TLSGD16_HI
:
6996 case BFD_RELOC_PPC_GOT_TLSGD16_HA
:
6997 case BFD_RELOC_PPC_GOT_TLSLD16
:
6998 case BFD_RELOC_PPC_GOT_TLSLD16_LO
:
6999 case BFD_RELOC_PPC_GOT_TLSLD16_HI
:
7000 case BFD_RELOC_PPC_GOT_TLSLD16_HA
:
7001 case BFD_RELOC_PPC_GOT_DTPREL16
:
7002 case BFD_RELOC_PPC_GOT_DTPREL16_LO
:
7003 case BFD_RELOC_PPC_GOT_DTPREL16_HI
:
7004 case BFD_RELOC_PPC_GOT_DTPREL16_HA
:
7005 case BFD_RELOC_PPC_GOT_TPREL16
:
7006 case BFD_RELOC_PPC_GOT_TPREL16_LO
:
7007 case BFD_RELOC_PPC_GOT_TPREL16_HI
:
7008 case BFD_RELOC_PPC_GOT_TPREL16_HA
:
7009 case BFD_RELOC_24_PLT_PCREL
:
7010 case BFD_RELOC_PPC_LOCAL24PC
:
7011 case BFD_RELOC_32_PLT_PCREL
:
7012 case BFD_RELOC_GPREL16
:
7013 case BFD_RELOC_PPC_VLE_SDAREL_LO16A
:
7014 case BFD_RELOC_PPC_VLE_SDAREL_HI16A
:
7015 case BFD_RELOC_PPC_VLE_SDAREL_HA16A
:
7016 case BFD_RELOC_PPC_EMB_NADDR32
:
7017 case BFD_RELOC_PPC_EMB_NADDR16
:
7018 case BFD_RELOC_PPC_EMB_NADDR16_LO
:
7019 case BFD_RELOC_PPC_EMB_NADDR16_HI
:
7020 case BFD_RELOC_PPC_EMB_NADDR16_HA
:
7021 case BFD_RELOC_PPC_EMB_SDAI16
:
7022 case BFD_RELOC_PPC_EMB_SDA2REL
:
7023 case BFD_RELOC_PPC_EMB_SDA2I16
:
7024 case BFD_RELOC_PPC_EMB_SDA21
:
7025 case BFD_RELOC_PPC_VLE_SDA21_LO
:
7026 case BFD_RELOC_PPC_EMB_MRKREF
:
7027 case BFD_RELOC_PPC_EMB_RELSEC16
:
7028 case BFD_RELOC_PPC_EMB_RELST_LO
:
7029 case BFD_RELOC_PPC_EMB_RELST_HI
:
7030 case BFD_RELOC_PPC_EMB_RELST_HA
:
7031 case BFD_RELOC_PPC_EMB_BIT_FLD
:
7032 case BFD_RELOC_PPC_EMB_RELSDA
:
7033 case BFD_RELOC_PPC64_TOC
:
7034 case BFD_RELOC_PPC_TOC16
:
7035 case BFD_RELOC_PPC64_TOC16_LO
:
7036 case BFD_RELOC_PPC64_TOC16_HI
:
7037 case BFD_RELOC_PPC64_TOC16_HA
:
7038 case BFD_RELOC_PPC64_DTPREL16_HIGH
:
7039 case BFD_RELOC_PPC64_DTPREL16_HIGHA
:
7040 case BFD_RELOC_PPC64_DTPREL16_HIGHER
:
7041 case BFD_RELOC_PPC64_DTPREL16_HIGHERA
:
7042 case BFD_RELOC_PPC64_DTPREL16_HIGHEST
:
7043 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA
:
7044 case BFD_RELOC_PPC64_TPREL16_HIGH
:
7045 case BFD_RELOC_PPC64_TPREL16_HIGHA
:
7046 case BFD_RELOC_PPC64_TPREL16_HIGHER
:
7047 case BFD_RELOC_PPC64_TPREL16_HIGHERA
:
7048 case BFD_RELOC_PPC64_TPREL16_HIGHEST
:
7049 case BFD_RELOC_PPC64_TPREL16_HIGHESTA
:
7050 case BFD_RELOC_PPC64_TLS_PCREL
:
7056 case BFD_RELOC_NONE
:
7058 case BFD_RELOC_CTOR
:
7060 case BFD_RELOC_32_PCREL
:
7063 case BFD_RELOC_64_PCREL
:
7065 case BFD_RELOC_16_PCREL
:
7071 _("Gas failure, reloc value %d\n"), fixP
->fx_r_type
);
7076 if (fixP
->fx_size
&& APPLY_RELOC
)
7077 md_number_to_chars (fixP
->fx_frag
->fr_literal
+ fixP
->fx_where
,
7078 fieldval
, fixP
->fx_size
);
7080 && (seg
->flags
& SEC_CODE
) != 0
7081 && fixP
->fx_size
== 4
7084 && (fixP
->fx_r_type
== BFD_RELOC_32
7085 || fixP
->fx_r_type
== BFD_RELOC_CTOR
7086 || fixP
->fx_r_type
== BFD_RELOC_32_PCREL
))
7087 as_warn_where (fixP
->fx_file
, fixP
->fx_line
,
7088 _("data in executable section"));
7092 ppc_elf_validate_fix (fixP
, seg
);
7093 fixP
->fx_addnumber
= value
;
7095 /* PowerPC uses RELA relocs, ie. the reloc addend is stored separately
7096 from the section contents. If we are going to be emitting a reloc
7097 then the section contents are immaterial, so don't warn if they
7098 happen to overflow. Leave such warnings to ld. */
7101 fixP
->fx_no_overflow
= 1;
7103 /* Arrange to emit .TOC. as a normal symbol if used in anything
7104 but .TOC.@tocbase. */
7106 && fixP
->fx_r_type
!= BFD_RELOC_PPC64_TOC
7107 && fixP
->fx_addsy
!= NULL
7108 && strcmp (S_GET_NAME (fixP
->fx_addsy
), ".TOC.") == 0)
7109 symbol_get_bfdsym (fixP
->fx_addsy
)->flags
|= BSF_KEEP
;
7112 if (fixP
->fx_r_type
!= BFD_RELOC_PPC_TOC16
)
7113 fixP
->fx_addnumber
= 0;
7116 /* We want to use the offset within the toc, not the actual VMA
7118 fixP
->fx_addnumber
= (- bfd_section_vma (S_GET_SEGMENT (fixP
->fx_addsy
))
7119 - S_GET_VALUE (ppc_toc_csect
));
7120 /* Set *valP to avoid errors. */
7126 /* Generate a reloc for a fixup. */
7129 tc_gen_reloc (asection
*seg ATTRIBUTE_UNUSED
, fixS
*fixp
)
7133 reloc
= XNEW (arelent
);
7135 reloc
->sym_ptr_ptr
= XNEW (asymbol
*);
7136 *reloc
->sym_ptr_ptr
= symbol_get_bfdsym (fixp
->fx_addsy
);
7137 reloc
->address
= fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
7138 /* BFD_RELOC_PPC64_TLS_PCREL generates R_PPC64_TLS with an odd r_offset. */
7139 if (fixp
->fx_r_type
== BFD_RELOC_PPC64_TLS_PCREL
)
7141 reloc
->howto
= bfd_reloc_type_lookup (stdoutput
, fixp
->fx_r_type
);
7142 if (reloc
->howto
== (reloc_howto_type
*) NULL
)
7144 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
7145 _("reloc %d not supported by object file format"),
7146 (int) fixp
->fx_r_type
);
7149 reloc
->addend
= fixp
->fx_addnumber
;
7155 ppc_cfi_frame_initial_instructions (void)
7157 cfi_add_CFA_def_cfa (1, 0);
7161 tc_ppc_regname_to_dw2regnum (char *regname
)
7163 unsigned int regnum
= -1;
7167 static struct { const char *name
; int dw2regnum
; } regnames
[] =
7169 { "sp", 1 }, { "r.sp", 1 }, { "rtoc", 2 }, { "r.toc", 2 },
7170 { "mq", 64 }, { "lr", 65 }, { "ctr", 66 }, { "ap", 67 },
7171 { "cr", 70 }, { "xer", 76 }, { "vrsave", 109 }, { "vscr", 110 },
7172 { "spe_acc", 111 }, { "spefscr", 112 }
7175 for (i
= 0; i
< ARRAY_SIZE (regnames
); ++i
)
7176 if (strcmp (regnames
[i
].name
, regname
) == 0)
7177 return regnames
[i
].dw2regnum
;
7179 if (regname
[0] == 'r' || regname
[0] == 'f' || regname
[0] == 'v')
7181 p
= regname
+ 1 + (regname
[1] == '.');
7182 regnum
= strtoul (p
, &q
, 10);
7183 if (p
== q
|| *q
|| regnum
>= 32)
7185 if (regname
[0] == 'f')
7187 else if (regname
[0] == 'v')
7190 else if (regname
[0] == 'c' && regname
[1] == 'r')
7192 p
= regname
+ 2 + (regname
[2] == '.');
7193 if (p
[0] < '0' || p
[0] > '7' || p
[1])
7195 regnum
= p
[0] - '0' + 68;