[broken]Move code
[c4m-jtag.git] / c4m / vhdl / jtag / c4m_jtag_irblock.vhdl
1 -- Handle the instruction register for the JTAG controller
2
3 library ieee;
4 use ieee.std_logic_1164.ALL;
5
6 use work.c4m_jtag.ALL;
7
8 entity c4m_jtag_irblock is
9 generic (
10 IR_WIDTH: integer := 2
11 );
12 port (
13 -- needed TAP signals
14 TCK: in std_logic;
15 TDI: in std_logic;
16 TDO: out std_logic;
17 TDO_EN: out std_logic := '0';
18
19 -- JTAG state
20 STATE: in TAPSTATE_TYPE;
21 NEXT_STATE: in TAPSTATE_TYPE;
22 IRSTATE: in std_logic;
23
24 -- instruction register
25 IR: out std_logic_vector(IR_WIDTH-1 downto 0)
26 );
27 end c4m_jtag_irblock;
28
29 architecture rtl of c4m_jtag_irblock is
30 signal SHIFT_IR: std_logic_vector(IR_WIDTH-1 downto 0);
31
32 constant CMD_IDCODE: std_logic_vector(IR_WIDTH-1 downto 0) := c4m_jtag_cmd_idcode(IR_WIDTH);
33 begin
34 process (TCK, STATE)
35 begin
36 if STATE = TestLogicReset then
37 SHIFT_IR <= (others => '0');
38 IR <= CMD_IDCODE;
39 elsif rising_edge(TCK) then
40 if IRSTATE = '1' then
41 case STATE is
42 when Capture =>
43 SHIFT_IR(1) <= '0';
44 SHIFT_IR(0) <= '1';
45
46 when Shift =>
47 SHIFT_IR(IR_WIDTH-2 downto 0) <= SHIFT_IR(IR_WIDTH-1 downto 1);
48 SHIFT_IR(IR_WIDTH-1) <= TDI;
49
50 when Update =>
51 IR <= SHIFT_IR;
52
53 when others =>
54 null;
55 end case;
56 end if;
57 end if;
58 end process;
59
60 TDO <= SHIFT_IR(0) when STATE = Shift and IRSTATE = '1' else
61 '0';
62 TDO_EN <= '1' when STATE = Shift and IRSTATE = '1' else
63 '0';
64 end rtl;